klte-common: Fragment NFC support based on chip type

* Configs and board/product makefiles are split into discrete
  directories based on NFC chip. These chain to truly common
  makefiles that add permissions and shared PRODUCT_PACKAGES.
* Relocate libpn547_fw under the nfc/pn547 directory.

Change-Id: Ie9e87fc0566eac76fc411b3e5669564c5fa54123
This commit is contained in:
Kevin F. Haggerty 2018-01-01 17:49:00 -07:00
parent b75813297e
commit e692c8cfed
23 changed files with 1868 additions and 32 deletions

12
klte.mk
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@ -1,6 +1,6 @@
#
# Copyright (C) 2014-2016 The CyanogenMod Project
# Copyright (C) 2017 The LineageOS Project
# Copyright (C) 2017-2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@ -87,23 +87,13 @@ PRODUCT_COPY_FILES += \
$(LOCAL_PATH)/configs/media_profiles.xml:system/etc/media_profiles.xml \
$(LOCAL_PATH)/configs/media_codecs_performance.xml:system/etc/media_codecs_performance.xml
# NFC
PRODUCT_PACKAGES += \
android.hardware.nfc@1.0-impl \
com.android.nfc_extras \
NfcNci \
Tag
# Permissions
PRODUCT_COPY_FILES += \
frameworks/native/data/etc/android.hardware.audio.low_latency.xml:system/etc/permissions/android.hardware.audio.low_latency.xml \
frameworks/native/data/etc/android.hardware.nfc.xml:system/etc/permissions/android.hardware.nfc.xml \
frameworks/native/data/etc/android.hardware.nfc.hce.xml:system/etc/permissions/android.hardware.nfc.hce.xml \
frameworks/native/data/etc/android.hardware.sensor.stepcounter.xml:system/etc/permissions/android.hardware.sensor.stepcounter.xml \
frameworks/native/data/etc/android.hardware.sensor.stepdetector.xml:system/etc/permissions/android.hardware.sensor.stepdetector.xml \
frameworks/native/data/etc/android.hardware.telephony.cdma.xml:system/etc/permissions/android.hardware.telephony.cdma.xml \
frameworks/native/data/etc/android.hardware.telephony.gsm.xml:system/etc/permissions/android.hardware.telephony.gsm.xml \
frameworks/native/data/etc/com.android.nfc_extras.xml:system/etc/permissions/com.android.nfc_extras.xml \
frameworks/native/data/etc/com.nxp.mifare.xml:system/etc/permissions/com.nxp.mifare.xml \
frameworks/native/data/etc/handheld_core_hardware.xml:system/etc/permissions/handheld_core_hardware.xml

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@ -17,15 +17,6 @@
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.nfc</name>
<transport arch="32">passthrough</transport>
<version>1.0</version>
<interface>
<name>INfc</name>
<instance>default</instance>
</interface>
</hal>
<hal format="hidl">
<name>android.hardware.vibrator</name>
<transport arch="32">passthrough</transport>

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@ -1,4 +1,6 @@
#
# Copyright 2016 The CyanogenMod Project
# Copyright 2017-2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@ -11,16 +13,6 @@
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
LOCAL_PATH := $(call my-dir)
include $(CLEAR_VARS)
LOCAL_SRC_FILES := libpn547_fw.c
LOCAL_MODULE := libpn547_fw
LOCAL_MODULE_OWNER := nxp
LOCAL_MODULE_PATH := $(TARGET_OUT_VENDOR)/firmware
LOCAL_MODULE_TAGS := optional
LOCAL_PACK_MODULE_RELOCATIONS := false
include $(BUILD_SHARED_LIBRARY)
include $(call first-makefiles-under,$(call my-dir))

18
nfc/bcm2079x/board.mk Normal file
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@ -0,0 +1,18 @@
#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
DEVICE_MANIFEST_FILE += $(COMMON_PATH)/nfc/manifest-hwbinder.xml

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@ -0,0 +1,84 @@
###############################################################################
# Firmware patch file
# If the value is not set then patch download is disabled.
FW_PATCH="/vendor/firmware/bcm2079xB4_firmware.ncd"
FW_PATCH_20793="/vendor/firmware/bcm2079xB4_firmware_20793.ncd"
###############################################################################
# Firmware pre-patch file (sent before the above patch file)
# If the value is not set then pre-patch is not used.
FW_PRE_PATCH="/vendor/firmware/bcm2079xB4_pre_firmware.ncd"
FW_PRE_PATCH_20793="/vendor/firmware/bcm2079xB4_pre_firmware_20793.ncd"
###############################################################################
# LPTD mode configuration
# byte[0] is the length of the remaining bytes in this value
# if set to 0, LPTD params will NOT be sent to NFCC (i.e. disabled).
# byte[1] is the param id it should be set to B9.
# byte[2] is the length of the LPTD parameters
# byte[3] indicates if LPTD is enabled
# if set to 0, LPTD will be disabled (parameters will still be sent).
# byte[4-n] are the LPTD parameters.
# By default, LPTD is enabled and default settings are used.
#
# These settings are tuned for B4 evaluation boards.
# LPTD DISABLED ---
#LPTD_CFG={29:B9:27:00:00:FF:FF:08:A0:0F:40:00:80:12:02:10:00:00:00:31:0B:30:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00}
# Eval Board ---
#LPTD_CFG={29:B9:27:01:00:FF:FF:08:A0:0F:40:00:80:12:02:10:00:00:00:31:0B:30:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00}
# HLTE EUR NFC LPTD ENABLED
LPTD_CFG={29:B9:27:01:00:FF:FF:0A:A0:0F:40:00:80:12:02:10:00:00:00:31:0F:30:00:00:01:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00:00}
###############################################################################
# Startup Configuration (100 bytes maximum)
#
# For the 0xC2 parameter, set byte[0] to 60 to disable UICC Idle Timeout.
# set to 61 to enable (The least significant bit of this byte enables
# the power off when Idle mode).
# 20 A1 07 00 == > These 4 bytes form a 4 byte value which decides the idle timeout(in us)
# value to trigger the uicc deactivation.
# NFC forum conformance
#NFA_DM_START_UP_CFG={27:B2:04:E8:03:00:00:CF:02:02:08:CB:01:01:A5:01:01:CA:0A:00:00:00:00:06:F0:55:00:00:0F:80:01:01:B5:03:01:03:09:5B:01:02}
# GCF combined + clfCfgTagPicc
NFA_DM_START_UP_CFG={50:CB:01:09:A5:01:01:CA:14:00:00:00:00:06:0C:D4:01:00:15:C0:E1:E4:00:C0:C6:2D:00:14:00:B5:03:01:03:FF:C2:08:61:00:82:04:80:C3:C9:01:80:01:01:C9:03:03:0F:AB:5B:01:02:B2:04:E8:03:00:00:CF:02:02:08:B1:06:00:20:00:00:00:12:B5:03:01:02:FF:28:01:01}
###############################################################################
# Pre-Discovery Startup Configuration (256 bytes maximum)
#
# This is applied before starting Discovery the first time.
#NFA_DM_PRE_DISCOVERY_CFG={0A:C2:08:01:08:00:04:80:C3:C9:01}
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
# at startup (before discovery is started). If not used, no value is sent.
#
# The settings for this value are documented here:
# http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/
# Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx
# This document is maintained by Paul Forshaw.
#
# The values marked as ?? should be tweaked per antenna or customer/app:
# {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04}
# array[0] = 0x20 is length of the payload from array[1] to the end
# array[1] = 0xC8 is PREINIT_DSP_CFG
PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0A:03:30:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:4E:01:00:00:40:04}
###############################################################################
# Snooze Mode Settings
#
# By default snooze mode is enabled. Set SNOOZE_MODE_CFG byte[0] to 0
# to disable.
#
# If SNOOZE_MODE_CFG is not provided, the default settings are used:
# They are as follows:
# 8 Sleep Mode (0=Disabled 1=UART 8=SPI/I2C)
# 0 Idle Threshold Host
# 0 Idle Threshold HC
# 0 NFC Wake active mode (0=ActiveLow 1=ActiveHigh)
# 1 Host Wake active mode (0=ActiveLow 1=ActiveHigh)
#
#SNOOZE_MODE_CFG={08:00:00:00:01}
BRCM_CTS_WAR=0x03

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@ -0,0 +1,70 @@
###############################################################################
# Firmware patch file
# If the value is not set then patch download is disabled.
FW_PATCH="/vendor/firmware/bcm2079xB5_firmware.ncd"
#FW_PATCH_20793="/vendor/firmware/bcm2079xB5_firmware_20793.ncd"
###############################################################################
# Firmware pre-patch file (sent before the above patch file)
# If the value is not set then pre-patch is not used.
FW_PRE_PATCH="/vendor/firmware/bcm2079xB5_pre_firmware.ncd"
#FW_PRE_PATCH_20793="/vendor/firmware/bcm2079xB5_pre_firmware_20793.ncd"
###############################################################################
# LPTD mode configuration
# byte[0] is the length of the remaining bytes in this value
# if set to 0, LPTD params will NOT be sent to NFCC (i.e. disabled).
# byte[1] is the param id it should be set to B9.
# byte[2] is the length of the LPTD parameters
# byte[3] indicates if LPTD is enabled
# if set to 0, LPTD will be disabled (parameters will still be sent).
# byte[4-n] are the LPTD parameters.
# By default, LPTD is enabled and default settings are used.
# See nfc_hal_dm_cfg.c for defaults
LPTD_CFG={38:B9:36:01:00:FF:FF:09:00:00:00:A0:0F:40:00:00:12:02:10:00:00:00:2D:0B:30:00:00:00:00:00:00:00:00:00:00:00:00:00:00:03:00:D0:07:00:00:08:07:00:00:C8:00:00:00:00:00:00:00}
###############################################################################
# Startup Configuration (256 bytes maximum)
#
# This is applied at stack startup.
#
NFA_DM_START_UP_CFG={50:CB:01:01:A5:01:01:CA:1C:00:00:00:00:0E:C0:D4:01:00:0F:00:00:00:00:60:AE:0A:00:14:01:14:0A:10:B8:0B:03:00:02:B5:03:01:02:FF:80:01:01:C9:03:03:0F:AB:5B:01:00:B2:04:E8:03:00:00:CF:02:02:08:B1:06:00:20:00:00:40:12:B0:05:03:03:03:03:FF:28:01:01}
###############################################################################
# Pre-Discovery Startup Configuration (256 bytes maximum)
#
# This is applied before starting Discovery the first time.
NFA_DM_PRE_DISCOVERY_CFG={0A:C2:08:01:08:00:04:80:C3:C9:01}
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
# at startup (before discovery is started). If not used, no value is sent.
#
# The settings for this value are documented here:
# http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/
# Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx
#
# The values marked as ?? should be tweaked per antenna or customer/app:
# {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04}
# array[0] = 0x20 is length of the payload from array[1] to the end
# array[1] = 0xC8 is PREINIT_DSP_CFG
PREINIT_DSP_CFG={20:C8:1E:06:3F:00:0A:03:30:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:4B:01:00:00:40:04}
###############################################################################
# Snooze Mode Settings
#
# By default snooze mode is enabled. Set SNOOZE_MODE_CFG byte[0] to 0
# to disable.
#
# If SNOOZE_MODE_CFG is not provided, the default settings are used:
# They are as follows:
# 8 Sleep Mode (0=Disabled 1=UART 8=SPI/I2C)
# 0 Idle Threshold Host
# 0 Idle Threshold HC
# 0 NFC Wake active mode (0=ActiveLow 1=ActiveHigh)
# 1 Host Wake active mode (0=ActiveLow 1=ActiveHigh)
#
#SNOOZE_MODE_CFG={08:00:00:00:01}
BRCM_CTS_WAR=0x02

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@ -0,0 +1,291 @@
###############################################################################
# Application options
APPL_TRACE_LEVEL=0xFF
PROTOCOL_TRACE_LEVEL=0xFFFFFFFF
###############################################################################
# Logging
# Set USE_RAW_NCI_TRACE = 1 for protocol logging in a raw format
# instead of decoded
# Set LOG_TO_FILE = 1 to log protocol traces to a file on the sdcard
# instead of to adb logcat
# Set LOGCAT_FILTER to the filter string which is passed to logcat
#USE_RAW_NCI_TRACE=0
#LOG_TO_FILE=0
#LOGCAT_FILTER="BrcmNciX:V BrcmNciR:V BrcmNote:V *:S"
PRESERVE_STORAGE=1
###############################################################################
# performance measurement
# Change this setting to control how often USERIAL log the performance (throughput)
# data on read/write/poll
# defailt is to log performance dara for every 100 read or write
#REPORT_PERFORMANCE_MEASURE=100
###############################################################################
# File used for NFA storage
NFA_STORAGE="/data/bcmnfc"
###############################################################################
# Low Power Mode Settings
#
# If NFA_DM_LP_CFG is not provided, stack default settings are
# used (see nfa_dm_brcm_cfg.c). They are as follows:
# 1 Power cycle to full power mode from CEx
# 5 Parameter for low power mode command
# 0 Primary Threshold for battery monitor
# 0-7 representing below voltages:
# {2, 2.2, 2.7, 2.8, 2.9, 3, 3.1, 3.2}
# 8 Secondary Threshold for battery monitor
# 0-15 representing below voltages:
# {5.2, 4.87, 4.54, 4.22, 3.9, 3.73, 3.57, 3.4,
# 3.2, 3.1, 3.0, 2.9, 2.8, 2.7, 2.2, 2.0}
#
#NFA_DM_LP_CFG={01:05:00:08}
# LPM Disable FW VBAT MON
NFA_DM_LP_CFG={01:01:00:08}
###############################################################################
# Insert a delay in milliseconds after NFC_WAKE and before write to NFCC
NFC_WAKE_DELAY=20
###############################################################################
# Various Delay settings (in ms) used in USERIAL
# POWER_ON_DELAY
# Delay after turning on chip, before writing to transport (default 300)
# PRE_POWER_OFF_DELAY
# Delay after deasserting NFC-Wake before turn off chip (default 0)
# POST_POWER_OFF_DELAY
# Delay after turning off chip, before USERIAL_close returns (default 0)
# CE3_PRE_POWER_OFF_DELAY
# Delay after deasserting NFC-Wake before turn off chip (default 1000)
# when going to CE3 Switch Off mode
#
#POWER_ON_DELAY=300
PRE_POWER_OFF_DELAY=1500
#POST_POWER_OFF_DELAY=0
#CE3_PRE_POWER_OFF_DELAY=1000
###############################################################################
# Device Manager Config
#
# If NFA_DM_CFG is not provided, stack default settings are
# used (see nfa_dm_cfg.c). They are as follows:
# 0 (FALSE) Automatic NDEF detection when background polling
# 0 (FALSE) Automatic NDEF read when background polling
#
#NFA_DM_CFG={00:00}
###############################################################################
# Default poll duration (in ms)
# The defualt is 500ms if not set (see nfc_target.h) same as M0
NFA_DM_DISC_DURATION_POLL=500
###############################################################################
# Startup Vendor Specific Configuration (100 bytes maximum);
# byte[0] TLV total len = 0x5
# byte[1] NCI_MTS_CMD|NCI_GID_PROP = 0x2f
# byte[2] NCI_MSG_FRAME_LOG = 0x9
# byte[3] 2
# byte[4] 0=turn off RF frame logging; 1=turn on
# byte[5] 0=turn off SWP frame logging; 1=turn on
# NFA_DM_START_UP_VSC_CFG={05:2F:09:02:01:01}
#HW FSM
#NFA_DM_START_UP_VSC_CFG={04:2F:06:01:00}
###############################################################################
# Configure crystal frequency when internal LPO can't detect the frequency.
#XTAL_FREQUENCY=0
###############################################################################
# Use Nexus S NXP RC work to allow our stack/firmware to work with a retail
# Nexus S that causes IOP issues. Note, this will not pass conformance and
# should be removed for production.
#USE_NXP_P2P_RC_WORKAROUND=1
###############################################################################
# Configure the default Destination Gate used by HCI (the default is 4, which
# is the ETSI loopback gate.
#NFA_HCI_DEFAULT_DEST_GATE=0x04
###############################################################################
# Configure the single default SE to use. The default is to use the first
# SE that is detected by the stack. This value might be used when the phone
# supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use
# one of them (e.g. 0xF4).
ACTIVE_SE=0xF4
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each UICC (where F3="UICC0" and F4="UICC1")
NFA_HCI_STATIC_PIPE_ID_F3=0x71
NFA_HCI_STATIC_PIPE_ID_F4=0x71
###############################################################################
# When disconnecting from Oberthur secure element, perform a warm-reset of
# the secure element to deselect the applet.
# The default hex value of the command is 0x3. If this variable is undefined,
# then this feature is not used.
OBERTHUR_WARM_RESET_COMMAND=0x03
###############################################################################
# Force UICC to only listen to the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B.
#UICC_LISTEN_TECH_MASK=0x03
###############################################################################
# AID for Empty Select command
# If specified, this AID will be substituted when an Empty SELECT command is
# detected. The first byte is the length of the AID. Maximum length is 16.
AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00}
###############################################################################
# Force tag polling for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B |
# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 |
# NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_A_ACTIVE |
# NFA_TECHNOLOGY_MASK_F_ACTIVE.
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01
# NFA_TECHNOLOGY_MASK_B 0x02
# NFA_TECHNOLOGY_MASK_F 0x04
# NFA_TECHNOLOGY_MASK_ISO15693 0x08
# NFA_TECHNOLOGY_MASK_B_PRIME 0x10
# NFA_TECHNOLOGY_MASK_KOVIO 0x20
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80
POLLING_TECH_MASK=0xEF
###############################################################################
# Force P2P to only listen for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F |
# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE
P2P_LISTEN_TECH_MASK=0xC4
###############################################################################
# Maximum Number of Credits to be allowed by the NFCC
# This value overrides what the NFCC specifices allowing the host to have
# the control to work-around transport limitations. If this value does
# not exist or is set to 0, the NFCC will provide the number of credits.
MAX_RF_DATA_CREDITS=1
###############################################################################
# This setting allows you to disable registering the T4t Virtual SE that causes
# the NFCC to send PPSE requests to the DH.
# The default setting is enabled (i.e. T4t Virtual SE is registered).
#REGISTER_VIRTUAL_SE=1
REGISTER_VIRTUAL_SE=0
###############################################################################
# When screen is turned off, specify the desired power state of the controller.
# 0: power-off-sleep state; DEFAULT
# 1: full-power state
# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used)
# 3: FPM CE in snooze mode, Switch Off, Battery Off still available.
SCREEN_OFF_POWER_STATE=3
###############################################################################
# SPD Debug mode
# If set to 1, any failure of downloading a patch will trigger a hard-stop
#SPD_DEBUG=0
###############################################################################
# SPD Max Retry Count
# The number of attempts to download a patch before giving up (defualt is 3).
# Note, this resets after a power-cycle.
#SPD_MAX_RETRY_COUNT=3
###############################################################################
# Patch RAM Version Checking
# By default the stack will reject any attempt to download a patch where major
# version is < the one that is in NVM. If this config item is set to 1 then
# this version check is skipped.
#
#SPD_IGNORE_VERSION=0
###############################################################################
# transport driver
#
# TRANSPORT_DRIVER=<driver>
#
# where <driver> can be, for example:
# "/dev/ttyS" (UART)
# "/dev/bcmi2cnfc" (I2C)
# "hwtun" (HW Tunnel)
# "/dev/bcmspinfc" (SPI)
# "/dev/btusb0" (BT USB)
TRANSPORT_DRIVER="/dev/bcm2079x"
###############################################################################
# power control driver
# Specify a kernel driver that support ioctl commands to control NFC_EN and
# NFC_WAKE gpio signals.
#
# POWER_CONTRL_DRIVER=<driver>
# where <driver> can be, for example:
# "/dev/nfcpower"
# "/dev/bcmi2cnfc" (I2C)
# "/dev/bcmspinfc" (SPI)
# i2c and spi driver may be used to control NFC_EN and NFC_WAKE signal
POWER_CONTROL_DRIVER="/dev/bcm2079x"
###############################################################################
# I2C transport driver options
#
BCMI2CNFC_ADDRESS=0
###############################################################################
# I2C transport driver try to read multiple packets in read() if data is available
# remove the comment below to enable this feature
#READ_MULTIPLE_PACKETS=1
###############################################################################
# SPI transport driver options
#SPI_NEGOTIATION={0A:F0:00:01:00:00:00:FF:FF:00:00}
###############################################################################
# UART transport driver options
#
# PORT=1,2,3,...
# BAUD=115200, 19200, 9600, 4800,
# DATABITS=8, 7, 6, 5
# PARITY="even" | "odd" | "none"
# STOPBITS="0" | "1" | "1.5" | "2"
#UART_PORT=2
#UART_BAUD=115200
#UART_DATABITS=8
#UART_PARITY="none"
#UART_STOPBITS="1"
###############################################################################
# Insert a delay in microseconds per byte after a write to NFCC.
# after writing a block of data to the NFCC, delay this an amopunt of time before
# writing next block of data. the delay is calculated as below
# NFC_WRITE_DELAY * (number of byte written) / 1000 milliseconds
# e.g. after 259 bytes is written, delay (259 * 20 / 1000) 5 ms before next write
NFC_WRITE_DELAY=20
###############################################################################
# Configure the default NfcA/IsoDep techology and protocol route. Can be
# either a secure element (e.g. 0xF4) or the host (0x00)
DEFAULT_ISODEP_ROUTE=0xF3
###############################################################################
# Configure the default "off-host" AID route. The default is 0xF4
DEFAULT_OFFHOST_ROUTE=0xF4
POWER_SAVER_WORKAROUND_1=0xF3
PRESENCE_CHECK_ALGORITHM=1
AID_MATCHING_MODE=2
AUTO_ADJUST_ISO_BITRATE=1

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nfc/bcm2079x/product.mk Normal file
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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
$(call inherit-product, device/samsung/klte-common/nfc/product.mk)
PRODUCT_PACKAGES += \
android.hardware.nfc@1.0-impl-bcm \
android.hardware.nfc@1.0-service \
nfc_nci.bcm2079x.default
PRODUCT_COPY_FILES += \
device/samsung/klte-common/nfc/bcm2079x/libnfc-brcm.conf:system/vendor/etc/libnfc-brcm.conf \
device/samsung/klte-common/nfc/bcm2079x/libnfc-brcm-20791b04.conf:system/vendor/etc/libnfc-brcm-20791b04.conf \
device/samsung/klte-common/nfc/bcm2079x/libnfc-brcm-20791b05.conf:system/vendor/etc/libnfc-brcm-20791b05.conf

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<manifest version="1.0" type="device">
<hal format="hidl">
<name>android.hardware.nfc</name>
<transport>hwbinder</transport>
<version>1.0</version>
<interface>
<name>INfc</name>
<instance>default</instance>
</interface>
</hal>
</manifest>

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<manifest version="1.0" type="device">
<hal format="hidl">
<name>android.hardware.nfc</name>
<transport arch="32">passthrough</transport>
<version>1.0</version>
<interface>
<name>INfc</name>
<instance>default</instance>
</interface>
</hal>
</manifest>

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nfc/nfcee_access.xml Normal file
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<?xml version="1.0" encoding="utf-8"?>
<resources xmlns:xliff="urn:oasis:names:tc:xliff:document:1.2">
<!-- Applications granted NFCEE access on user builds
See packages/apps/Nfc/etc/sample_nfcee_access.xml for full documentation.
-->
<!-- Google wallet release signature -->
<signer android:signature="3082044c30820334a003020102020900a8cd17c93da5d990300d06092a864886f70d01010505003077310b3009060355040613025553311330110603550408130a43616c69666f726e6961311630140603550407130d4d6f756e7461696e205669657731143012060355040a130b476f6f676c6520496e632e3110300e060355040b1307416e64726f6964311330110603550403130a476f6f676c65204e4643301e170d3131303332343031303635335a170d3338303830393031303635335a3077310b3009060355040613025553311330110603550408130a43616c69666f726e6961311630140603550407130d4d6f756e7461696e205669657731143012060355040a130b476f6f676c6520496e632e3110300e060355040b1307416e64726f6964311330110603550403130a476f6f676c65204e464330820120300d06092a864886f70d01010105000382010d00308201080282010100c30f88add9b492096a2c586a5a9a80356bfa026958f8ff0c5dfaf59f49268ad870dee821a53e1f5b170fc96245a3c982a7cb4527053be35e34f396d24b2291ec0c528d6e26927465e06875ea621f7ff98c40e3345b204907cc9354743acdaace65565f48ba74cd4121cdc876df3522badb095c20d934c56a3e5c393ee5f0e02f8fe0621f918d1f35a82489252c6fa6b63392a7686b3e48612d06a9cf6f49bff11d5d96289c9dfe14ac5762439697dd29eafdb9810de3263513a905ac8e8eaf20907e46750a5ab7bf9a77262f47b03f5a3c6e6d7b51343f69c7f725f70bcc1b4ad592250b705a86e6e83ee2ae37fe5701bcbdb26feefdfff60f6a5bdfb5b64793020103a381dc3081d9301d0603551d0e041604141ccece0eea4dc1121fc7515f0d0a0c72e08cc96d3081a90603551d230481a130819e80141ccece0eea4dc1121fc7515f0d0a0c72e08cc96da17ba4793077310b3009060355040613025553311330110603550408130a43616c69666f726e6961311630140603550407130d4d6f756e7461696e205669657731143012060355040a130b476f6f676c6520496e632e3110300e060355040b1307416e64726f6964311330110603550403130a476f6f676c65204e4643820900a8cd17c93da5d990300c0603551d13040530030101ff300d06092a864886f70d01010505000382010100a470c728e1d31b06d9af6ae768b565046c57806b9843724931d75d4ca10c321520d33ccfed2aa65462234c9ef9b6f910cc676b99cb7f9895d6c06763574fbb78331275dc5cf38fbaa918d7938c051ffba2ade8f303cde8d9e68a048d1fdb9e7c9f2a49b222c68fff422bf15569b85eeeedb04aa30873dbe64b9c9e74f8f2c2f6c40124aaa8d1780d18512b540add28b3e9581971a4170dd868cf5f31e44712b2c23bb51037d7ef9f87a6e5bdb35e2ceb6bb022636c17a56a96bc7a50258c0bd2ed7b31555a18452e17321a0d52838c82f63f742d74ff79586a5cbb7faf7198a84bcf744310e9e927597f00a23dd00660800c2238d90b2fb372dfdbba75bd852e" />
</resources>

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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
include $(call first-makefiles-under,$(call my-dir))

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nfc/pn547/board.mk Normal file
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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
BOARD_NFC_CHIPSET := pn547
BOARD_NFC_HAL_SUFFIX := msm8974
DEVICE_MANIFEST_FILE += $(COMMON_PATH)/nfc/manifest-passthrough.xml

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## this file is used by Broadcom's Hardware Abstraction Layer at external/libnfc-nci/halimpl/
###############################################################################
# Application options
APPL_TRACE_LEVEL=0xFF
PROTOCOL_TRACE_LEVEL=0xFFFFFFFF
###############################################################################
# performance measurement
# Change this setting to control how often USERIAL log the performance (throughput)
# data on read/write/poll
# defailt is to log performance dara for every 100 read or write
#REPORT_PERFORMANCE_MEASURE=100
###############################################################################
# File used for NFA storage
NFA_STORAGE="/data/nfc"
###############################################################################
# Snooze Mode Settings
#
# By default snooze mode is enabled. Set SNOOZE_MODE_CFG byte[0] to 0
# to disable.
#
# If SNOOZE_MODE_CFG is not provided, the default settings are used:
# They are as follows:
# 8 Sleep Mode (0=Disabled 1=UART 8=SPI/I2C)
# 0 Idle Threshold Host
# 0 Idle Threshold HC
# 0 NFC Wake active mode (0=ActiveLow 1=ActiveHigh)
# 1 Host Wake active mode (0=ActiveLow 1=ActiveHigh)
#
#SNOOZE_MODE_CFG={08:00:00:00:01}
###############################################################################
# Insert a delay in milliseconds after NFC_WAKE and before write to NFCC
NFC_WAKE_DELAY=20
###############################################################################
# Various Delay settings (in ms) used in USERIAL
# POWER_ON_DELAY
# Delay after turning on chip, before writing to transport (default 300)
# PRE_POWER_OFF_DELAY
# Delay after deasserting NFC-Wake before turn off chip (default 0)
# POST_POWER_OFF_DELAY
# Delay after turning off chip, before USERIAL_close returns (default 0)
#
#POWER_ON_DELAY=300
#PRE_POWER_OFF_DELAY=0
#POST_POWER_OFF_DELAY=0
###############################################################################
# LPTD mode configuration
# byte[0] is the length of the remaining bytes in this value
# if set to 0, LPTD params will NOT be sent to NFCC (i.e. disabled).
# byte[1] is the param id it should be set to B9.
# byte[2] is the length of the LPTD parameters
# byte[3] indicates if LPTD is enabled
# if set to 0, LPTD will be disabled (parameters will still be sent).
# byte[4-n] are the LPTD parameters.
# By default, LPTD is enabled and default settings are used.
# See nfc_hal_dm_cfg.c for defaults
LPTD_CFG={23:B9:21:01:02:FF:FF:04:A0:0F:40:00:80:02:02:10:00:00:00:31:0C:30:00:00:00:00:00:00:00:00:00:00:00:00:00:00}
###############################################################################
# Startup Configuration (100 bytes maximum)
#
# For the 0xCA parameter, byte[9] (marked by 'AA') is for UICC0, and byte[10] (marked by BB) is
# for UICC1. The values are defined as:
# 0 : UICCx only supports ISO_DEP in low power mode.
# 2 : UICCx only supports Mifare in low power mode.
# 3 : UICCx supports both ISO_DEP and Mifare in low power mode.
#
# AA BB
NFA_DM_START_UP_CFG={1F:CB:01:01:A5:01:01:CA:14:00:00:00:00:06:E8:03:00:00:00:00:00:00:00:00:00:00:00:00:00:80:01:01}
###############################################################################
# Startup Vendor Specific Configuration (100 bytes maximum);
# byte[0] TLV total len = 0x5
# byte[1] NCI_MTS_CMD|NCI_GID_PROP = 0x2f
# byte[2] NCI_MSG_FRAME_LOG = 0x9
# byte[3] 2
# byte[4] 0=turn off RF frame logging; 1=turn on
# byte[5] 0=turn off SWP frame logging; 1=turn on
# NFA_DM_START_UP_VSC_CFG={05:2F:09:02:01:01}
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
# at startup (before discovery is started). If not used, no value is sent.
#
# The settings for this value are documented here:
# http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/
# Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx
# This document is maintained by Paul Forshaw.
#
# The values marked as ?? should be tweaked per antenna or customer/app:
# {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04}
# array[0] = 0x20 is length of the payload from array[1] to the end
# array[1] = 0xC8 is PREINIT_DSP_CFG
#PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0F:03:3C:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:48:01:00:00:40:04}
###############################################################################
# Configure crystal frequency when internal LPO can't detect the frequency.
#XTAL_FREQUENCY=0
###############################################################################
# Configure the default Destination Gate used by HCI (the default is 4, which
# is the ETSI loopback gate.
NFA_HCI_DEFAULT_DEST_GATE=0xF0
###############################################################################
# Configure the single default SE to use. The default is to use the first
# SE that is detected by the stack. This value might be used when the phone
# supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use
# one of them (e.g. 0xF4).
#ACTIVE_SE=0xF3
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each UICC (where F3="UICC0" and F4="UICC1")
#NFA_HCI_STATIC_PIPE_ID_F3=0x70
#NFA_HCI_STATIC_PIPE_ID_01=0x19
NFA_HCI_STATIC_PIPE_ID_C0=0x19
###############################################################################
# When disconnecting from Oberthur secure element, perform a warm-reset of
# the secure element to deselect the applet.
# The default hex value of the command is 0x3. If this variable is undefined,
# then this feature is not used.
OBERTHUR_WARM_RESET_COMMAND=0x03
###############################################################################
# Force UICC to only listen to the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F
UICC_LISTEN_TECH_MASK=0xC7
###############################################################################
# Allow UICC to be powered off if there is no traffic.
# Timeout is in ms. If set to 0, then UICC will not be powered off.
#UICC_IDLE_TIMEOUT=30000
UICC_IDLE_TIMEOUT=0
###############################################################################
# AID for Empty Select command
# If specified, this AID will be substituted when an Empty SELECT command is
# detected. The first byte is the length of the AID. Maximum length is 16.
AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00}
###############################################################################
# Maximum Number of Credits to be allowed by the NFCC
# This value overrides what the NFCC specifices allowing the host to have
# the control to work-around transport limitations. If this value does
# not exist or is set to 0, the NFCC will provide the number of credits.
MAX_RF_DATA_CREDITS=1
###############################################################################
# This setting allows you to disable registering the T4t Virtual SE that causes
# the NFCC to send PPSE requests to the DH.
# The default setting is enabled (i.e. T4t Virtual SE is registered).
#REGISTER_VIRTUAL_SE=1
###############################################################################
# When screen is turned off, specify the desired power state of the controller.
# 0: power-off-sleep state; DEFAULT
# 1: full-power state
# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used)
SCREEN_OFF_POWER_STATE=1
###############################################################################
# Firmware patch file
# If the value is not set then patch download is disabled.
FW_PATCH="/vendor/firmware/bcm2079x_firmware.ncd"
###############################################################################
# Firmware pre-patch file (sent before the above patch file)
# If the value is not set then pre-patch is not used.
FW_PRE_PATCH="/vendor/firmware/bcm2079x_pre_firmware.ncd"
###############################################################################
# Firmware patch format
# 1 = HCD
# 2 = NCD (default)
#NFA_CONFIG_FORMAT=2
###############################################################################
# SPD Debug mode
# If set to 1, any failure of downloading a patch will trigger a hard-stop
#SPD_DEBUG=0
###############################################################################
# SPD Max Retry Count
# The number of attempts to download a patch before giving up (defualt is 3).
# Note, this resets after a power-cycle.
#SPD_MAX_RETRY_COUNT=3
###############################################################################
# transport driver
#
# TRANSPORT_DRIVER=<driver>
#
# where <driver> can be, for example:
# "/dev/ttyS" (UART)
# "/dev/bcmi2cnfc" (I2C)
# "hwtun" (HW Tunnel)
# "/dev/bcmspinfc" (SPI)
# "/dev/btusb0" (BT USB)
TRANSPORT_DRIVER="/dev/bcm2079x"
###############################################################################
# power control driver
# Specify a kernel driver that support ioctl commands to control NFC_EN and
# NFC_WAKE gpio signals.
#
# POWER_CONTRL_DRIVER=<driver>
# where <driver> can be, for example:
# "/dev/nfcpower"
# "/dev/bcmi2cnfc" (I2C)
# "/dev/bcmspinfc" (SPI)
# i2c and spi driver may be used to control NFC_EN and NFC_WAKE signal
POWER_CONTROL_DRIVER="/dev/bcm2079x"
###############################################################################
# I2C transport driver options
#
BCMI2CNFC_ADDRESS=0
###############################################################################
# I2C transport driver try to read multiple packets in read() if data is available
# remove the comment below to enable this feature
#READ_MULTIPLE_PACKETS=1
###############################################################################
# SPI transport driver options
#SPI_NEGOTIATION={0A:F0:00:01:00:00:00:FF:FF:00:00}
###############################################################################
# UART transport driver options
#
# PORT=1,2,3,...
# BAUD=115200, 19200, 9600, 4800,
# DATABITS=8, 7, 6, 5
# PARITY="even" | "odd" | "none"
# STOPBITS="0" | "1" | "1.5" | "2"
#UART_PORT=2
#UART_BAUD=115200
#UART_DATABITS=8
#UART_PARITY="none"
#UART_STOPBITS="1"
###############################################################################
# Insert a delay in microseconds per byte after a write to NFCC.
# after writing a block of data to the NFCC, delay this an amopunt of time before
# writing next block of data. the delay is calculated as below
# NFC_WRITE_DELAY * (number of byte written) / 1000 milliseconds
# e.g. after 259 bytes is written, delay (259 * 20 / 1000) 5 ms before next write
NFC_WRITE_DELAY=20
###############################################################################
# Maximum Number of Credits to be allowed by the NFCC
# This value overrides what the NFCC specifices allowing the host to have
# the control to work-around transport limitations. If this value does
# not exist or is set to 0, the NFCC will provide the number of credits.
MAX_RF_DATA_CREDITS=1
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
# at startup (before discovery is started). If not used, no value is sent.
#
# The settings for this value are documented here:
# http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/
# Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx
# This document is maintained by Paul Forshaw.
#
# The values marked as ?? should be tweaked per antenna or customer/app:
# {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04}
# array[0] = 0x20 is length of the payload from array[1] to the end
# array[1] = 0xC8 is PREINIT_DSP_CFG
#PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0F:03:3C:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:48:01:00:00:40:04}
###############################################################################
# Force tag polling for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B |
# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 |
# NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_KOVIO |
# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE.
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
# NFA_TECHNOLOGY_MASK_B 0x02 /* NFC Technology B */
# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
# NFA_TECHNOLOGY_MASK_ISO15693 0x08 /* Proprietary Technology */
# NFA_TECHNOLOGY_MASK_KOVIO 0x20 /* Proprietary Technology */
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */
POLLING_TECH_MASK=0x6F
###############################################################################
# Force P2P to only listen for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F |
# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01 /* NFC Technology A */
# NFA_TECHNOLOGY_MASK_F 0x04 /* NFC Technology F */
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40 /* NFC Technology A active mode */
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80 /* NFC Technology F active mode */
P2P_LISTEN_TECH_MASK=0xC4
PRESERVE_STORAGE=0x01
###############################################################################
# Maximum EE supported number
# NXP PN547C2 0x02
# NXP PN65T 0x03
NFA_MAX_EE_SUPPORTED=0x02
###############################################################################
# NCI Hal Module name
NCI_HAL_MODULE="nfc_nci"
###############################################################################
# Vendor Specific Proprietary Protocol & Discovery Configuration
# Set to 0xFF if unsupported
# byte[0] NCI_PROTOCOL_18092_ACTIVE
# byte[1] NCI_PROTOCOL_B_PRIME
# byte[2] NCI_PROTOCOL_DUAL
# byte[3] NCI_PROTOCOL_15693
# byte[4] NCI_PROTOCOL_KOVIO
# byte[5] NCI_PROTOCOL_MIFARE
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:77:FF:FF}
###############################################################################
# Enable/Disable NFC-F HCE
# Disable 0x00
# Enable non-zero value
ENABLE_NFCF_HCE=0x00
###############################################################################
# Set max transceive length for IsoDep frames
# Standard 0x105 (261)
# Extended 0xFEFF (65279)
ISO_DEP_MAX_TRANSCEIVE=0xFEFF

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nfc/pn547/libnfc-nxp.conf Normal file
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## This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn547)
## and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn547)
###############################################################################
# Application options
# Logging Levels
# NXPLOG_DEFAULT_LOGLEVEL 0x01
# ANDROID_LOG_DEBUG 0x03
# ANDROID_LOG_WARN 0x02
# ANDROID_LOG_ERROR 0x01
# ANDROID_LOG_SILENT 0x00
#
NXPLOG_EXTNS_LOGLEVEL=0x02
NXPLOG_NCIHAL_LOGLEVEL=0x02
NXPLOG_NCIX_LOGLEVEL=0x02
NXPLOG_NCIR_LOGLEVEL=0x02
NXPLOG_FWDNLD_LOGLEVEL=0x02
NXPLOG_TML_LOGLEVEL=0x02
###############################################################################
# Extension for Mifare reader enable
# 0x00 - Disabled
# 0x01 - Enabled
MIFARE_READER_ENABLE=0x01
###############################################################################
# File location for Firmware
#FW_STORAGE="/vendor/firmware/libpn547_fw.so"
###############################################################################
# Nfc Device Node name
NXP_NFC_DEV_NODE="/dev/pn547"
###############################################################################
# File name for Firmware
NXP_FW_NAME="libpn547_fw.so"
###############################################################################
# System clock source selection configuration
# CLK_SRC_XTAL - 0x01
# CLK_SRC_PLL - 0x02
NXP_SYS_CLK_SRC_SEL=0x02
###############################################################################
# System clock frequency selection configuration for PLL
# CLK_FREQ_13MHZ - 0x01
# CLK_FREQ_19_2MHZ - 0x02
# CLK_FREQ_24MHZ - 0x03
# CLK_FREQ_26MHZ - 0x04
# CLK_FREQ_38_4MHZ - 0x05
# CLK_FREQ_52MHZ - 0x06
NXP_SYS_CLK_FREQ_SEL=0x02
###############################################################################
# The timeout value to be used for clock request acknowledgment
# min value = 0x01 to max = 0x0A
NXP_SYS_CLOCK_TO_CFG=0x0A
###############################################################################
# NXP proprietary settings
NXP_ACT_PROP_EXTN={2F, 02, 00}
###############################################################################
# NFC forum profile settings
NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
###############################################################################
# Standby enable settings
# 0x00 - Disabled
# 0x01 - Enabled
NXP_CORE_STANDBY={2F, 00, 01, 01}
###############################################################################
# NXP RF ALM (NO BOOSTER) configuration settings for FW VERSION = 08.01.1F
###############################################################################
# A0, 0D, 03, 00, 40, 02 RF_CLIF_BOOT CLIF_ANA_NFCLD_REG
# A0, 0D, 03, 04, 43, 20 RF_CLIF_CFG_INITIATOR CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 03, 04, FF, 05 RF_CLIF_CFG_INITIATOR SMU_PMU_REG (0x40024010)
# A0, 0D, 06, 06, 44, A3, 90, 03, 00 RF_CLIF_CFG_TARGET CLIF_ANA_RX_REG
# A0, 0D, 06, 06, 30, CF, 00, 08, 00 RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 06, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_TARGET CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 04, 06, 03, 00, 6E RF_CLIF_CFG_TARGET CLIF_TRANSCEIVE_CONTROL_REG
# A0, 0D, 03, 06, 48, 1F RF_CLIF_CFG_TARGET CLIF_ANA_CLK_MAN_REG
# A0, 0D, 03, 06, 43, A0 RF_CLIF_CFG_TARGET CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 06, 06, 42, 00, 00, FF, FF RF_CLIF_CFG_TARGET CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 06, 41, 80, 00, 00, 00 RF_CLIF_CFG_TARGET CLIF_ANA_TX_CLK_CONTROL_REG
# A0, 0D, 03, 06, 37, 18 RF_CLIF_CFG_TARGET CLIF_TX_CONTROL_REG
# A0, 0D, 03, 06, 16, 00 RF_CLIF_CFG_TARGET CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 06, 15, 00 RF_CLIF_CFG_TARGET CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 06, FF, 05, 00, 00, 00 RF_CLIF_CFG_TARGET SMU_PMU_REG (0x40024010)
# A0, 0D, 06, 08, 44, 00, 00, 00, 00 RF_CLIF_CFG_I_PASSIVE CLIF_ANA_RX_REG
# A0, 0D, 06, 20, 4A, 00, 00, 00, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 20, 42, 88, 10, FF, FF RF_CLIF_CFG_TECHNO_I_TX15693CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 20, 16, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 20, 15, 00 RF_CLIF_CFG_TECHNO_I_TX15693CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 22, 44, 22, 00, 02, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_ANA_RX_REG
# A0, 0D, 06, 22, 2D, 50, 44, 0C, 00 RF_CLIF_CFG_TECHNO_I_RX15693CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 04, 32, 03, 40, 3D RF_CLIF_CFG_BR_106_I_TXA CLIF_TRANSCEIVE_CONTROL_REG
# A0, 0D, 06, 32, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 32, 16, 00 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 32, 15, 01 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 03, 32, 0D, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_DATA_MOD_REG
# A0, 0D, 03, 32, 14, 22 RF_CLIF_CFG_BR_106_I_TXA CLIF_TX_SYMBOL23_MOD_REG
# A0, 0D, 06, 32, 4A, 30, 07, 01, 1F RF_CLIF_CFG_BR_106_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 34, 2D, 24, 77, 0C, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 34, 34, 00, 00, E4, 03 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_AGC_CONFIG1_REG
# A0, 0D, 06, 34, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG
# A0, 0D, 06, 35, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXA_P CLIF_ANA_RX_REG
# A0, 0D, 06, 38, 4A, 53, 07, 01, 1B RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 38, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 38, 16, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 38, 15, 00 RF_CLIF_CFG_BR_212_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_212_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 3C, 4A, 52, 07, 01, 1B RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 3C, 42, 68, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 3C, 16, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 3C, 15, 00 RF_CLIF_CFG_BR_424_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_424_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 40, 42, F0, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 40, 0D, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_DATA_MOD_REG
# A0, 0D, 03, 40, 14, 02 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_SYMBOL23_MOD_REG
# A0, 0D, 06, 40, 4A, 12, 07, 00, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 40, 16, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 40, 15, 00 RF_CLIF_CFG_BR_848_I_TXA CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 42, 2D, 15, 47, 0D, 00 RF_CLIF_CFG_BR_848_I_RXA CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 46, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 46, 2D, 05, 47, 0E, 00 RF_CLIF_CFG_BR_106_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 44, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 44, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_106_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 44, 16, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 44, 15, 00 RF_CLIF_CFG_BR_106_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 4A, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 4A, 2D, 05, 37, 0C, 00 RF_CLIF_CFG_BR_212_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 48, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 48, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 48, 16, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 48, 15, 00 RF_CLIF_CFG_BR_212_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 4E, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 4E, 2D, 05, 37, 0C, 00 RF_CLIF_CFG_BR_424_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 4C, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 4C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 4C, 16, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 4C, 15, 00 RF_CLIF_CFG_BR_424_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 52, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 52, 2D, 05, 25, 0C, 00 RF_CLIF_CFG_BR_848_I_RXB CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 50, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 50, 4A, 11, 0F, 01, 07 RF_CLIF_CFG_BR_848_I_TXB CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 50, 16, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 50, 15, 00 RF_CLIF_CFG_BR_848_I_TXB CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 56, 44, 22, 00, 02, 00 RF_CLIF_CFG_BR_212_I_RXF_P CLIF_ANA_RX_REG
# A0, 0D, 06, 5C, 2D, 05, 69, 0C, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_SIGPRO_RM_CONFIG1_REG
# A0, 0D, 06, 5C, 44, 21, 00, 02, 00 RF_CLIF_CFG_BR_424_I_RXF_P CLIF_ANA_RX_REG
# A0, 0D, 06, 54, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 54, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 54, 16, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 54, 15, 00 RF_CLIF_CFG_BR_212_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 5A, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 5A, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_I_TXF CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 5A, 16, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 5A, 15, 00 RF_CLIF_CFG_BR_424_I_TXF CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 98, 2F, AF, 05, 80, 0F RF_CLIF_GTM_B CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 9A, 42, 00, 00, FF, FF RF_CLIF_GTM_FELICA CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 30, 44, A3, 90, 03, 00 RF_CLIF_CFG_TECHNO_T_RXF CLIF_ANA_RX_REG
# A0, 0D, 06, 6C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 06, 6C, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_BR_106_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 70, 2F, 8F, 05, 80, 12 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 70, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_212_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 74, 2F, 8F, 05, 80, 12 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 74, 30, DF, 00, 07, 00 RF_CLIF_CFG_BR_424_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 78, 2F, 1F, 06, 80, 01 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 78, 30, 3F, 00, 04, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 78, 44, A2, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_ANA_RX_REG
# A0, 0D, 03, 78, 47, 00 RF_CLIF_CFG_BR_848_T_RXA CLIF_ANA_AGC_REG
# A0, 0D, 06, 7C, 2F, AF, 05, 80, 0F RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 7C, 30, CF, 00, 07, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 7C, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 7D, 30, CF, 00, 08, 00 RF_CLIF_CFG_BR_106_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 80, 2F, AF, 05, 80, 90 RF_CLIF_CFG_BR_212_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 80, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_212_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 84, 2F, AF, 05, 80, 92 RF_CLIF_CFG_BR_424_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 84, 44, A3, 90, 03, 00 RF_CLIF_CFG_BR_424_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 06, 88, 2F, 7F, 04, 80, 10 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 06, 88, 30, 5F, 00, 16, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 03, 88, 47, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_ANA_AGC_REG
# A0, 0D, 06, 88, 44, A1, 90, 03, 00 RF_CLIF_CFG_BR_848_T_RXB CLIF_ANA_RX_REG
# A0, 0D, 03, 0C, 48, 1F RF_CLIF_CFG_T_PASSIVE CLIF_ANA_CLK_MAN_REG
# A0, 0D, 03, 10, 43, 20 RF_CLIF_CFG_T_ACTIVE CLIF_ANA_PBF_CONTROL_REG
# A0, 0D, 06, 6A, 42, F8, 10, FF, FF RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 03, 6A, 16, 00 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 6A, 15, 01 RF_CLIF_CFG_BR_106_T_TXA_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F RF_CLIF_CFG_BR_106_T_TXA_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 06, 8C, 42, 88, 10, FF, FF RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 8C, 4A, 33, 07, 01, 07 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 8C, 16, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 8C, 15, 00 RF_CLIF_CFG_BR_212_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 92, 42, 90, 10, FF, FF RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_AMPLITUDE_REG
# A0, 0D, 06, 92, 4A, 31, 07, 01, 07 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_ANA_TX_SHAPE_CONTROL_REG
# A0, 0D, 03, 92, 16, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_UNDERSHOOT_CONFIG_REG
# A0, 0D, 03, 92, 15, 00 RF_CLIF_CFG_BR_424_T_TXF_A CLIF_TX_OVERSHOOT_CONFIG_REG
# A0, 0D, 06, 0A, 30, CF, 00, 08, 00 RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_THRESHOLD_REG
# A0, 0D, 06, 0A, 2F, 8F, 05, 80, 0C RF_CLIF_CFG_I_ACTIVE CLIF_SIGPRO_ADCBCM_CONFIG_REG
# A0, 0D, 03, 0A, 48, 10 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_CLK_MAN_REG
# A0, 0D, 06, 0A, 44, A3, 90, 03, 00 RF_CLIF_CFG_I_ACTIVE CLIF_ANA_RX_REG
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_1={
20, 02, F3, 20,
A0, 0D, 03, 00, 40, 03,
A0, 0D, 03, 04, 43, 20,
A0, 0D, 03, 04, FF, 05,
A0, 0D, 06, 06, 44, A3, 90, 03, 00,
A0, 0D, 06, 06, 30, CF, 00, 08, 00,
A0, 0D, 06, 06, 2F, 8F, 05, 80, 0C,
A0, 0D, 04, 06, 03, 00, 71,
A0, 0D, 03, 06, 48, 18,
A0, 0D, 03, 06, 43, A0,
A0, 0D, 06, 06, 42, 00, 00, F1, F6,
A0, 0D, 06, 06, 41, 80, 00, 00, 00,
A0, 0D, 03, 06, 37, 18,
A0, 0D, 03, 06, 16, 00,
A0, 0D, 03, 06, 15, 00,
A0, 0D, 06, 06, FF, 05, 00, 00, 00,
A0, 0D, 06, 08, 44, 00, 00, 00, 00,
A0, 0D, 06, 20, 4A, 00, 00, 00, 00,
A0, 0D, 06, 20, 42, 88, 10, FF, FF,
A0, 0D, 03, 20, 16, 00,
A0, 0D, 03, 20, 15, 00,
A0, 0D, 06, 22, 44, 22, 00, 02, 00,
A0, 0D, 06, 22, 2D, 50, 44, 0C, 00,
A0, 0D, 04, 32, 03, 40, 3D,
A0, 0D, 06, 32, 42, F8, 10, FF, FF,
A0, 0D, 03, 32, 16, 00,
A0, 0D, 03, 32, 15, 01,
A0, 0D, 03, 32, 0D, 22,
A0, 0D, 03, 32, 14, 22,
A0, 0D, 06, 32, 4A, 30, 07, 01, 1F,
A0, 0D, 06, 34, 2D, 24, 77, 0C, 00,
A0, 0D, 06, 34, 34, 00, 00, E4, 03,
A0, 0D, 06, 34, 44, 21, 00, 02, 00
}
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_2={
20, 02, F4, 1F,
A0, 0D, 06, 35, 44, 21, 00, 02, 00,
A0, 0D, 06, 38, 4A, 53, 07, 01, 1B,
A0, 0D, 06, 38, 42, 68, 10, FF, FF,
A0, 0D, 03, 38, 16, 00,
A0, 0D, 03, 38, 15, 00,
A0, 0D, 06, 3A, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 3C, 4A, 52, 07, 01, 1B,
A0, 0D, 06, 3C, 42, 68, 10, FF, FF,
A0, 0D, 03, 3C, 16, 00,
A0, 0D, 03, 3C, 15, 00,
A0, 0D, 06, 3E, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 40, 42, F0, 10, FF, FF,
A0, 0D, 03, 40, 0D, 02,
A0, 0D, 03, 40, 14, 02,
A0, 0D, 06, 40, 4A, 12, 07, 00, 00,
A0, 0D, 03, 40, 16, 00,
A0, 0D, 03, 40, 15, 00,
A0, 0D, 06, 42, 2D, 15, 47, 0D, 00,
A0, 0D, 06, 46, 44, 21, 00, 02, 00,
A0, 0D, 06, 46, 2D, 05, 47, 0E, 00,
A0, 0D, 06, 44, 4A, 33, 07, 01, 07,
A0, 0D, 06, 44, 42, 88, 10, FF, FF,
A0, 0D, 03, 44, 16, 00,
A0, 0D, 03, 44, 15, 00,
A0, 0D, 06, 4A, 44, 22, 00, 02, 00,
A0, 0D, 06, 4A, 2D, 05, 37, 0C, 00,
A0, 0D, 06, 48, 4A, 33, 07, 01, 07,
A0, 0D, 06, 48, 42, 88, 10, FF, FF,
A0, 0D, 03, 48, 16, 00,
A0, 0D, 03, 48, 15, 00,
A0, 0D, 06, 4E, 44, 22, 00, 02, 00
}
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_3={
20, 02, F7, 1E,
A0, 0D, 06, 4E, 2D, 05, 37, 0C, 00,
A0, 0D, 06, 4C, 4A, 33, 07, 01, 07,
A0, 0D, 06, 4C, 42, 88, 10, FF, FF,
A0, 0D, 03, 4C, 16, 00,
A0, 0D, 03, 4C, 15, 00,
A0, 0D, 06, 52, 44, 22, 00, 02, 00,
A0, 0D, 06, 52, 2D, 05, 25, 0C, 00,
A0, 0D, 06, 50, 42, 90, 10, FF, FF,
A0, 0D, 06, 50, 4A, 11, 0F, 01, 07,
A0, 0D, 03, 50, 16, 00,
A0, 0D, 03, 50, 15, 00,
A0, 0D, 06, 56, 2D, 05, 9E, 0C, 00,
A0, 0D, 06, 56, 44, 22, 00, 02, 00,
A0, 0D, 06, 5C, 2D, 05, 69, 0C, 00,
A0, 0D, 06, 5C, 44, 21, 00, 02, 00,
A0, 0D, 06, 54, 42, 88, 10, FF, FF,
A0, 0D, 06, 54, 4A, 33, 07, 01, 07,
A0, 0D, 03, 54, 16, 00,
A0, 0D, 03, 54, 15, 00,
A0, 0D, 06, 5A, 42, 90, 10, FF, FF,
A0, 0D, 06, 5A, 4A, 31, 07, 01, 07,
A0, 0D, 03, 5A, 16, 00,
A0, 0D, 03, 5A, 15, 00,
A0, 0D, 06, 98, 2F, AF, 05, 80, 0F,
A0, 0D, 06, 9A, 42, 00, 00, F1, F6,
A0, 0D, 06, 30, 44, A3, 90, 03, 00,
A0, 0D, 06, 6C, 44, A3, 90, 03, 00,
A0, 0D, 06, 6C, 30, CF, 00, 08, 00,
A0, 0D, 06, 6C, 2F, 8F, 05, 80, 0C,
A0, 0D, 06, 70, 2F, 8F, 05, 80, 12
}
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_4={
20, 02, F7, 1E,
A0, 0D, 06, 70, 30, CF, 00, 08, 00,
A0, 0D, 06, 74, 2F, 8F, 05, 80, 12,
A0, 0D, 06, 74, 30, DF, 00, 07, 00,
A0, 0D, 06, 78, 2F, 1F, 06, 80, 01,
A0, 0D, 06, 78, 30, 3F, 00, 04, 00,
A0, 0D, 06, 78, 44, A2, 90, 03, 00,
A0, 0D, 03, 78, 47, 00,
A0, 0D, 06, 7C, 2F, AF, 05, 80, 0F,
A0, 0D, 06, 7C, 30, CF, 00, 07, 00,
A0, 0D, 06, 7C, 44, A3, 90, 03, 00,
A0, 0D, 06, 7D, 30, CF, 00, 08, 00,
A0, 0D, 06, 80, 2F, AF, 05, 80, 90,
A0, 0D, 06, 80, 44, A3, 90, 03, 00,
A0, 0D, 06, 84, 2F, AF, 05, 80, 92,
A0, 0D, 06, 84, 44, A3, 90, 03, 00,
A0, 0D, 06, 88, 2F, 7F, 04, 80, 10,
A0, 0D, 06, 88, 30, 5F, 00, 16, 00,
A0, 0D, 03, 88, 47, 00,
A0, 0D, 06, 88, 44, A1, 90, 03, 00,
A0, 0D, 03, 0C, 48, 18,
A0, 0D, 03, 10, 43, 20,
A0, 0D, 06, 6A, 42, F8, 10, FF, FF,
A0, 0D, 03, 6A, 16, 00,
A0, 0D, 03, 6A, 15, 01,
A0, 0D, 06, 6A, 4A, 30, 0F, 01, 1F,
A0, 0D, 06, 8C, 42, 88, 10, FF, FF,
A0, 0D, 06, 8C, 4A, 33, 07, 01, 07,
A0, 0D, 03, 8C, 16, 00,
A0, 0D, 03, 8C, 15, 00,
A0, 0D, 06, 92, 42, 90, 10, FF, FF
}
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_5={
20, 02, 37, 07,
A0, 0D, 06, 92, 4A, 31, 07, 01, 07,
A0, 0D, 03, 92, 16, 00,
A0, 0D, 03, 92, 15, 00,
A0, 0D, 06, 0A, 30, CF, 00, 08, 00,
A0, 0D, 06, 0A, 2F, 8F, 05, 80, 0C,
A0, 0D, 03, 0A, 48, 10,
A0, 0D, 06, 0A, 44, A3, 90, 03, 00
}
# *** ALM(NO BOOSTER) FW VERSION = 08.01.1F ***
NXP_RF_CONF_BLK_6={
}
###############################################################################
# Core configuration extensions
# It includes
# A002 - Clock Request
# 0x00 - Disabled
# 0x01 - Enabled
# A003 - Clock Selection
# Please refer to User Manual
# A004 - Clock Time Out
# Defined in ms
# A00E - Load Modulation Mode
# 0x00 - PLM
# 0x01 - ALM
# A011 - Clock specific configuration
# Please refer to User Manual
# A012 - NFCEE interface 2 configuration
# 0x00 - SWP 2 interface is used
# 0x02 - DWP interface is used
# A013 - TVdd configuration
# 0x00 - TVdd is set to 3.1V in Poll mode
# 0x02 - TVdd is set to 2.7V in Poll mode
# A040-A043 - Low Power Card Detector
# Please refer to Application Note of LPCD
# A05E - Jewel Reader
# 0x00 - RID is not sent during activation
# 0x01 - RID is sent during activation
# A061 - Retry after LPCD
# 0b0000XXXX - Number of retry if activation failed
# 0bXXXX0000 - Duration to wait before retry (10ms per step)
# Please refer to User Manual
# A0CD - SWP interface 1: S1 line behavior
# Defined S1 High time-out during Activation sequence
# A0EC - SWP1 interface
# 0x00 - Disabled
# 0x01 - Enabled
# A0ED - SWP2 interface
# 0x00 - Disabled
# 0x01 - Enabled
NXP_CORE_CONF_EXTN={20, 02, 40, 0F,
A0, 02, 01, 01,
A0, 04, 01, 0A,
A0, 0E, 01, 01,
A0, 11, 04, 01, 22, 67, CD,
A0, 12, 01, 00,
A0, 13, 01, 00,
A0, 40, 01, 01,
A0, 41, 01, 02,
A0, 42, 01, 19,
A0, 43, 01, 00,
A0, 5E, 01, 01,
A0, 61, 01, 00,
A0, CD, 01, 0F,
A0, EC, 01, 01,
A0, ED, 01, 00
}
###############################################################################
# Core configuration settings
# It includes
# 18 - Poll Mode NFC-F: PF_BIT_RATE
# 21 - Poll Mode ISO-DEP: PI_BIT_RATE
# 28 - Poll Mode NFC-DEP: PN_NFC_DEP_SPEED
# 30 - Lis. Mode NFC-A: LA_BIT_FRAME_SDD
# 31 - Lis. Mode NFC-A: LA_PLATFORM_CONFIG
# 33 - Lis. Mode NFC-A: LA_SEL_INFO
# 50 - Lis. Mode NFC-F: LF_PROTOCOL_TYPE
# 54 - Lis. Mode NFC-F: LF_CON_BITR_F
# 5B - Lis. Mode ISO-DEP: LI_BIT_RATE
# 60 - Lis. Mode NFC-DEP: LN_WT
# 80 - Other Param.: RF_FIELD_INFO
# 81 - Other Param.: RF_NFCEE_ACTION
# 82 - Other Param.: NFCDEP_OP
NXP_CORE_CONF={ 20, 02, 2E, 0E,
18, 01, 01,
21, 01, 00,
28, 01, 01,
30, 01, 08,
31, 01, 03,
33, 04, 01, 02, 03, 04,
50, 01, 02,
54, 01, 06,
5B, 01, 00,
60, 01, 0E,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
3C, 01, 04
}
###############################################################################
# Mifare Classic Key settings
#NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5,
# A0, 52, 06, D3, F7, D3, F7, D3, F7,
# A0, 53, 06, FF, FF, FF, FF, FF, FF,
# A0, 54, 06, 00, 00, 00, 00, 00, 00}
###############################################################################
# Default SE Options
# No secure element 0x00
# eSE 0x01
# UICC 0x02
# MULTI_SE 0x03
NXP_DEFAULT_SE=0x02
###############################################################################
NXP_DEFAULT_NFCEE_TIMEOUT=0x06
###############################################################################
#Enable SWP full power mode when phone is power off
NXP_SWP_FULL_PWR_ON=0x00
###############################################################################
#Chip type
#PN547C2 0x01
#PN65T 0x02
NXP_NFC_CHIP=0x01

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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
$(call inherit-product, device/samsung/klte-common/nfc/product.mk)
PRODUCT_PACKAGES += \
android.hardware.nfc@1.0-impl \
libpn547_fw \
nfc_nci.msm8974
PRODUCT_COPY_FILES += \
device/samsung/klte-common/nfc/pn547/libnfc-brcm.conf:system/vendor/etc/libnfc-brcm.conf \
device/samsung/klte-common/nfc/pn547/libnfc-nxp.conf:system/vendor/etc/libnfc-nxp.conf

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#
# Copyright 2016 The CyanogenMod Project
# Copyright 2017-2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
LOCAL_PATH := $(call my-dir)
include $(CLEAR_VARS)
LOCAL_SRC_FILES := libpn547_fw.c
LOCAL_MODULE := libpn547_fw
LOCAL_MODULE_OWNER := nxp
LOCAL_MODULE_PATH := $(TARGET_OUT_VENDOR)/firmware
LOCAL_MODULE_TAGS := optional
LOCAL_PACK_MODULE_RELOCATIONS := false
include $(BUILD_SHARED_LIBRARY)

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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
PRODUCT_PACKAGES += \
com.android.nfc_extras \
NfcNci \
Tag
PRODUCT_COPY_FILES += \
device/samsung/klte-common/nfc/nfcee_access.xml:system/vendor/etc/nfcee_access.xml
# NFC Permissions
PRODUCT_COPY_FILES += \
frameworks/native/data/etc/android.hardware.nfc.xml:system/etc/permissions/android.hardware.nfc.xml \
frameworks/native/data/etc/android.hardware.nfc.hce.xml:system/etc/permissions/android.hardware.nfc.hce.xml \
frameworks/native/data/etc/com.android.nfc_extras.xml:system/etc/permissions/com.android.nfc_extras.xml

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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
DEVICE_MANIFEST_FILE += $(COMMON_PATH)/nfc/manifest-passthrough.xml

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############################
## NFC device is going to sleep mode after SLEEP_TIMEOUT(ms) and the device needs
## wakeup delay(ms) when it is going to wake up from sleep mode.
SLEEP_TIMEOUT=1000
WAKEUP_DELAY=80
############################
## Pathes
## F/W image
FW_IMAGE="/vendor/firmware/sec_s3fwrn5_firmware.bin"
#FW_IMAGE="/vendor/firmware/sec_s3frrn3_firmware.bin"
## Reg file
RFREG_FILE="/vendor/firmware/sec_s3fwrn5_rfreg.bin"
## Power driver
POWER_DRIVER="/dev/sec-nfc"
## Transport driver
TRANS_DRIVER="/dev/sec-nfc"
#TRANS_DRIVER="/dev/ttySAC0"
############################
## TRACE_LEVEL (0: only err, 1: and debug, 2: trace also)
## DATA TRACE level (0: not display, 1: simply, 2: all of data trace)
TRACE_LEVEL=2
DATA_TRACE=2
############################
## force F/W download
FW_UPDATE_MODE=0
FW_CFG_CLK_TYPE=0x10
FW_CFG_CLK_SPEED=0x01
FW_CFG_CLK_REQ=0x01
############################
## RF register
## RF register ID1 Card mode
# RF_REG1=0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x22 0xB8 0x30 0x72 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x30 0x72 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x30 0x6A 0xD8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x20 0x78 0x30 0x6A 0xD8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x22 0xB8 0x30 0x50 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x30 0x50 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x30 0x38 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x30 0xCA 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x24 0x38 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x21 0x38 0x24 0x0A 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x22 0xB8 0x30 0x50 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x20 0x22 0xB8 0x30 0x50 0xC8
### RF register ID2 Reader mode
#RF_REG2=0xD0 0xD0 0xBB 0x00 0x26 0x5E 0xD8 0x00 0xFE 0xCB 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0x00 0xFE 0xCF 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0x00 0xFE 0xCF 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0x00 0xFE 0xCF 0x00 0x1D 0xF0 0x00 0x27 \
# 0xD8 0xD8 0xBB 0xE0 0x06 0x5E 0xD8 0x00 0xFE 0xCF 0x00 0x1D 0x30 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0xAE 0x51 0x4B 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0xAE 0x51 0x4F 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0xAE 0x51 0x4F 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0xAE 0x51 0x4F 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0xE3 0xC4 0xDF 0x00 0xAE 0x51 0x4B 0x00 0x1D 0xF0 0x00 0x27 \
# 0xC0 0xC0 0xB0 0x03 0xE8 0x59 0x00 0xAE 0x51 0x4B 0x00 0x1D 0xF0 0x00 0x27 \
# 0xD8 0xD8 0xBB 0x00 0x24 0x88 0xD8 0x00 0xFE 0xCB 0x00 0x1D 0xF0 0x00 0x27 \
# 0xE8 0xE8 0xBB 0x00 0x24 0x28 0xD8 0x00 0xFE 0xCB 0x00 0x1D 0xF0 0x00 0x27 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xFE 0xCB 0x21 0x38 0x30 0x72 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAE 0x51 0x4B 0x21 0x38 0x38 0xB4 0xC8 \
# 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xAE 0x51 0x4B 0x21 0x38 0x38 0xB4 0xC8

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###############################################################################
# Application options
APPL_TRACE_LEVEL=0xFF
PROTOCOL_TRACE_LEVEL=0xFFFFFFFF
PRESERVE_STORAGE=1
###############################################################################
# RF register
RF_REG_DATA1={00:00:00:00:00:00:00:00:00:00:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:20:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:20:21:38:30:6A:D8:00:00:00:00:00:00:00:00:00:20:20:78:30:6A:D8:00:00:00:00:00:00:00:00:00:00:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:20:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:20:21:78:30:CA:D8:00:00:00:00:00:00:00:00:00:20:21:38:30:CA:D8:00:00:00:00:00:00:00:00:00:20:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:20:21:38:30:30:C8:00:00:00:00:00:00:00:00:00:00:21:38:30:38:C8:00:00:00:00:00:00:00:00:00:00:21:38:30:30:C8}
RF_REG_DATA2={D0:D0:B3:E0:06:68:D8:00:FE:CB:00:1D:20:00:27:D8:D8:B3:E0:26:2E:D8:00:FE:CB:00:1D:20:00:27:D8:D8:B3:E0:26:2E:D8:00:FE:CB:00:1D:20:00:27:D8:D8:B3:E0:26:2E:D8:00:FE:CB:00:1D:20:00:27:D8:D8:B3:E0:26:5E:D8:00:FE:CF:00:1D:20:00:27:D0:D0:B0:E3:E8:69:00:AE:51:4B:00:1D:20:00:27:C0:C0:B0:E3:E8:59:00:AE:51:4F:00:1D:20:00:27:C0:C0:B0:E3:E8:59:00:AE:51:4F:00:1D:20:00:27:C0:C0:B0:E3:E8:59:00:AE:51:4F:00:1D:20:00:27:C0:C0:B0:E3:E8:DF:00:AE:51:4B:00:1D:20:00:27:C0:C0:B0:E3:E8:59:00:AE:51:4B:00:1D:20:00:27:D0:D0:B3:E0:06:68:D8:00:FE:CB:00:1D:20:00:27:D8:D8:B3:E0:06:68:D8:00:FE:CB:00:1D:20:00:27:00:00:00:00:00:00:00:00:FE:CB:21:38:70:30:C8:00:00:00:00:00:00:00:AE:51:4B:21:38:70:30:C8:00:00:00:00:00:00:00:AE:51:4B:21:38:70:30:C8}
###############################################################################
# File used for NFA storage
NFA_STORAGE="/data/nfc"
###############################################################################
# Insert a delay in milliseconds after NFC_WAKE and before write to NFCC
NFC_WAKE_DELAY=20
###############################################################################
# Various Delay settings (in ms) used in USERIAL
# POWER_ON_DELAY
# Delay after turning on chip, before writing to transport (default 300)
# PRE_POWER_OFF_DELAY
# Delay after deasserting NFC-Wake before turn off chip (default 0)
# POST_POWER_OFF_DELAY
# Delay after turning off chip, before USERIAL_close returns (default 0)
# CE3_PRE_POWER_OFF_DELAY
# Delay after deasserting NFC-Wake before turn off chip (default 1000)
# when going to CE3 Switch Off mode
#
#POWER_ON_DELAY=300
PRE_POWER_OFF_DELAY=1500
#POST_POWER_OFF_DELAY=0
#CE3_PRE_POWER_OFF_DELAY=1000
###############################################################################
# Device Manager Config
#
# If NFA_DM_CFG is not provided, stack default settings are
# used (see nfa_dm_cfg.c). They are as follows:
# 0 (FALSE) Automatic NDEF detection when background polling
# 0 (FALSE) Automatic NDEF read when background polling
#
#NFA_DM_CFG={00:00}
###############################################################################
# Default poll duration (in ms)
# The defualt is 500ms if not set (see nfc_target.h) same as M project
NFA_DM_DISC_DURATION_POLL=500
###############################################################################
# Startup Configuration (100 bytes maximum)
#
# For the 0xC2 parameter, set byte[0] to 60 to disable UICC Idle Timeout.
# set to 61 to enable (The least significant bit of this byte enables
# the power off when Idle mode).
# 20 A1 07 00 == > These 4 bytes form a 4 byte value which decides the idle timeout(in us)
# value to trigger the uicc deactivation.
# NFC forum conformance
#NFA_DM_START_UP_CFG={27:B2:04:E8:03:00:00:CF:02:02:08:CB:01:01:A5:01:01:CA:0A:00:00:00:00:06:F0:55:00:00:0F:80:01:01:B5:03:01:03:09:5B:01:02}
# GCF combined + clfCfgTagPicc
NFA_DM_START_UP_CFG={48:CB:01:09:A5:01:01:CA:14:00:00:00:00:06:0C:D4:01:00:15:C0:E1:E4:00:C0:C6:2D:00:14:00:B5:03:01:03:FF:C2:08:61:00:82:04:80:C3:C9:01:80:01:01:C9:03:03:0F:AB:5B:01:02:B2:04:E8:03:00:00:CF:02:02:08:B1:06:00:20:00:00:00:12}
###############################################################################
# Startup Vendor Specific Configuration (100 bytes maximum);
# byte[0] TLV total len = 0x5
# byte[1] NCI_MTS_CMD|NCI_GID_PROP = 0x2f
# byte[2] NCI_MSG_FRAME_LOG = 0x9
# byte[3] 2
# byte[4] 0=turn off RF frame logging; 1=turn on
# byte[5] 0=turn off SWP frame logging; 1=turn on
# NFA_DM_START_UP_VSC_CFG={05:2F:09:02:01:01}
#HW FSM
#NFA_DM_START_UP_VSC_CFG={04:2F:06:01:00}
###############################################################################
# Antenna Configuration - This data is used when setting 0xC8 config item
# at startup (before discovery is started). If not used, no value is sent.
#
# The settings for this value are documented here:
# http://wcgbu.broadcom.com/wpan/PM/Project%20Document%20Library/bcm20791B0/
# Design/Doc/PHY%20register%20settings/BCM20791-B2-1027-02_PHY_Recommended_Reg_Settings.xlsx
# This document is maintained by Paul Forshaw.
#
# The values marked as ?? should be tweaked per antenna or customer/app:
# {20:C8:1E:06:??:00:??:??:??:00:??:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:??:01:00:00:40:04}
# array[0] = 0x20 is length of the payload from array[1] to the end
# array[1] = 0xC8 is PREINIT_DSP_CFG
PREINIT_DSP_CFG={20:C8:1E:06:1F:00:0A:03:30:00:04:24:00:1C:00:75:00:77:00:76:00:1C:00:03:00:0A:00:4E:01:00:00:40:04}
###############################################################################
# Configure crystal frequency when internal LPO can't detect the frequency.
#XTAL_FREQUENCY=0
###############################################################################
# Use Nexus S NXP RC work to allow our stack/firmware to work with a retail
# Nexus S that causes IOP issues. Note, this will not pass conformance and
# should be removed for production.
#USE_NXP_P2P_RC_WORKAROUND=1
###############################################################################
# Configure the default Destination Gate used by HCI (the default is 4, which
# is the ETSI loopback gate.
#NFA_HCI_DEFAULT_DEST_GATE=0x04
###############################################################################
# Configure the single default SE to use. The default is to use the first
# SE that is detected by the stack. This value might be used when the phone
# supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use
# one of them (e.g. 0xF4).
ACTIVE_SE=0x02
###############################################################################
# Configure the NFC Extras to open and use a static pipe. If the value is
# not set or set to 0, then the default is use a dynamic pipe based on a
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
# for each UICC (where F3="UICC0" and F4="UICC1")
NFA_HCI_STATIC_PIPE_ID_F3=0x71
NFA_HCI_STATIC_PIPE_ID_F4=0x71
###############################################################################
# When disconnecting from Oberthur secure element, perform a warm-reset of
# the secure element to deselect the applet.
# The default hex value of the command is 0x3. If this variable is undefined,
# then this feature is not used.
OBERTHUR_WARM_RESET_COMMAND=0x03
###############################################################################
# Force UICC to only listen to the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B.
#UICC_LISTEN_TECH_MASK=0x03
###############################################################################
# AID for Empty Select command
# If specified, this AID will be substituted when an Empty SELECT command is
# detected. The first byte is the length of the AID. Maximum length is 16.
AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00}
###############################################################################
# Force tag polling for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B |
# NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 |
# NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_A_ACTIVE |
# NFA_TECHNOLOGY_MASK_F_ACTIVE.
#
# Notable bits:
# NFA_TECHNOLOGY_MASK_A 0x01
# NFA_TECHNOLOGY_MASK_B 0x02
# NFA_TECHNOLOGY_MASK_F 0x04
# NFA_TECHNOLOGY_MASK_ISO15693 0x08
# NFA_TECHNOLOGY_MASK_B_PRIME 0x10
# NFA_TECHNOLOGY_MASK_KOVIO 0x20
# NFA_TECHNOLOGY_MASK_A_ACTIVE 0x40
# NFA_TECHNOLOGY_MASK_F_ACTIVE 0x80
POLLING_TECH_MASK=0xEF
###############################################################################
# Force P2P to only listen for the following technology(s).
# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F |
# NFA_TECHNOLOGY_MASK_A_ACTIVE | NFA_TECHNOLOGY_MASK_F_ACTIVE
P2P_LISTEN_TECH_MASK=0xC4
###############################################################################
# Maximum Number of Credits to be allowed by the NFCC
# This value overrides what the NFCC specifices allowing the host to have
# the control to work-around transport limitations. If this value does
# not exist or is set to 0, the NFCC will provide the number of credits.
MAX_RF_DATA_CREDITS=1
###############################################################################
# This setting allows you to disable registering the T4t Virtual SE that causes
# the NFCC to send PPSE requests to the DH.
# The default setting is enabled (i.e. T4t Virtual SE is registered).
#REGISTER_VIRTUAL_SE=1
REGISTER_VIRTUAL_SE=0
###############################################################################
# When screen is turned off, specify the desired power state of the controller.
# 0: power-off-sleep state; DEFAULT
# 1: full-power state
# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used)
# 3: FPM CE in snooze mode, Switch Off, Battery Off still available.
SCREEN_OFF_POWER_STATE=3
###############################################################################
# Firmware patch file
# If the value is not set then patch download is disabled.
FW_PATCH="/vendor/firmware/sec_s3fnrn3_firmware.bin"
###############################################################################
# SPD Debug mode
# If set to 1, any failure of downloading a patch will trigger a hard-stop
#SPD_DEBUG=0
###############################################################################
# SPD Max Retry Count
# The number of attempts to download a patch before giving up (defualt is 3).
# Note, this resets after a power-cycle.
#SPD_MAX_RETRY_COUNT=3
###############################################################################
# Patch RAM Version Checking
# By default the stack will reject any attempt to download a patch where major
# version is < the one that is in NVM. If this config item is set to 1 then
# this version check is skipped.
#
#SPD_IGNORE_VERSION=0
###############################################################################
# transport driver
#
# TRANSPORT_DRIVER=<driver>
#
# where <driver> can be, for example:
# "/dev/ttyS" (UART)
# "/dev/bcmi2cnfc" (I2C)
# "hwtun" (HW Tunnel)
# "/dev/bcmspinfc" (SPI)
# "/dev/btusb0" (BT USB)
TRANSPORT_DRIVER="/dev/sec-nfc"
###############################################################################
# power control driver
# Specify a kernel driver that support ioctl commands to control NFC_EN and
# NFC_WAKE gpio signals.
#
# POWER_CONTRL_DRIVER=<driver>
# where <driver> can be, for example:
# "/dev/nfcpower"
# "/dev/bcmi2cnfc" (I2C)
# "/dev/bcmspinfc" (SPI)
# i2c and spi driver may be used to control NFC_EN and NFC_WAKE signal
POWER_CONTROL_DRIVER="/dev/sec-nfc"
###############################################################################
# I2C transport driver try to read multiple packets in read() if data is available
# remove the comment below to enable this feature
#READ_MULTIPLE_PACKETS=1
###############################################################################
# SPI transport driver options
#SPI_NEGOTIATION={0A:F0:00:01:00:00:00:FF:FF:00:00}
###############################################################################
# UART transport driver options
#
# PORT=1,2,3,...
# BAUD=115200, 19200, 9600, 4800,
# DATABITS=8, 7, 6, 5
# PARITY="even" | "odd" | "none"
# STOPBITS="0" | "1" | "1.5" | "2"
#UART_PORT=2
#UART_BAUD=115200
#UART_DATABITS=8
#UART_PARITY="none"
#UART_STOPBITS="1"
###############################################################################
# Insert a delay in microseconds per byte after a write to NFCC.
# after writing a block of data to the NFCC, delay this an amopunt of time before
# writing next block of data. the delay is calculated as below
# NFC_WRITE_DELAY * (number of byte written) / 1000 milliseconds
# e.g. after 259 bytes is written, delay (259 * 20 / 1000) 5 ms before next write
NFC_WRITE_DELAY=20
###############################################################################
# Configure the default NfcA/IsoDep techology and protocol route. Can be
# either a secure element (e.g. 0xF4) or the host (0x00)
DEFAULT_ISODEP_ROUTE=0x02
###############################################################################
# NCI Hal Module name
NCI_HAL_MODULE="nfc_nci"

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nfc/s3fwrn5/product.mk Normal file
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#
# Copyright (C) 2018 The LineageOS Project
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# NFC
$(call inherit-product, device/samsung/klte-common/nfc/product.mk)
PRODUCT_PACKAGES += \
android.hardware.nfc@1.0-impl
PRODUCT_COPY_FILES += \
device/samsung/klte-common/nfc/s3fwrn5/libnfc-sec.conf:system/vendor/etc/libnfc-brcm.conf \
device/samsung/klte-common/nfc/s3fwrn5/libnfc-sec-hal.conf:system/vendor/etc/sec-nfc.conf