android_kernel_google_msm/arch/arm/mach-vexpress/Makefile.boot

# Those numbers are used only by the non-DT V2P-CA9 platform
# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y
   zreladdr-y	+= 0x60008000
params_phys-y	:= 0x60000100
initrd_phys-y	:= 0x60800000

dtb-$(CONFIG_ARCH_VEXPRESS_DT)	+= vexpress-v2p-ca5s.dtb \
				   vexpress-v2p-ca9.dtb \
				   vexpress-v2p-ca15-tc1.dtb
ARM: vexpress: Add Device Tree support This patch adds generic Versatile Express DT machine description, Device Tree description for the motherboard and documentation for the bindings. Signed-off-by: Pawel Moll <pawel.moll@arm.com> 2012-02-23 13:04:51 +00:00			`# Those numbers are used only by the non-DT V2P-CA9 platform`
			`# The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y`
ARM: 7022/1: allow to detect conflicting zreladdrs Boards used to specify zreladdr in their Makefile.boot with zreladdr-y := x, so conflicting zreladdrs were silently overwritten. This patch changes this to zreladdr-y += x, so that we end up with multiple words in zreladdr in such a case. We can detect this later and complain if necessary. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2011-08-17 13:24:52 +00:00			`zreladdr-y += 0x60008000`
ARM: Add Versatile Express support Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2010-02-11 21:44:53 +00:00			`params_phys-y := 0x60000100`
			`initrd_phys-y := 0x60800000`
ARM: vexpress: Add Device Tree for V2P-CA5s core tile This patch adds Device Tree file for the CoreTile Express A5x2 (V2P-CA5s). Signed-off-by: Pawel Moll <pawel.moll@arm.com> 2011-12-09 18:41:27 +00:00
ARM: vexpress: Add Device Tree for V2P-CA9 core tile This patch adds Device Tree file for the CoreTile Express A9x4 (V2P-CA9). Signed-off-by: Pawel Moll <pawel.moll@arm.com> 2011-12-09 18:40:31 +00:00			`dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \`
ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant) This patch adds Device Tree file for the CoreTile Express A15x2 (V2P-CA15) with Test Chip 1. As the chip's GIC has 160 interrupt inputs and equivalent SMM (FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is increased. Signed-off-by: Pawel Moll <pawel.moll@arm.com> 2011-12-15 10:57:28 +00:00			`vexpress-v2p-ca9.dtb \`
			`vexpress-v2p-ca15-tc1.dtb`