[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
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#
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# SPI driver configuration
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#
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# NOTE: the reason this doesn't show SPI slave support is mostly that
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# nobody's needed a slave side API yet. The master-role API is not
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# fully appropriate there, so it'd need some thought to do well.
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#
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2008-04-28 09:14:16 +00:00
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menuconfig SPI
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
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bool "SPI support"
|
2008-04-28 09:14:16 +00:00
|
|
|
depends on HAS_IOMEM
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
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help
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|
The "Serial Peripheral Interface" is a low level synchronous
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protocol. Chips that support SPI can have data transfer rates
|
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up to several tens of Mbit/sec. Chips are addressed with a
|
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controller and a chipselect. Most SPI slaves don't support
|
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dynamic device discovery; some are even write-only or read-only.
|
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|
2006-11-30 04:22:59 +00:00
|
|
|
SPI is widely used by microcontrollers to talk with sensors,
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
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|
eeprom and flash memory, codecs and various other controller
|
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|
chips, analog to digital (and d-to-a) converters, and more.
|
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MMC and SD cards can be accessed using SPI protocol; and for
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DataFlash cards used in MMC sockets, SPI must always be used.
|
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SPI is one of a family of similar protocols using a four wire
|
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interface (select, clock, data in, data out) including Microwire
|
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(half duplex), SSP, SSI, and PSP. This driver framework should
|
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work with most such devices and controllers.
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|
2008-04-28 09:14:16 +00:00
|
|
|
if SPI
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|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
config SPI_DEBUG
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|
|
boolean "Debug support for SPI drivers"
|
2008-04-28 09:14:16 +00:00
|
|
|
depends on DEBUG_KERNEL
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
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help
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Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
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sysfs, and debugfs support in SPI controller and protocol drivers.
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#
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# MASTER side ... talking to discrete SPI slave chips including microcontrollers
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#
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config SPI_MASTER
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# boolean "SPI Master Support"
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boolean
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default SPI
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help
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If your system has an master-capable SPI controller (which
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provides the clock and chipselect), you can enable that
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controller and the protocol drivers for the SPI slave chips
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that are connected.
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|
2008-07-24 04:29:53 +00:00
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if SPI_MASTER
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|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
comment "SPI Master Controller Drivers"
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|
2011-02-14 02:10:43 +00:00
|
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|
config SPI_ALTERA
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tristate "Altera SPI Controller"
|
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select SPI_BITBANG
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help
|
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|
This is the driver for the Altera SPI Controller.
|
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|
2011-01-04 20:28:22 +00:00
|
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config SPI_ATH79
|
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tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
|
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depends on ATH79 && GENERIC_GPIO
|
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select SPI_BITBANG
|
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help
|
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|
|
This enables support for the SPI controller present on the
|
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Atheros AR71XX/AR724X/AR913X SoCs.
|
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|
2007-02-14 08:33:09 +00:00
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config SPI_ATMEL
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tristate "Atmel SPI Controller"
|
2008-07-24 04:29:53 +00:00
|
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depends on (ARCH_AT91 || AVR32)
|
2007-02-14 08:33:09 +00:00
|
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|
help
|
|
|
|
|
This selects a driver for the Atmel SPI Controller, present on
|
|
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|
|
many AT32 (AVR32) and AT91 (ARM) chips.
|
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|
2012-04-23 22:18:08 +00:00
|
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config SPI_BFIN5XX
|
2007-05-06 21:50:34 +00:00
|
|
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tristate "SPI controller driver for ADI Blackfin5xx"
|
2008-07-24 04:29:53 +00:00
|
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|
depends on BLACKFIN
|
2007-05-06 21:50:34 +00:00
|
|
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help
|
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|
|
This is the SPI controller master driver for Blackfin 5xx processor.
|
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|
2011-03-28 08:57:11 +00:00
|
|
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config SPI_BFIN_SPORT
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tristate "SPI bus via Blackfin SPORT"
|
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depends on BLACKFIN
|
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|
|
help
|
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|
|
|
Enable support for a SPI bus via the Blackfin SPORT peripheral.
|
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|
|
2007-05-08 07:32:25 +00:00
|
|
|
config SPI_AU1550
|
2011-11-01 19:03:30 +00:00
|
|
|
tristate "Au1550/Au1200/Au1300 SPI Controller"
|
2011-08-12 09:39:45 +00:00
|
|
|
depends on MIPS_ALCHEMY && EXPERIMENTAL
|
2007-05-08 07:32:25 +00:00
|
|
|
select SPI_BITBANG
|
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help
|
|
|
|
|
If you say yes to this option, support will be included for the
|
2011-11-01 19:03:30 +00:00
|
|
|
PSC SPI controller found on Au1550, Au1200 and Au1300 series.
|
2007-05-08 07:32:25 +00:00
|
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|
2012-02-01 10:14:09 +00:00
|
|
|
config SPI_BCM63XX
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|
|
tristate "Broadcom BCM63xx SPI controller"
|
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|
|
depends on BCM63XX
|
|
|
|
|
help
|
|
|
|
|
Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
|
|
|
|
|
|
2006-01-08 21:34:26 +00:00
|
|
|
config SPI_BITBANG
|
2009-01-06 22:41:41 +00:00
|
|
|
tristate "Utilities for Bitbanging SPI masters"
|
2006-01-08 21:34:26 +00:00
|
|
|
help
|
|
|
|
|
With a few GPIO pins, your system can bitbang the SPI protocol.
|
|
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|
|
Select this to get SPI support through I/O pins (GPIO, parallel
|
|
|
|
|
port, etc). Or, some systems' SPI master controller drivers use
|
|
|
|
|
this code to manage the per-word or per-transfer accesses to the
|
|
|
|
|
hardware shift registers.
|
|
|
|
|
|
|
|
|
|
This is library code, and is automatically selected by drivers that
|
|
|
|
|
need it. You only need to select this explicitly to support driver
|
|
|
|
|
modules that aren't part of this kernel tree.
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
|
2006-01-08 21:34:29 +00:00
|
|
|
config SPI_BUTTERFLY
|
|
|
|
|
tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on PARPORT
|
2006-01-08 21:34:29 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This uses a custom parallel port cable to connect to an AVR
|
|
|
|
|
Butterfly <http://www.atmel.com/products/avr/butterfly>, an
|
|
|
|
|
inexpensive battery powered microcontroller evaluation board.
|
|
|
|
|
This same cable can be used to flash new firmware.
|
|
|
|
|
|
2010-01-20 20:49:44 +00:00
|
|
|
config SPI_COLDFIRE_QSPI
|
|
|
|
|
tristate "Freescale Coldfire QSPI controller"
|
|
|
|
|
depends on (M520x || M523x || M5249 || M527x || M528x || M532x)
|
|
|
|
|
help
|
|
|
|
|
This enables support for the Coldfire QSPI controller in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2009-12-16 22:02:18 +00:00
|
|
|
config SPI_DAVINCI
|
2010-10-12 06:28:02 +00:00
|
|
|
tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
|
2012-02-23 09:37:55 +00:00
|
|
|
depends on ARCH_DAVINCI
|
2009-12-16 22:02:18 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
2010-10-12 06:28:02 +00:00
|
|
|
SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
|
|
|
|
|
|
2010-05-06 04:47:04 +00:00
|
|
|
config SPI_EP93XX
|
|
|
|
|
tristate "Cirrus Logic EP93xx SPI controller"
|
|
|
|
|
depends on ARCH_EP93XX
|
|
|
|
|
help
|
|
|
|
|
This enables using the Cirrus EP93xx SPI controller in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2009-01-06 22:41:41 +00:00
|
|
|
config SPI_GPIO
|
|
|
|
|
tristate "GPIO-based bitbanging SPI Master"
|
|
|
|
|
depends on GENERIC_GPIO
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
|
|
|
|
|
interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
|
|
|
|
|
slaves connected to a bus using this driver are configured as usual,
|
|
|
|
|
except that the spi_board_info.controller_data holds the GPIO number
|
|
|
|
|
for the chipselect used by this controller driver.
|
|
|
|
|
|
|
|
|
|
Note that this driver often won't achieve even 1 Mbit/sec speeds,
|
|
|
|
|
making it unusually slow for SPI. If your platform can inline
|
|
|
|
|
GPIO operations, you should be able to leverage that for better
|
|
|
|
|
speed with a custom version of this driver; see the source code.
|
|
|
|
|
|
2009-09-22 23:46:02 +00:00
|
|
|
config SPI_IMX
|
|
|
|
|
tristate "Freescale i.MX SPI controllers"
|
|
|
|
|
depends on ARCH_MXC
|
|
|
|
|
select SPI_BITBANG
|
2010-09-09 09:12:12 +00:00
|
|
|
default m if IMX_HAVE_PLATFORM_SPI_IMX
|
2009-09-22 23:46:02 +00:00
|
|
|
help
|
|
|
|
|
This enables using the Freescale i.MX SPI controllers in master
|
|
|
|
|
mode.
|
|
|
|
|
|
2007-07-17 11:04:05 +00:00
|
|
|
config SPI_LM70_LLP
|
|
|
|
|
tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on PARPORT && EXPERIMENTAL
|
2007-07-17 11:04:05 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This driver supports the NS LM70 LLP Evaluation Board,
|
|
|
|
|
which interfaces to an LM70 temperature sensor using
|
|
|
|
|
a parallel port.
|
|
|
|
|
|
2009-11-04 22:34:18 +00:00
|
|
|
config SPI_MPC52xx
|
|
|
|
|
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
|
2011-11-13 21:52:40 +00:00
|
|
|
depends on PPC_MPC52xx
|
2009-11-04 22:34:18 +00:00
|
|
|
help
|
|
|
|
|
This drivers supports the MPC52xx SPI controller in master SPI
|
|
|
|
|
mode.
|
|
|
|
|
|
2007-05-11 05:22:52 +00:00
|
|
|
config SPI_MPC52xx_PSC
|
|
|
|
|
tristate "Freescale MPC52xx PSC SPI controller"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on PPC_MPC52xx && EXPERIMENTAL
|
2007-05-11 05:22:52 +00:00
|
|
|
help
|
|
|
|
|
This enables using the Freescale MPC52xx Programmable Serial
|
|
|
|
|
Controller in master SPI mode.
|
|
|
|
|
|
2010-04-30 13:21:27 +00:00
|
|
|
config SPI_MPC512x_PSC
|
|
|
|
|
tristate "Freescale MPC512x PSC SPI controller"
|
2012-02-23 09:37:55 +00:00
|
|
|
depends on PPC_MPC512x
|
2010-04-30 13:21:27 +00:00
|
|
|
help
|
|
|
|
|
This enables using the Freescale MPC5121 Programmable Serial
|
|
|
|
|
Controller in SPI master mode.
|
|
|
|
|
|
2010-10-12 10:18:31 +00:00
|
|
|
config SPI_FSL_LIB
|
|
|
|
|
tristate
|
|
|
|
|
depends on FSL_SOC
|
|
|
|
|
|
2010-10-12 10:18:30 +00:00
|
|
|
config SPI_FSL_SPI
|
2011-12-07 20:18:16 +00:00
|
|
|
bool "Freescale SPI controller"
|
2009-06-18 23:48:59 +00:00
|
|
|
depends on FSL_SOC
|
2010-10-12 10:18:31 +00:00
|
|
|
select SPI_FSL_LIB
|
2006-05-20 22:00:15 +00:00
|
|
|
help
|
2010-10-12 10:18:30 +00:00
|
|
|
This enables using the Freescale SPI controllers in master mode.
|
|
|
|
|
MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
|
|
|
|
|
MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
|
2006-05-20 22:00:15 +00:00
|
|
|
|
spi/fsl_spi: add eSPI controller support
Add eSPI controller support based on the library code spi_fsl_lib.c.
The eSPI controller is newer controller 85xx/Pxxx devices supported.
There're some differences comparing to the SPI controller:
1. Has different register map and different bit definition
So leave the code operated the register to the driver code, not
the common code.
2. Support 4 dedicated chip selects
The software can't controll the chip selects directly, The SPCOM[CS]
field is used to select which chip selects is used, and the
SPCOM[TRANLEN] field is set to tell the controller how long the CS
signal need to be asserted. So the driver doesn't need the chipselect
related function when transfering data, just set corresponding register
fields to controll the chipseclect.
3. Different Transmit/Receive FIFO access register behavior
For SPI controller, the Tx/Rx FIFO access register can hold only
one character regardless of the character length, but for eSPI
controller, the register can hold 4 or 2 characters according to
the character lengths. Access the Tx/Rx FIFO access register of the
eSPI controller will shift out/in 4/2 characters one time. For SPI
subsystem, the command and data are put into different transfers, so
we need to combine all the transfers to one transfer in order to pass
the transfer to eSPI controller.
4. The max transaction length limitation
The max transaction length one time is limitted by the SPCOM[TRANSLEN]
field which is 0xFFFF. When used mkfs.ext2 command to create ext2
filesystem on the flash, the read length will exceed the max value of
the SPCOM[TRANSLEN] field.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12 10:18:32 +00:00
|
|
|
config SPI_FSL_ESPI
|
2011-12-07 20:18:16 +00:00
|
|
|
bool "Freescale eSPI controller"
|
spi/fsl_spi: add eSPI controller support
Add eSPI controller support based on the library code spi_fsl_lib.c.
The eSPI controller is newer controller 85xx/Pxxx devices supported.
There're some differences comparing to the SPI controller:
1. Has different register map and different bit definition
So leave the code operated the register to the driver code, not
the common code.
2. Support 4 dedicated chip selects
The software can't controll the chip selects directly, The SPCOM[CS]
field is used to select which chip selects is used, and the
SPCOM[TRANLEN] field is set to tell the controller how long the CS
signal need to be asserted. So the driver doesn't need the chipselect
related function when transfering data, just set corresponding register
fields to controll the chipseclect.
3. Different Transmit/Receive FIFO access register behavior
For SPI controller, the Tx/Rx FIFO access register can hold only
one character regardless of the character length, but for eSPI
controller, the register can hold 4 or 2 characters according to
the character lengths. Access the Tx/Rx FIFO access register of the
eSPI controller will shift out/in 4/2 characters one time. For SPI
subsystem, the command and data are put into different transfers, so
we need to combine all the transfers to one transfer in order to pass
the transfer to eSPI controller.
4. The max transaction length limitation
The max transaction length one time is limitted by the SPCOM[TRANSLEN]
field which is 0xFFFF. When used mkfs.ext2 command to create ext2
filesystem on the flash, the read length will exceed the max value of
the SPCOM[TRANSLEN] field.
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-12 10:18:32 +00:00
|
|
|
depends on FSL_SOC
|
|
|
|
|
select SPI_FSL_LIB
|
|
|
|
|
help
|
|
|
|
|
This enables using the Freescale eSPI controllers in master mode.
|
|
|
|
|
From MPC8536, 85xx platform uses the controller, and all P10xx,
|
|
|
|
|
P20xx, P30xx,P40xx, P50xx uses this controller.
|
|
|
|
|
|
2011-02-14 02:20:39 +00:00
|
|
|
config SPI_OC_TINY
|
|
|
|
|
tristate "OpenCores tiny SPI"
|
|
|
|
|
depends on GENERIC_GPIO
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This is the driver for OpenCores tiny SPI master controller.
|
|
|
|
|
|
2007-02-12 08:52:37 +00:00
|
|
|
config SPI_OMAP_UWIRE
|
|
|
|
|
tristate "OMAP1 MicroWire"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on ARCH_OMAP1
|
2007-02-12 08:52:37 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This hooks up to the MicroWire controller on OMAP1 chips.
|
|
|
|
|
|
2007-07-17 11:04:13 +00:00
|
|
|
config SPI_OMAP24XX
|
2010-05-14 19:05:25 +00:00
|
|
|
tristate "McSPI driver for OMAP"
|
|
|
|
|
depends on ARCH_OMAP2PLUS
|
2007-07-17 11:04:13 +00:00
|
|
|
help
|
2010-05-14 19:05:25 +00:00
|
|
|
SPI master controller for OMAP24XX and later Multichannel SPI
|
2007-07-17 11:04:13 +00:00
|
|
|
(McSPI) modules.
|
2007-02-12 08:52:39 +00:00
|
|
|
|
2009-12-13 08:02:11 +00:00
|
|
|
config SPI_OMAP_100K
|
|
|
|
|
tristate "OMAP SPI 100K"
|
2012-02-23 09:37:55 +00:00
|
|
|
depends on ARCH_OMAP850 || ARCH_OMAP730
|
2009-12-13 08:02:11 +00:00
|
|
|
help
|
|
|
|
|
OMAP SPI 100K master controller for omap7xx boards.
|
|
|
|
|
|
2008-08-05 20:01:09 +00:00
|
|
|
config SPI_ORION
|
|
|
|
|
tristate "Orion SPI master (EXPERIMENTAL)"
|
|
|
|
|
depends on PLAT_ORION && EXPERIMENTAL
|
|
|
|
|
help
|
|
|
|
|
This enables using the SPI master controller on the Orion chips.
|
|
|
|
|
|
2009-06-09 07:11:42 +00:00
|
|
|
config SPI_PL022
|
2011-05-19 12:13:19 +00:00
|
|
|
tristate "ARM AMBA PL022 SSP controller"
|
|
|
|
|
depends on ARM_AMBA
|
2009-06-09 07:11:42 +00:00
|
|
|
default y if MACH_U300
|
2009-09-22 23:46:01 +00:00
|
|
|
default y if ARCH_REALVIEW
|
|
|
|
|
default y if INTEGRATOR_IMPD1
|
|
|
|
|
default y if ARCH_VERSATILE
|
2009-06-09 07:11:42 +00:00
|
|
|
help
|
|
|
|
|
This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
|
|
|
|
|
controller. If you have an embedded system with an AMBA(R)
|
|
|
|
|
bus and a PL022 controller, say Y or M here.
|
|
|
|
|
|
2009-09-22 23:45:58 +00:00
|
|
|
config SPI_PPC4xx
|
|
|
|
|
tristate "PPC4xx SPI Controller"
|
2012-02-23 09:37:55 +00:00
|
|
|
depends on PPC32 && 4xx
|
2009-09-22 23:45:58 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This selects a driver for the PPC4xx SPI Controller.
|
|
|
|
|
|
2006-03-08 07:53:24 +00:00
|
|
|
config SPI_PXA2XX
|
|
|
|
|
tristate "PXA2xx SSP SPI master"
|
2010-11-24 09:17:14 +00:00
|
|
|
depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL
|
|
|
|
|
select PXA_SSP if ARCH_PXA
|
2006-03-08 07:53:24 +00:00
|
|
|
help
|
2010-11-24 09:17:14 +00:00
|
|
|
This enables using a PXA2xx or Sodaville SSP port as a SPI master
|
|
|
|
|
controller. The driver can be configured to use any SSP port and
|
|
|
|
|
additional documentation can be found a Documentation/spi/pxa2xx.
|
|
|
|
|
|
|
|
|
|
config SPI_PXA2XX_PCI
|
|
|
|
|
def_bool SPI_PXA2XX && X86_32 && PCI
|
2006-03-08 07:53:24 +00:00
|
|
|
|
2012-03-07 05:46:25 +00:00
|
|
|
config SPI_RSPI
|
|
|
|
|
tristate "Renesas RSPI controller"
|
|
|
|
|
depends on SUPERH
|
|
|
|
|
help
|
|
|
|
|
SPI driver for Renesas RSPI blocks.
|
|
|
|
|
|
2007-02-12 08:52:36 +00:00
|
|
|
config SPI_S3C24XX
|
|
|
|
|
tristate "Samsung S3C24XX series SPI"
|
2012-02-03 05:29:23 +00:00
|
|
|
depends on ARCH_S3C24XX && EXPERIMENTAL
|
2007-07-17 11:04:09 +00:00
|
|
|
select SPI_BITBANG
|
2007-02-12 08:52:36 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for Samsung S3C24XX series ARM SoCs
|
|
|
|
|
|
2009-12-15 06:20:24 +00:00
|
|
|
config SPI_S3C24XX_FIQ
|
|
|
|
|
bool "S3C24XX driver with FIQ pseudo-DMA"
|
|
|
|
|
depends on SPI_S3C24XX
|
|
|
|
|
select FIQ
|
|
|
|
|
help
|
|
|
|
|
Enable FIQ support for the S3C24XX SPI driver to provide pseudo
|
|
|
|
|
DMA by using the fast-interrupt request framework, This allows
|
|
|
|
|
the driver to get DMA-like performance when there are either
|
|
|
|
|
no free DMA channels, or when doing transfers that required both
|
|
|
|
|
TX and RX data paths.
|
|
|
|
|
|
2009-11-30 07:39:42 +00:00
|
|
|
config SPI_S3C64XX
|
|
|
|
|
tristate "Samsung S3C64XX series type SPI"
|
2012-01-25 16:20:59 +00:00
|
|
|
depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS)
|
2011-01-12 06:00:23 +00:00
|
|
|
select S3C64XX_DMA if ARCH_S3C64XX
|
2009-11-30 07:39:42 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for Samsung S3C64XX and newer SoCs.
|
|
|
|
|
|
2009-11-26 11:10:05 +00:00
|
|
|
config SPI_SH_MSIOF
|
|
|
|
|
tristate "SuperH MSIOF SPI controller"
|
|
|
|
|
depends on SUPERH && HAVE_CLK
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for SuperH MSIOF blocks.
|
|
|
|
|
|
2011-02-15 01:30:32 +00:00
|
|
|
config SPI_SH
|
|
|
|
|
tristate "SuperH SPI controller"
|
|
|
|
|
depends on SUPERH
|
|
|
|
|
help
|
|
|
|
|
SPI driver for SuperH SPI blocks.
|
|
|
|
|
|
2008-02-06 09:38:15 +00:00
|
|
|
config SPI_SH_SCI
|
|
|
|
|
tristate "SuperH SCI SPI controller"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on SUPERH
|
2008-02-06 09:38:15 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for SuperH SCI blocks.
|
|
|
|
|
|
2012-03-02 01:10:17 +00:00
|
|
|
config SPI_SH_HSPI
|
|
|
|
|
tristate "SuperH HSPI controller"
|
|
|
|
|
depends on ARCH_SHMOBILE
|
|
|
|
|
help
|
|
|
|
|
SPI driver for SuperH HSPI blocks.
|
|
|
|
|
|
2012-02-13 09:45:38 +00:00
|
|
|
config SPI_SIRF
|
|
|
|
|
tristate "CSR SiRFprimaII SPI controller"
|
|
|
|
|
depends on ARCH_PRIMA2
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for CSR SiRFprimaII SoCs
|
|
|
|
|
|
2009-09-22 23:46:15 +00:00
|
|
|
config SPI_STMP3XXX
|
|
|
|
|
tristate "Freescale STMP37xx/378x SPI/SSP controller"
|
2012-02-23 09:37:55 +00:00
|
|
|
depends on ARCH_STMP3XXX
|
2009-09-22 23:46:15 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for Freescale STMP37xx/378x SoC SSP interface
|
|
|
|
|
|
2010-04-22 22:58:25 +00:00
|
|
|
config SPI_TEGRA
|
|
|
|
|
tristate "Nvidia Tegra SPI controller"
|
2011-12-22 23:57:57 +00:00
|
|
|
depends on ARCH_TEGRA && TEGRA_SYSTEM_DMA
|
2010-04-22 22:58:25 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for NVidia Tegra SoCs
|
|
|
|
|
|
2011-01-18 19:21:36 +00:00
|
|
|
config SPI_TI_SSP
|
|
|
|
|
tristate "TI Sequencer Serial Port - SPI Support"
|
|
|
|
|
depends on MFD_TI_SSP
|
|
|
|
|
help
|
|
|
|
|
This selects an SPI master implementation using a TI sequencer
|
|
|
|
|
serial port.
|
|
|
|
|
|
2010-10-08 18:44:49 +00:00
|
|
|
config SPI_TOPCLIFF_PCH
|
2011-10-28 00:35:21 +00:00
|
|
|
tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
|
2010-10-08 18:44:49 +00:00
|
|
|
depends on PCI
|
|
|
|
|
help
|
2010-10-08 18:56:13 +00:00
|
|
|
SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
|
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|
|
used in some x86 embedded processors.
|
2010-10-08 18:44:49 +00:00
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|
|
2011-10-28 00:35:21 +00:00
|
|
|
This driver also supports the ML7213/ML7223/ML7831, a companion chip
|
|
|
|
|
for the Atom E6xx series and compatible with the Intel EG20T PCH.
|
2011-06-07 05:50:10 +00:00
|
|
|
|
2007-07-17 11:04:15 +00:00
|
|
|
config SPI_TXX9
|
|
|
|
|
tristate "Toshiba TXx9 SPI controller"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on GENERIC_GPIO && CPU_TX49XX
|
2007-07-17 11:04:15 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for Toshiba TXx9 MIPS SoCs
|
|
|
|
|
|
2007-07-17 11:04:11 +00:00
|
|
|
config SPI_XILINX
|
2009-11-13 11:28:55 +00:00
|
|
|
tristate "Xilinx SPI controller common module"
|
2009-11-13 11:28:49 +00:00
|
|
|
depends on HAS_IOMEM && EXPERIMENTAL
|
2007-07-17 11:04:11 +00:00
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
This exposes the SPI controller IP from the Xilinx EDK.
|
|
|
|
|
|
|
|
|
|
See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
|
|
|
|
|
Product Specification document (DS464) for hardware details.
|
|
|
|
|
|
2009-11-13 11:28:55 +00:00
|
|
|
Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
|
|
|
|
|
|
2009-12-01 14:29:20 +00:00
|
|
|
config SPI_NUC900
|
|
|
|
|
tristate "Nuvoton NUC900 series SPI"
|
|
|
|
|
depends on ARCH_W90X900 && EXPERIMENTAL
|
|
|
|
|
select SPI_BITBANG
|
|
|
|
|
help
|
|
|
|
|
SPI driver for Nuvoton NUC900 series ARM SoCs
|
|
|
|
|
|
spi_qsd: Add MSM SPI driver
Including the following patches:
commit 0f7723bb09440ae69743fed38cf558a838aa9bdf
Author: Bryan Huntsman <bryanh@codeaurora.org>
Date: Thu Oct 6 23:13:56 2011 -0700
Revert "spi_qsd: GPIO configuration changes for SPI chip-select line"
This reverts commit 7eaa08b75995289a91c7dd1f3616f79227f5f923.
Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>
commit 7eaa08b75995289a91c7dd1f3616f79227f5f923
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 28 16:26:39 2011 -0600
spi_qsd: GPIO configuration changes for SPI chip-select line
The chip-select GPIO's pertaining to each slave remains in suspended
configuration until the first transfer is intiated by the slave.
Change-Id: I3aa8555289be7ce457b91a969cf03909be0965d7
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e47df9f9b932968152ab2908153e60adab4402d7
Author: Jordan Crouse <jcrouse@codeaurora.org>
Date: Mon Sep 19 11:21:16 2011 -0600
spi_qsd: Fix possible uninitialized variable
Change-Id: Ic0dedbad184046e9835cde015ad5d592f33e82a6
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
commit 4ae02c76b98f2b96bfb8c4fa02f40cfda2f16f97
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Sep 20 17:28:50 2011 -0600
spi_qsd: Fix Klocwork errors in SPI driver
Change-Id: I1fe6632e68ea625966aced37a1b140b30534e101
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 52e065ba3d86977b59937693ac7e85836cf4eca8
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Sep 1 12:12:58 2011 -0600
spi_qsd: Fix for SPI Operational State Invalid error
This error is reproted randomly when the SPI core is put
into RUN state and occurs when the ACPU clock is low.
When the timer expires, we check again to ensure that the
STATE_VALID bit is set before returning.
Change-Id: Ic8912534f4924efd999b8aa1d75a9fd19749e870
CRs-fixed: 304672
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a9a8816913e5466e06b443c42cbf8ae866b95fd1
Author: Jeff Ohlstein <johlstei@codeaurora.org>
Date: Fri Sep 2 13:55:16 2011 -0700
msm: dma: remove crci conflict checking
The crci conflict checking code was designed for a system where a crci's
mux could be changed at runtime. In reality, our chips configure these
statically, so it is not necessary.
Change-Id: I4d5f32cd8728d3c78fca8f64aed0e02b57b6afba
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
commit 36c6f1bb48af3e65db281cc7ccb913a8e81a598e
Author: Matt Wagantall <mattw@codeaurora.org>
Date: Wed Aug 17 15:44:58 2011 -0700
msm: clock: Rename all I2C/SPI clocks to 'core_clk' or "iface_clk"
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name.
Change-Id: Iab12caf4eab163773d68f1b2adc1bb4c72c69e83
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
commit 55e656e68cac78eaa367341df2e693a483a53f84
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon Jun 6 14:34:38 2011 -0700
drivers: barriers: Replace dsb() with mb()
Replace explicit dsb() calls with mb(). Now that the
generic ARM implementation defines mb() to mean (at least)
dsb(), it is appropriate to switch back to the generic
kernel version of the barriers. This is also needed for
correctness on certain targets (such as 7x27) where dsb()
is insufficient and other operations (such as outer cache
sync or writing to strongly-ordered memory) are required to
ensure proper I/O operations ordering. In some cases,
remove explicit calls to outer_sync following a barrier
since the barrier will now have an explicit outer_sync
call.
Change-Id: I2c53b8534af9c3cbac4d4d77b322f897a39e7758
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit 17194a32164b868f80ce84e313f9148d1dc77e7b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 3 18:10:09 2011 -0600
spi_qsd: GPIO configuration changes
On suspend, the SPI related GPIO's enter a low power configuration
and on resume they move to an active configuration. This helps
conserving power during power collapse.
Change-Id: I0911867e10fadcfc6950f6dddf74226bd6321c16
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 1777d88688511cd59bad7674c6a2246e0c93142b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Jun 1 16:54:07 2011 -0600
spi_qsd: Remove restriction on SPI clock speed.
When multiple slaves are connected to the SPI controller,
the driver does not allow the clock to go from lower speed
to a higher speed. This restriction is not required since
there can only be one slave listening at a time. Also,
there are no hardware limitations in doing so.
Change-Id: I4ecabfb3a1515416f050c18678cf0987dcde9d1e
CRs-fixed: 290127
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 4b7c7bfc546cb02141da9d034421aefe5635f857
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 7 14:18:42 2011 -0600
spi_qsd: Add null pointer check before dereferencing
During probe, there is no cur_msg to set the status.
Change-Id: I82e00b9d74d45c36b70078b171db1bb150d1bfac
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit bf514c766fcc2bdee680f80a2ea16c7fead0be96
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon May 16 13:37:11 2011 -0700
msm: spi: Fix access to unclocked registers
Don't program the GSBI configuration until the clocks have
been turned on.
Change-Id: Idee5f5dffcb5ed0f7de18f1e508ee8c76b618894
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit d9c248213f4cd025f3d3586f0de81e4bc44a5a54
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon May 16 16:43:08 2011 -0600
spi_qsd: Fix for SPI input overrun error
This error occurs due to a bug in the controller.
This bogus error is reported when a transition from run
to reset state occurs and if the input FIFO has an odd number
of entries.
Change-Id: I555864d4855ac6d416997da69d8bc6aee7a82178
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e99ceb5b3da7bec51be853809c25df8e32b2c1e6
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Apr 14 18:36:34 2011 -0600
spi_qsd: Multi-transfer handling
When there are mulitple SPI transfers in a message, we
default to using FIFO mode for all the transfers. As special
case, we handle a WR-WR or WR-RD transfer where we choose
between FIFO mode and DM mode based on the total length of
the transaction.
Change-Id: I6fbc1a06a22f9782db5b97c9b87cc53392a8c2fa
CRs-fixed: 276666
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 8f3d3aaa51603a929027bc820fe2d3515e959779
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Apr 19 14:19:29 2011 -0600
spi_qsd: Ensure IO operation ordering
Adding memory barriers to ensure that the writes and reads
to the SPI and QUP registers happen in the correct order.
Change-Id: I86d8f63b0e9547a2339ee4ab5c713cf8864fef04
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 36b3fae5f54230cd1e4ca072d1f55cb2f79d8945
Author: Laura Abbott <lauraa@codeaurora.org>
Date: Thu Oct 14 12:48:16 2010 -0700
spi_qsd: Fix section mismatch
The function msm_spi_probe is referenced outside of the __init section.
This fixes the problem by calling platform_driver_probe instead of
platform_driver_register since this device is not hotplugable.
Change-Id: I3a563c6fc562ada959317b54ff60a38f9ce517d8
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
commit dc2e36eecefb6628031afeff28afd9d97f2f3f6f
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 29 16:58:20 2010 -0600
spi_qsd: Changes to support DM mode.
The dma_config function may not always be present.
This change makes sure the driver gets DM resources
irrespective of the dma_config function.
Change-Id: I25a2497d20e973f22b76f2b5d6f68c86bd4d5f1d
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a39bd4a398674c320925540eec91d94d2b7d53f3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Aug 19 17:48:01 2010 -0600
spi_qsd: Modify timeout mechanism to check SPI state valid bit.
In order to allow sufficient time for the SPI state
transition to occur, calculate the timeout based on
the SPI clock speed.
Change-Id: I3d6955b2a64a8bf8980590e352fbd564250210fb
CRs-fixed: 250998
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b5887b644ba9545672d637985713c7e0e2e5bb50
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Aug 3 16:57:33 2010 -0600
spi_qsd: Use FIFO mode when DM mode configuration fails.
When the Data Mover configuration fails, the driver
uses FIFO mode.
Change-Id: Iaf83e50fe725654c58260c5cd1150cdeb56f51c8
CRs-fixed: 249238
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit ced8ad320d480006643a3aa3474f5c0d77457454
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon Jun 28 16:01:33 2010 -0600
spi_qsd: Use SW timeout instead of SPI_TIME_OUT register.
Since the software timeout is already present in the driver,
the hardware SPI_TIME_OUT register is being removed.It is just
redundant and used only for debugging purposes.
Change-Id: I829cb944444fc3e5053bc810adffe2b87f511b63
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 35e9155f59317e8ef63b8ce5190f26f5cae6a8ee
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 25 16:48:25 2010 -0600
spi_qsd: Disable irqs in the probe function.
The irqs are disabled at all times in the probe function
irrespective of the use of remote lock.
Change-Id: I0997d07b93c97a12bca6d80a9bba59682b1bec3e
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e6af92d74a35ba267125bc61c2c6c18034c03af3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 22 12:20:46 2010 -0600
spi_qsd: Disable clocks and irqs when SPI bus is not in use.
The SPI clocks and irqs are enabled per workqueue and correspondingly
disabled once the workqueue is completed.
Change-Id: Ib22b7e3b946eb4c829940e43327caaf5aff7721b
CRs-fixed: 242866
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b25e4220efdacc231cb150fc263af1e3f525b165
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Jun 8 15:25:47 2010 +0300
spi_qsd: Add usage of MX_WRITE_COUNT register
Use MX_WRITE_COUNT register to reduce the amount of TX interrupts in
FIFO mode for transfers smaller than FIFO size.
Change-Id: I7208fdc85b626a31a8b781ee5c56f73beee6c427
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 7ed56f3441c5ebe7fd8107fb8468207a88bc743f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Jun 9 16:14:44 2010 +0300
spi_qsd: Minor changes to support Data Mover mode on QUPe core
Minor changes to support Data Mover made on QUPe core.
Change-Id: I54663115a43f7fd9b52a2ddee796b5499d5f239a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a85fd0ab6484eb2ef404c062adffce1ee22337f1
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Jun 3 13:57:02 2010 +0300
spi_qsd: Add support for QUPe controller
QUPe controller is a new version of Qualcomm SPI controller. The
controller also supports other peripheral protocols, however its SPI
functionality is very similar to previous SPI core, supported by spi_qsd.
Therefore the same driver is being utilized with some register address
modification and minor flow change.
Change-Id: Ic091ef2c2ed699b43f786c278b613e69a7e9039b
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit ce270f6f9198cf40ee5638b35e595da81116241e
Author: Jeff Ohlstein <johlstei@quicinc.com>
Date: Thu Apr 29 13:40:53 2010 -0700
drivers: spi: Support ADM3 in spi_qsd driver
Change-Id: I6dfa38a4c33a8e4619d56ce30787e1aeafc8356d
Signed-off-by: Jeff Ohlstein <johlstei@quicinc.com>
commit 47346fa611773ef92d12d9145ea33a7f2c79052f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 28 11:33:15 2010 +0300
spi_qsd: Add disable/enable of pclk to suspend/resume functions
Add disable/enable of pclk to suspend/resume functions to improve
power performance.
Change-Id: I871e5ac90a998f2942778bb1e8c2c9d583a9ae00
CRs-fixed: 235046
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a96eba98fbbd21ac657f5d551466909352766ead
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:40:37 2010 +0300
spi_qsd: Making irq code implicit for the core mode in use
Make code clear regarding what mode is in use in the irq.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 6a02d85f8f48cf6f86cddc38c9fce9c1179208b4
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Apr 13 21:16:45 2010 +0300
spi_qsd: Separate tx/rx/error statistics between contexts
To improve SMP safety, separate the tx/error statistics between
contexts. This protects the statistics from accidentally being
access from another context at the same time.
Change-Id: Ibc52406e7b06a4bb5142f8a09a2f35442cb9df8a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 31f301c171aab8e42f8b6abe9b7866412cb546a8
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Mar 23 14:51:00 2010 +0200
spi_qsd: Add better handling for pending transfers during suspend
To improve SMP safety, add better handling in suspend function to wait
for graceful closure of pending transfers. This graceful closure waits
for all the pending transfers to finish or timeout, while not allowing new
ones to queue up. This allows correct handling of all the resources
involved in a transfer before suspend.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 8fbf6e4c5371520b5f9de2001e2ebd15773e918b
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Mar 25 10:44:10 2010 +0200
spi_qsd: Add mutex to get exclusive access to controller registers
To improve SMP safety, add mutex to get exclusive access to controller
registers.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 9405adda67d8c6a856243e599f09d806b4bc6de5
Author: Kenneth Heitke <kheitke@quicinc.com>
Date: Thu Apr 15 16:33:16 2010 -0600
spi_qsd: Move global input_fifo_size to device context.
Fix reference to device data input_fifo_size which is missing from the
previous patch.
Change-Id: Ia469896edd0fd90d7ded2b8ec44f9075474b3ec8
Signed-off-by: Kenneth Heitke <kheitke@quicinc.com>
commit 6031094ca6a940a47437bc6a092e813b4bc41d2a
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:34:48 2010 +0300
spi_qsd: Move global input_fifo_size to device context.
To improve SMP safety move global variable input_fifo_size to device
context.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 97f585033413b1f8ae210bbffd617a4af3462982
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 14 18:35:54 2010 +0300
spi_qsd: Initial contribution of the MSM SPI driver
This adds MSM SPI controller driver. The driver is SPI master, and
allows slave connections. Current version of the driver supports
FIFO and DM modes chosen upon the message size. The driver also
supports loopback mode which can be used for testing purposes.
This is a squashed version of all the MSM SPI driver changes on the QuIC
MSM 2.6.29 kernel which can be found at www.codeaurora.org.
It also contains all relevant adaptations to SPI core changes in 2.6.32
kernel.
https://www.codeaurora.org/gitweb/quic/la/?p=kernel/msm.git;a=blob;f=drivers/spi/spi_qsd.c;h=1c8e3ec727b29040648ef9a4949396f7109528ae;hb=refs/heads/android-msm-2.6.29b
Change-Id: Ibc1e71deb662af87deed77f10dcc8a3a46a8f012
Signed-off-by: Lena Salman <esalman@qualcomm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
2013-01-18 19:31:00 +00:00
|
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config SPI_QSD
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tristate "Qualcomm MSM SPI support"
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default n
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depends on ARCH_MSM_SCORPION && !MSM_SMP
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help
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Support for Serial Peripheral Interface for Qualcomm MSM
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This driver can also be built as a module. If so, the module
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will be called spi_qsd.
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config SPI_QUP
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tristate "Qualcomm MSM SPI QUPe Support"
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depends on ARCH_MSM && !SPI_QSD
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default n
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help
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Support for Serial Peripheral Interface for Qualcomm Universal
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Peripheral.
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This driver can also be built as a module. If so, the module
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will be called spi_qsd.
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[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
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#
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# Add new SPI master controllers in alphabetical order above this line
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#
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2009-12-14 22:20:22 +00:00
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config SPI_DESIGNWARE
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2010-01-21 16:55:54 +00:00
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tristate "DesignWare SPI controller core support"
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2009-12-14 22:20:22 +00:00
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help
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general driver for SPI controller core from DesignWare
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config SPI_DW_PCI
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tristate "PCI interface driver for DW SPI core"
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depends on SPI_DESIGNWARE && PCI
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2010-12-24 05:59:11 +00:00
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config SPI_DW_MID_DMA
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bool "DMA support for DW SPI controller on Intel Moorestown platform"
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depends on SPI_DW_PCI && INTEL_MID_DMAC
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2010-01-21 14:46:42 +00:00
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config SPI_DW_MMIO
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tristate "Memory-mapped io interface driver for DW SPI core"
|
2010-01-22 17:08:31 +00:00
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depends on SPI_DESIGNWARE && HAVE_CLK
|
2010-01-21 14:46:42 +00:00
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[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
#
|
|
|
|
|
# There are lots of SPI device types, with sensors and memory
|
|
|
|
|
# being probably the most widely used ones.
|
|
|
|
|
#
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|
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|
|
comment "SPI Protocol Masters"
|
|
|
|
|
|
2007-05-08 07:32:15 +00:00
|
|
|
config SPI_SPIDEV
|
|
|
|
|
tristate "User mode SPI device driver support"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on EXPERIMENTAL
|
2007-05-08 07:32:15 +00:00
|
|
|
help
|
|
|
|
|
This supports user mode SPI protocol drivers.
|
|
|
|
|
|
|
|
|
|
Note that this application programming interface is EXPERIMENTAL
|
|
|
|
|
and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
|
|
|
|
|
|
2007-07-17 11:04:10 +00:00
|
|
|
config SPI_TLE62X0
|
|
|
|
|
tristate "Infineon TLE62X0 (for power switching)"
|
2008-07-24 04:29:53 +00:00
|
|
|
depends on SYSFS
|
2007-07-17 11:04:10 +00:00
|
|
|
help
|
|
|
|
|
SPI driver for Infineon TLE62X0 series line driver chips,
|
|
|
|
|
such as the TLE6220, TLE6230 and TLE6240. This provides a
|
|
|
|
|
sysfs interface, with each line presented as a kind of GPIO
|
|
|
|
|
exposing both switch control and diagnostic feedback.
|
|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
#
|
|
|
|
|
# Add new SPI protocol masters in alphabetical order above this line
|
|
|
|
|
#
|
|
|
|
|
|
2008-07-24 04:29:53 +00:00
|
|
|
endif # SPI_MASTER
|
|
|
|
|
|
[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 21:34:19 +00:00
|
|
|
# (slave support would go here)
|
|
|
|
|
|
2008-04-28 09:14:16 +00:00
|
|
|
endif # SPI
|
