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x86: code cleanups in arch/x86/kernel/pci-gart_64.c
code cleanups: errors lines of code errors/KLOC arch/x86/kernel/pci-gart_64.c 183 748 244.6 arch/x86/kernel/pci-gart_64.c 0 790 0 Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
parent
e8d591dc71
commit
05fccb0e38
1 changed files with 279 additions and 235 deletions
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@ -42,16 +42,19 @@ static unsigned long iommu_pages; /* .. and in pages */
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static u32 *iommu_gatt_base; /* Remapping table */
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/* If this is disabled the IOMMU will use an optimized flushing strategy
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of only flushing when an mapping is reused. With it true the GART is flushed
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for every mapping. Problem is that doing the lazy flush seems to trigger
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bugs with some popular PCI cards, in particular 3ware (but has been also
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also seen with Qlogic at least). */
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/*
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* If this is disabled the IOMMU will use an optimized flushing strategy
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* of only flushing when an mapping is reused. With it true the GART is
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* flushed for every mapping. Problem is that doing the lazy flush seems
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* to trigger bugs with some popular PCI cards, in particular 3ware (but
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* has been also also seen with Qlogic at least).
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*/
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int iommu_fullflush = 1;
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/* Allocation bitmap for the remapping area */
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/* Allocation bitmap for the remapping area: */
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static DEFINE_SPINLOCK(iommu_bitmap_lock);
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static unsigned long *iommu_gart_bitmap; /* guarded by iommu_bitmap_lock */
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/* Guarded by iommu_bitmap_lock: */
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static unsigned long *iommu_gart_bitmap;
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static u32 gart_unmapped_entry;
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@ -61,7 +64,7 @@ static u32 gart_unmapped_entry;
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(((x) & 0xfffff000) | (((x) >> 32) << 4) | GPTE_VALID | GPTE_COHERENT)
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#define GPTE_DECODE(x) (((x) & 0xfffff000) | (((u64)(x) & 0xff0) << 28))
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#define to_pages(addr,size) \
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#define to_pages(addr, size) \
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(round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT)
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#define EMERGENCY_PAGES 32 /* = 128KB */
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@ -84,10 +87,12 @@ static unsigned long alloc_iommu(int size)
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unsigned long offset, flags;
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spin_lock_irqsave(&iommu_bitmap_lock, flags);
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offset = find_next_zero_string(iommu_gart_bitmap,next_bit,iommu_pages,size);
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offset = find_next_zero_string(iommu_gart_bitmap, next_bit,
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iommu_pages, size);
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if (offset == -1) {
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need_flush = 1;
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offset = find_next_zero_string(iommu_gart_bitmap,0,iommu_pages,size);
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offset = find_next_zero_string(iommu_gart_bitmap, 0,
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iommu_pages, size);
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}
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if (offset != -1) {
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set_bit_string(iommu_gart_bitmap, offset, size);
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@ -100,12 +105,14 @@ static unsigned long alloc_iommu(int size)
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if (iommu_fullflush)
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need_flush = 1;
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spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
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return offset;
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}
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static void free_iommu(unsigned long offset, int size)
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{
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unsigned long flags;
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spin_lock_irqsave(&iommu_bitmap_lock, flags);
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__clear_bit_string(iommu_gart_bitmap, offset, size);
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spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
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@ -117,6 +124,7 @@ static void free_iommu(unsigned long offset, int size)
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static void flush_gart(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&iommu_bitmap_lock, flags);
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if (need_flush) {
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k8_flush_garts();
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@ -127,34 +135,46 @@ static void flush_gart(void)
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#ifdef CONFIG_IOMMU_LEAK
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#define SET_LEAK(x) if (iommu_leak_tab) \
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iommu_leak_tab[x] = __builtin_return_address(0);
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#define CLEAR_LEAK(x) if (iommu_leak_tab) \
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iommu_leak_tab[x] = NULL;
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#define SET_LEAK(x) \
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do { \
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if (iommu_leak_tab) \
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iommu_leak_tab[x] = __builtin_return_address(0);\
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} while (0)
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#define CLEAR_LEAK(x) \
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do { \
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if (iommu_leak_tab) \
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iommu_leak_tab[x] = NULL; \
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} while (0)
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/* Debugging aid for drivers that don't free their IOMMU tables */
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static void **iommu_leak_tab;
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static int leak_trace;
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static int iommu_leak_pages = 20;
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static void dump_leak(void)
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{
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int i;
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static int dump;
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if (dump || !iommu_leak_tab) return;
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if (dump || !iommu_leak_tab)
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return;
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dump = 1;
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show_stack(NULL,NULL);
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show_stack(NULL, NULL);
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/* Very crude. dump some from the end of the table too */
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printk("Dumping %d pages from end of IOMMU:\n", iommu_leak_pages);
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for (i = 0; i < iommu_leak_pages; i+=2) {
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printk("%lu: ", iommu_pages-i);
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printk(KERN_DEBUG "Dumping %d pages from end of IOMMU:\n",
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iommu_leak_pages);
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for (i = 0; i < iommu_leak_pages; i += 2) {
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printk(KERN_DEBUG "%lu: ", iommu_pages-i);
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printk_address((unsigned long) iommu_leak_tab[iommu_pages-i]);
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printk("%c", (i+1)%2 == 0 ? '\n' : ' ');
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printk(KERN_CONT "%c", (i+1)%2 == 0 ? '\n' : ' ');
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}
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printk("\n");
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printk(KERN_DEBUG "\n");
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}
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#else
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#define SET_LEAK(x)
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#define CLEAR_LEAK(x)
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# define SET_LEAK(x)
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# define CLEAR_LEAK(x)
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#endif
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static void iommu_full(struct device *dev, size_t size, int dir)
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@ -177,29 +197,34 @@ static void iommu_full(struct device *dev, size_t size, int dir)
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if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
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panic("PCI-DMA: Memory would be corrupted\n");
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if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL)
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panic(KERN_ERR "PCI-DMA: Random memory would be DMAed\n");
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panic(KERN_ERR
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"PCI-DMA: Random memory would be DMAed\n");
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}
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#ifdef CONFIG_IOMMU_LEAK
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dump_leak();
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#endif
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}
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static inline int need_iommu(struct device *dev, unsigned long addr, size_t size)
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static inline int
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need_iommu(struct device *dev, unsigned long addr, size_t size)
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{
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u64 mask = *dev->dma_mask;
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int high = addr + size > mask;
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int mmu = high;
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if (force_iommu)
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mmu = 1;
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return mmu;
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}
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static inline int nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
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static inline int
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nonforced_iommu(struct device *dev, unsigned long addr, size_t size)
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{
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u64 mask = *dev->dma_mask;
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int high = addr + size > mask;
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int mmu = high;
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return mmu;
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}
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@ -212,6 +237,7 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
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unsigned long npages = to_pages(phys_mem, size);
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unsigned long iommu_page = alloc_iommu(npages);
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int i;
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if (iommu_page == -1) {
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if (!nonforced_iommu(dev, phys_mem, size))
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return phys_mem;
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@ -229,16 +255,19 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
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return iommu_bus_base + iommu_page*PAGE_SIZE + (phys_mem & ~PAGE_MASK);
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}
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static dma_addr_t gart_map_simple(struct device *dev, char *buf,
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size_t size, int dir)
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static dma_addr_t
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gart_map_simple(struct device *dev, char *buf, size_t size, int dir)
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{
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dma_addr_t map = dma_map_area(dev, virt_to_bus(buf), size, dir);
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flush_gart();
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return map;
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}
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/* Map a single area into the IOMMU */
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static dma_addr_t gart_map_single(struct device *dev, void *addr, size_t size, int dir)
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static dma_addr_t
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gart_map_single(struct device *dev, void *addr, size_t size, int dir)
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{
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unsigned long phys_mem, bus;
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return phys_mem;
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bus = gart_map_simple(dev, addr, size, dir);
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return bus;
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}
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@ -266,6 +296,7 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr,
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if (dma_addr < iommu_bus_base + EMERGENCY_PAGES*PAGE_SIZE ||
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dma_addr >= iommu_bus_base + iommu_size)
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return;
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iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT;
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npages = to_pages(dma_addr, size);
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for (i = 0; i < npages; i++) {
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@ -278,7 +309,8 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr,
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/*
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* Wrapper for pci_unmap_single working with scatterlists.
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*/
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static void gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
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static void
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gart_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
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{
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struct scatterlist *s;
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int i;
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@ -303,6 +335,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
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for_each_sg(sg, s, nents, i) {
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unsigned long addr = sg_phys(s);
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if (nonforced_iommu(dev, addr, s->length)) {
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addr = dma_map_area(dev, addr, s->length, dir);
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if (addr == bad_dma_address) {
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@ -317,6 +350,7 @@ static int dma_map_sg_nonforce(struct device *dev, struct scatterlist *sg,
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s->dma_length = s->length;
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}
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flush_gart();
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return nents;
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}
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@ -355,11 +389,12 @@ static int __dma_map_cont(struct scatterlist *start, int nelems,
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}
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}
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BUG_ON(iommu_page - iommu_start != pages);
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return 0;
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}
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static inline int dma_map_cont(struct scatterlist *start, int nelems,
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struct scatterlist *sout,
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static inline int
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dma_map_cont(struct scatterlist *start, int nelems, struct scatterlist *sout,
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unsigned long pages, int need)
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{
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if (!need) {
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@ -375,15 +410,12 @@ static inline int dma_map_cont(struct scatterlist *start, int nelems,
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* DMA map all entries in a scatterlist.
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* Merge chunks that have page aligned sizes into a continuous mapping.
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*/
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static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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int dir)
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static int
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gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir)
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{
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int i;
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int out;
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int start;
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unsigned long pages = 0;
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int need = 0, nextneed;
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struct scatterlist *s, *ps, *start_sg, *sgmap;
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int need = 0, nextneed, i, out, start;
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unsigned long pages = 0;
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if (nents == 0)
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return 0;
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@ -397,6 +429,7 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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ps = NULL; /* shut up gcc */
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for_each_sg(sg, s, nents, i) {
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dma_addr_t addr = sg_phys(s);
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s->dma_address = addr;
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BUG_ON(s->length == 0);
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@ -404,8 +437,11 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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/* Handle the previous not yet processed entries */
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if (i > start) {
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/* Can only merge when the last chunk ends on a page
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boundary and the new one doesn't have an offset. */
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/*
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* Can only merge when the last chunk ends on a
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* page boundary and the new one doesn't have an
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* offset.
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*/
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if (!iommu_merge || !nextneed || !need || s->offset ||
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(ps->offset + ps->length) % PAGE_SIZE) {
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if (dma_map_cont(start_sg, i - start, sgmap,
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@ -436,6 +472,7 @@ static int gart_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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error:
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flush_gart();
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gart_unmap_sg(dev, sg, out, dir);
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/* When it was forced or merged try again in a dumb way */
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if (force_iommu || iommu_merge) {
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out = dma_map_sg_nonforce(dev, sg, nents, dir);
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@ -444,6 +481,7 @@ error:
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}
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if (panic_on_overflow)
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panic("dma_map_sg: overflow on %lu pages\n", pages);
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iommu_full(dev, pages << PAGE_SHIFT, dir);
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for_each_sg(sg, s, nents, i)
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s->dma_address = bad_dma_address;
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@ -455,6 +493,7 @@ static int no_agp;
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static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
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{
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unsigned long a;
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if (!iommu_size) {
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iommu_size = aper_size;
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if (!no_agp)
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@ -464,18 +503,20 @@ static __init unsigned long check_iommu_size(unsigned long aper, u64 aper_size)
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a = aper + iommu_size;
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iommu_size -= round_up(a, LARGE_PAGE_SIZE) - a;
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if (iommu_size < 64*1024*1024)
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if (iommu_size < 64*1024*1024) {
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printk(KERN_WARNING
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"PCI-DMA: Warning: Small IOMMU %luMB. Consider increasing the AGP aperture in BIOS\n",iommu_size>>20);
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"PCI-DMA: Warning: Small IOMMU %luMB."
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" Consider increasing the AGP aperture in BIOS\n",
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iommu_size >> 20);
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}
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return iommu_size;
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}
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static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
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{
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unsigned aper_size = 0, aper_base_32;
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unsigned aper_size = 0, aper_base_32, aper_order;
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u64 aper_base;
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unsigned aper_order;
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pci_read_config_dword(dev, 0x94, &aper_base_32);
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pci_read_config_dword(dev, 0x90, &aper_order);
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@ -498,10 +539,10 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size)
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*/
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static __init int init_k8_gatt(struct agp_kern_info *info)
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{
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unsigned aper_size, gatt_size, new_aper_size;
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unsigned aper_base, new_aper_base;
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struct pci_dev *dev;
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void *gatt;
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unsigned aper_base, new_aper_base;
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unsigned aper_size, gatt_size, new_aper_size;
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int i;
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printk(KERN_INFO "PCI-DMA: Disabling AGP.\n");
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@ -523,13 +564,14 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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if (!aper_base)
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goto nommu;
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info->aper_base = aper_base;
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info->aper_size = aper_size>>20;
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info->aper_size = aper_size >> 20;
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gatt_size = (aper_size >> PAGE_SHIFT) * sizeof(u32);
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gatt = (void *)__get_free_pages(GFP_KERNEL, get_order(gatt_size));
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if (!gatt)
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panic("Cannot allocate GATT table");
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if (change_page_attr_addr((unsigned long)gatt, gatt_size >> PAGE_SHIFT, PAGE_KERNEL_NOCACHE))
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if (change_page_attr_addr((unsigned long)gatt, gatt_size >> PAGE_SHIFT,
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PAGE_KERNEL_NOCACHE))
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panic("Could not set GART PTEs to uncacheable pages");
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global_flush_tlb();
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@ -537,8 +579,8 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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agp_gatt_table = gatt;
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for (i = 0; i < num_k8_northbridges; i++) {
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u32 ctl;
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u32 gatt_reg;
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u32 ctl;
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dev = k8_northbridges[i];
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gatt_reg = __pa(gatt) >> 12;
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@ -553,7 +595,8 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
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}
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flush_gart();
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printk("PCI-DMA: aperture base @ %x size %u KB\n",aper_base, aper_size>>10);
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printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n",
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aper_base, aper_size>>10);
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return 0;
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nommu:
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@ -603,8 +646,8 @@ void gart_iommu_shutdown(void)
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void __init gart_iommu_init(void)
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{
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struct agp_kern_info info;
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unsigned long aper_size;
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unsigned long iommu_start;
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unsigned long aper_size;
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unsigned long scratch;
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||||
long i;
|
||||
|
||||
|
@ -647,7 +690,7 @@ void __init gart_iommu_init(void)
|
|||
iommu_size = check_iommu_size(info.aper_base, aper_size);
|
||||
iommu_pages = iommu_size >> PAGE_SHIFT;
|
||||
|
||||
iommu_gart_bitmap = (void*)__get_free_pages(GFP_KERNEL,
|
||||
iommu_gart_bitmap = (void *) __get_free_pages(GFP_KERNEL,
|
||||
get_order(iommu_pages/8));
|
||||
if (!iommu_gart_bitmap)
|
||||
panic("Cannot allocate iommu bitmap\n");
|
||||
|
@ -660,7 +703,8 @@ void __init gart_iommu_init(void)
|
|||
if (iommu_leak_tab)
|
||||
memset(iommu_leak_tab, 0, iommu_pages * 8);
|
||||
else
|
||||
printk("PCI-DMA: Cannot allocate leak trace area\n");
|
||||
printk(KERN_DEBUG
|
||||
"PCI-DMA: Cannot allocate leak trace area\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -673,7 +717,7 @@ void __init gart_iommu_init(void)
|
|||
agp_memory_reserved = iommu_size;
|
||||
printk(KERN_INFO
|
||||
"PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n",
|
||||
iommu_size>>20);
|
||||
iommu_size >> 20);
|
||||
|
||||
iommu_start = aper_size - iommu_size;
|
||||
iommu_bus_base = info.aper_base + iommu_start;
|
||||
|
@ -713,7 +757,7 @@ void __init gart_parse_options(char *p)
|
|||
int arg;
|
||||
|
||||
#ifdef CONFIG_IOMMU_LEAK
|
||||
if (!strncmp(p,"leak",4)) {
|
||||
if (!strncmp(p, "leak", 4)) {
|
||||
leak_trace = 1;
|
||||
p += 4;
|
||||
if (*p == '=') ++p;
|
||||
|
@ -723,18 +767,18 @@ void __init gart_parse_options(char *p)
|
|||
#endif
|
||||
if (isdigit(*p) && get_option(&p, &arg))
|
||||
iommu_size = arg;
|
||||
if (!strncmp(p, "fullflush",8))
|
||||
if (!strncmp(p, "fullflush", 8))
|
||||
iommu_fullflush = 1;
|
||||
if (!strncmp(p, "nofullflush",11))
|
||||
if (!strncmp(p, "nofullflush", 11))
|
||||
iommu_fullflush = 0;
|
||||
if (!strncmp(p,"noagp",5))
|
||||
if (!strncmp(p, "noagp", 5))
|
||||
no_agp = 1;
|
||||
if (!strncmp(p, "noaperture",10))
|
||||
if (!strncmp(p, "noaperture", 10))
|
||||
fix_aperture = 0;
|
||||
/* duplicated from pci-dma.c */
|
||||
if (!strncmp(p,"force",5))
|
||||
if (!strncmp(p, "force", 5))
|
||||
gart_iommu_aperture_allowed = 1;
|
||||
if (!strncmp(p,"allowed",7))
|
||||
if (!strncmp(p, "allowed", 7))
|
||||
gart_iommu_aperture_allowed = 1;
|
||||
if (!strncmp(p, "memaper", 7)) {
|
||||
fallback_aper_force = 1;
|
||||
|
|
Loading…
Reference in a new issue