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https://github.com/followmsi/android_kernel_google_msm.git
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mdss: display: add video display interface support
Video mode display interface is used by DSI, HDMI and EDP controllers. Implement MDP support in order to setup data path to these controllers. Change-Id: Ibc766a1d10a55bcf64a3ab693db034a378afe4ee Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
This commit is contained in:
Adrian Salido-Moreno
Stephen Boyd
parent
99969c305e
commit
0b73752fe7
4 changed files with 337 additions and 0 deletions
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@ -1,5 +1,6 @@
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mdss-mdp-objs := mdss_mdp.o mdss_mdp_ctl.o mdss_mdp_pipe.o mdss_mdp_util.o
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mdss-mdp-objs += mdss_mdp_pp.o
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mdss-mdp-objs += mdss_mdp_intf_video.o
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mdss-mdp-objs += mdss_mdp_intf_writeback.o
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mdss-mdp-objs += mdss_mdp_rotator.o
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mdss-mdp-objs += mdss_mdp_overlay.o
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@ -275,6 +275,7 @@ void mdss_mdp_clk_ctrl(int enable, int isr);
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void mdss_mdp_footswitch_ctrl(int on);
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int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd);
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int mdss_mdp_video_start(struct mdss_mdp_ctl *ctl);
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int mdss_mdp_writeback_start(struct mdss_mdp_ctl *ctl);
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int mdss_mdp_ctl_on(struct msm_fb_data_type *mfd);
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@ -348,6 +348,27 @@ static int mdss_mdp_ctl_init(struct msm_fb_data_type *mfd)
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}
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switch (mfd->panel_info.type) {
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case EDP_PANEL:
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ctl->intf_num = MDSS_MDP_INTF0;
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ctl->intf_type = MDSS_INTF_EDP;
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ctl->opmode = MDSS_MDP_CTL_OP_VIDEO_MODE;
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ctl->start_fnc = mdss_mdp_video_start;
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break;
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case MIPI_VIDEO_PANEL:
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if (mfd->panel_info.pdest == DISPLAY_1)
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ctl->intf_num = MDSS_MDP_INTF1;
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else
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ctl->intf_num = MDSS_MDP_INTF2;
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ctl->intf_type = MDSS_INTF_DSI;
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ctl->opmode = MDSS_MDP_CTL_OP_VIDEO_MODE;
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ctl->start_fnc = mdss_mdp_video_start;
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break;
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case DTV_PANEL:
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ctl->intf_num = MDSS_MDP_INTF3;
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ctl->intf_type = MDSS_INTF_HDMI;
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ctl->opmode = MDSS_MDP_CTL_OP_VIDEO_MODE;
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ctl->start_fnc = mdss_mdp_video_start;
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break;
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case WRITEBACK_PANEL:
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ctl->intf_num = MDSS_MDP_NO_INTF;
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ctl->opmode = MDSS_MDP_CTL_OP_WFD_MODE;
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314
drivers/video/msm/mdss/mdss_mdp_intf_video.c
Normal file
314
drivers/video/msm/mdss/mdss_mdp_intf_video.c
Normal file
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@ -0,0 +1,314 @@
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/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include "mdss_fb.h"
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#include "mdss_mdp.h"
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/* intf timing settings */
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struct intf_timing_params {
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u32 width;
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u32 height;
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u32 xres;
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u32 yres;
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u32 h_back_porch;
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u32 h_front_porch;
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u32 v_back_porch;
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u32 v_front_porch;
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u32 hsync_pulse_width;
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u32 vsync_pulse_width;
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u32 border_clr;
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u32 underflow_clr;
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u32 hsync_skew;
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};
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#define MAX_SESSIONS 3
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struct mdss_mdp_video_ctx {
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u32 ctl_num;
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u32 pp_num;
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u8 ref_cnt;
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u8 timegen_en;
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struct completion pp_comp;
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struct completion vsync_comp;
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};
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struct mdss_mdp_video_ctx mdss_mdp_video_ctx_list[MAX_SESSIONS];
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static int mdss_mdp_video_timegen_setup(struct mdss_mdp_ctl *ctl,
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struct intf_timing_params *p)
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{
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u32 hsync_period, vsync_period;
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u32 hsync_start_x, hsync_end_x, display_v_start, display_v_end;
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u32 active_h_start, active_h_end, active_v_start, active_v_end;
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u32 display_hctl, active_hctl, hsync_ctl, polarity_ctl;
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int off;
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off = MDSS_MDP_REG_INTF_OFFSET(ctl->intf_num);
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hsync_period = p->hsync_pulse_width + p->h_back_porch +
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p->width + p->h_front_porch;
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vsync_period = p->vsync_pulse_width + p->v_back_porch +
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p->height + p->v_front_porch;
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display_v_start = ((p->vsync_pulse_width + p->v_back_porch) *
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hsync_period) + p->hsync_skew;
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display_v_end = ((vsync_period - p->v_front_porch) * hsync_period) +
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p->hsync_skew - 1;
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if (ctl->intf_type == MDSS_INTF_EDP) {
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display_v_start += p->hsync_pulse_width + p->h_back_porch;
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display_v_end -= p->h_front_porch;
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}
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hsync_start_x = p->h_back_porch + p->hsync_pulse_width;
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hsync_end_x = hsync_period - p->h_front_porch - 1;
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if (p->width != p->xres) {
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active_h_start = hsync_start_x;
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active_h_end = active_h_start + p->xres - 1;
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} else {
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active_h_start = 0;
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active_h_end = 0;
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}
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if (p->height != p->yres) {
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active_v_start = display_v_start;
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active_v_end = active_v_start + (p->yres * hsync_period) - 1;
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} else {
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active_v_start = 0;
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active_v_end = 0;
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}
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if (active_h_end) {
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active_hctl = (active_h_end << 16) | active_h_start;
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active_hctl |= BIT(31); /* ACTIVE_H_ENABLE */
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} else {
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active_hctl = 0;
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}
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if (active_v_end)
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active_v_start |= BIT(31); /* ACTIVE_V_ENABLE */
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hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width;
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display_hctl = (hsync_end_x << 16) | hsync_start_x;
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polarity_ctl = (0 << 2) | /* DEN Polarity */
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(0 << 1) | /* VSYNC Polarity */
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(0); /* HSYNC Polarity */
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_HSYNC_CTL, hsync_ctl);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_VSYNC_PERIOD_F0,
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vsync_period * hsync_period);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_VSYNC_PULSE_WIDTH_F0,
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p->vsync_pulse_width * hsync_period);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_DISPLAY_HCTL,
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display_hctl);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_DISPLAY_V_START_F0,
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display_v_start);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_DISPLAY_V_END_F0,
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display_v_end);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_ACTIVE_HCTL, active_hctl);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_ACTIVE_V_START_F0,
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active_v_start);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_ACTIVE_V_END_F0,
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active_v_end);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_BORDER_COLOR,
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p->border_clr);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_UNDERFLOW_COLOR,
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p->underflow_clr);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_HSYNC_SKEW,
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p->hsync_skew);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_POLARITY_CTL,
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polarity_ctl);
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return 0;
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}
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static int mdss_mdp_video_stop(struct mdss_mdp_ctl *ctl)
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{
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struct mdss_mdp_video_ctx *ctx;
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int off;
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pr_debug("stop ctl=%d\n", ctl->num);
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ctx = (struct mdss_mdp_video_ctx *) ctl->priv_data;
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if (!ctx) {
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pr_err("invalid ctx for ctl=%d\n", ctl->num);
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return -ENODEV;
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}
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if (ctx->timegen_en) {
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off = MDSS_MDP_REG_INTF_OFFSET(ctl->intf_num);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_TIMING_ENGINE_EN, 0);
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_OFF, false);
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}
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memset(ctx, 0, sizeof(*ctx));
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return 0;
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}
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static void mdss_mdp_video_pp_intr_done(void *arg)
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{
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struct mdss_mdp_video_ctx *ctx;
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ctx = (struct mdss_mdp_video_ctx *) arg;
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if (!ctx) {
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pr_err("invalid ctx\n");
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return;
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}
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pr_debug("intr mixer=%d\n", ctx->pp_num);
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complete(&ctx->pp_comp);
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}
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static void mdss_mdp_video_vsync_intr_done(void *arg)
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{
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struct mdss_mdp_video_ctx *ctx;
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ctx = (struct mdss_mdp_video_ctx *) arg;
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if (!ctx) {
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pr_err("invalid ctx\n");
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return;
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}
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pr_debug("intr ctl=%d\n", ctx->ctl_num);
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complete(&ctx->vsync_comp);
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}
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static int mdss_mdp_video_prepare(struct mdss_mdp_ctl *ctl, void *arg)
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{
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struct mdss_mdp_video_ctx *ctx;
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u32 intr_type = MDSS_MDP_IRQ_PING_PONG_COMP;
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if (ctl->play_cnt == 0)
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return 0;
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pr_debug("setup ctl=%d\n", ctl->num);
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ctx = (struct mdss_mdp_video_ctx *) ctl->priv_data;
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if (!ctx) {
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pr_err("invalid ctx\n");
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return -ENODEV;
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}
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mdss_mdp_set_intr_callback(intr_type, ctx->pp_num,
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mdss_mdp_video_pp_intr_done, ctx);
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mdss_mdp_irq_enable(intr_type, ctx->pp_num);
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wait_for_completion_interruptible(&ctx->pp_comp);
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mdss_mdp_irq_disable(intr_type, ctx->pp_num);
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return 0;
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}
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static int mdss_mdp_video_display(struct mdss_mdp_ctl *ctl, void *arg)
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{
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struct mdss_mdp_video_ctx *ctx;
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u32 intr_type = MDSS_MDP_IRQ_INTF_VSYNC;
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pr_debug("kickoff ctl=%d\n", ctl->num);
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ctx = (struct mdss_mdp_video_ctx *) ctl->priv_data;
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if (!ctx) {
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pr_err("invalid ctx\n");
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return -ENODEV;
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}
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mdss_mdp_set_intr_callback(intr_type, ctl->intf_num,
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mdss_mdp_video_vsync_intr_done, ctx);
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mdss_mdp_irq_enable(intr_type, ctl->intf_num);
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if (!ctx->timegen_en) {
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int off = MDSS_MDP_REG_INTF_OFFSET(ctl->intf_num);
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mdss_mdp_clk_ctrl(MDP_BLOCK_POWER_ON, false);
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MDSS_MDP_REG_WRITE(off + MDSS_MDP_REG_INTF_TIMING_ENGINE_EN, 1);
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ctx->timegen_en = 1;
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}
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wait_for_completion_interruptible(&ctx->vsync_comp);
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mdss_mdp_irq_disable(intr_type, ctl->intf_num);
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return 0;
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}
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int mdss_mdp_video_start(struct mdss_mdp_ctl *ctl)
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{
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struct msm_fb_data_type *mfd;
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struct mdss_panel_info *pinfo;
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struct mdss_mdp_video_ctx *ctx;
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struct mdss_mdp_mixer *mixer;
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struct intf_timing_params itp = {0};
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struct fb_info *fbi;
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int i;
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mfd = ctl->mfd;
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fbi = mfd->fbi;
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pinfo = &mfd->panel_info;
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mixer = mdss_mdp_mixer_get(ctl, MDSS_MDP_MIXER_MUX_LEFT);
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if (!mixer) {
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pr_err("mixer not setup correctly\n");
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return -ENODEV;
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}
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pr_debug("start ctl=%u\n", ctl->num);
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for (i = 0; i < MAX_SESSIONS; i++) {
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ctx = &mdss_mdp_video_ctx_list[i];
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if (ctx->ref_cnt == 0) {
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ctx->ref_cnt++;
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break;
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}
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}
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if (i == MAX_SESSIONS) {
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pr_err("too many sessions\n");
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return -ENOMEM;
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}
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ctl->priv_data = ctx;
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ctx->ctl_num = ctl->num;
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ctx->pp_num = mixer->num;
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init_completion(&ctx->pp_comp);
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init_completion(&ctx->vsync_comp);
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itp.width = pinfo->xres + pinfo->lcdc.xres_pad;
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itp.height = pinfo->yres + pinfo->lcdc.yres_pad;
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itp.border_clr = pinfo->lcdc.border_clr;
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itp.underflow_clr = pinfo->lcdc.underflow_clr;
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itp.hsync_skew = pinfo->lcdc.hsync_skew;
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itp.xres = fbi->var.xres;
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itp.yres = fbi->var.yres;
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itp.h_back_porch = fbi->var.left_margin;
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itp.h_front_porch = fbi->var.right_margin;
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itp.v_back_porch = fbi->var.upper_margin;
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itp.v_front_porch = fbi->var.lower_margin;
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itp.hsync_pulse_width = fbi->var.hsync_len;
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itp.vsync_pulse_width = fbi->var.vsync_len;
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if (mdss_mdp_video_timegen_setup(ctl, &itp)) {
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pr_err("unable to get timing parameters\n");
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return -EINVAL;
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}
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ctl->stop_fnc = mdss_mdp_video_stop;
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ctl->prepare_fnc = mdss_mdp_video_prepare;
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ctl->display_fnc = mdss_mdp_video_display;
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return 0;
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}
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