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msm_fb: display: add wait4videodone for video mode
Add wait4videodone to commit dcs commands to dsi controller while video engine is busy so that dcs commands will be transmitted to panel at next beginning of BLLP. Change-Id: I7ca40124813452f25a60f899437aeb9bce6feb14 Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
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1dae7817be
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1dd0edc628
2 changed files with 29 additions and 21 deletions
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@ -117,6 +117,7 @@ enum dsi_trigger_type {
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#define DSI_INTR_CMD_DMA_DONE_MASK BIT(1)
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#define DSI_INTR_CMD_DMA_DONE BIT(0)
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#define DSI_VIDEO_TERM BIT(16)
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#define DSI_MDP_TERM BIT(8)
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#define DSI_CMD_TERM BIT(0)
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@ -43,6 +43,7 @@
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static struct completion dsi_dma_comp;
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static struct completion dsi_mdp_comp;
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static struct completion dsi_video_comp;
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static struct dsi_buf dsi_tx_buf;
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static struct dsi_buf dsi_rx_buf;
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static spinlock_t dsi_irq_lock;
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@ -95,6 +96,7 @@ void mipi_dsi_init(void)
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{
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init_completion(&dsi_dma_comp);
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init_completion(&dsi_mdp_comp);
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init_completion(&dsi_video_comp);
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mipi_dsi_buf_alloc(&dsi_tx_buf, DSI_BUF_SIZE);
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mipi_dsi_buf_alloc(&dsi_rx_buf, DSI_BUF_SIZE);
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spin_lock_init(&dsi_irq_lock);
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@ -1014,7 +1016,8 @@ void mipi_dsi_op_mode_config(int mode)
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dsi_ctrl &= ~0x07;
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if (mode == DSI_VIDEO_MODE) {
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dsi_ctrl |= 0x03;
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intr_ctrl = DSI_INTR_CMD_DMA_DONE_MASK;
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intr_ctrl = (DSI_INTR_CMD_DMA_DONE_MASK |
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DSI_INTR_VIDEO_DONE_MASK);
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} else { /* command mode */
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dsi_ctrl |= 0x05;
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intr_ctrl = DSI_INTR_CMD_DMA_DONE_MASK | DSI_INTR_ERROR_MASK |
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@ -1028,6 +1031,19 @@ void mipi_dsi_op_mode_config(int mode)
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wmb();
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}
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static void mipi_dsi_wait4video_done(void)
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{
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unsigned long flag;
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spin_lock_irqsave(&dsi_mdp_lock, flag);
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INIT_COMPLETION(dsi_video_comp);
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mipi_dsi_enable_irq(DSI_VIDEO_TERM);
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spin_unlock_irqrestore(&dsi_mdp_lock, flag);
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wait_for_completion(&dsi_video_comp);
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}
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void mipi_dsi_mdp_busy_wait(void)
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{
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mutex_lock(&cmd_mutex);
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@ -1490,21 +1506,11 @@ int mipi_dsi_cmd_dma_rx(struct dsi_buf *rp, int rlen)
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return rlen;
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}
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static void mipi_dsi_wait_for_video_eng_busy(void)
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static void mipi_dsi_wait4video_eng_busy(void)
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{
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u32 status;
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int sleep_us = 4000;
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/*
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* if video mode engine was not busy (in BLLP)
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* wait to pass BLLP
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*/
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/* check for VIDEO_MODE_ENGINE_BUSY */
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readl_poll((MIPI_DSI_BASE + 0x0004), /* DSI_STATUS */
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status,
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(status & 0x08),
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sleep_us);
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mipi_dsi_wait4video_done();
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/* delay 4 ms to skip BLLP */
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usleep(4000);
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}
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void mipi_dsi_cmd_mdp_busy(void)
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@ -1605,10 +1611,10 @@ void mipi_dsi_cmdlist_commit(int from_mdp)
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dsi_ctrl = MIPI_INP(MIPI_DSI_BASE + 0x0000);
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if (dsi_ctrl & 0x02) {
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/* video mode, make sure dsi_cmd_mdp is busy
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* so dcs command will be txed at start of BLLP
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/* video mode, make sure video engine is busy
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* so dcs command will be sent at start of BLLP
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*/
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mipi_dsi_wait_for_video_eng_busy();
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mipi_dsi_wait4video_eng_busy();
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} else {
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/* command mode */
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if (!from_mdp) { /* cmdlist_put */
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@ -1763,9 +1769,10 @@ irqreturn_t mipi_dsi_isr(int irq, void *ptr)
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}
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if (isr & DSI_INTR_VIDEO_DONE) {
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/*
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* do something here
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*/
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spin_lock(&dsi_mdp_lock);
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mipi_dsi_disable_irq_nosync(DSI_VIDEO_TERM);
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complete(&dsi_video_comp);
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spin_unlock(&dsi_mdp_lock);
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}
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if (isr & DSI_INTR_CMD_DMA_DONE) {
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