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coresight: turn on pcsave during first hotplug if enabled in boot
When PC save is enabled via kernel command line or config item but we boot with maxcpus parameter value of less than number of present cpus, cpus that are not included as part of maxcpus don't get PC save feature enabled during kernel init since those cpus would not be online. This change ensures that for such cpus, first hotplug after the respective cpu's ETM probe is done, enables PC save feature if the feature is enabled via kernel command line or config item but hasn't already been enabled. Change-Id: I9cae33654539ed72885fdf11cd603c7c776512c1 Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
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parent
03aff310ed
commit
1e28f91301
1 changed files with 26 additions and 5 deletions
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@ -234,6 +234,8 @@ struct etm_drvdata {
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uint32_t timestamp_event;
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bool pcsave_impl;
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bool pcsave_enable;
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bool pcsave_sticky_enable;
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bool pcsave_boot_enable;
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};
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static struct etm_drvdata *etmdrvdata[NR_CPUS];
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@ -1516,7 +1518,7 @@ static ssize_t etm_show_pcsave(struct device *dev,
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return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
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}
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static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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static int ____etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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{
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int ret = 0;
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@ -1524,7 +1526,6 @@ static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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if (ret)
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return ret;
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get_online_cpus();
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spin_lock(&drvdata->spinlock);
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if (val) {
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if (drvdata->pcsave_enable)
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@ -1535,6 +1536,7 @@ static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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if (ret)
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goto out;
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drvdata->pcsave_enable = true;
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drvdata->pcsave_sticky_enable = true;
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dev_info(drvdata->dev, "PC save enabled\n");
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} else {
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@ -1551,12 +1553,22 @@ static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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}
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out:
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spin_unlock(&drvdata->spinlock);
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put_online_cpus();
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clk_disable_unprepare(drvdata->clk);
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return ret;
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}
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static int __etm_store_pcsave(struct etm_drvdata *drvdata, unsigned long val)
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{
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int ret;
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get_online_cpus();
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ret = ____etm_store_pcsave(drvdata, val);
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put_online_cpus();
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return ret;
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}
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static ssize_t etm_store_pcsave(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size)
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@ -1642,6 +1654,13 @@ static int etm_cpu_callback(struct notifier_block *nfb, unsigned long action,
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}
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break;
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case CPU_ONLINE:
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if (etmdrvdata[cpu] && etmdrvdata[cpu]->pcsave_boot_enable &&
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!etmdrvdata[cpu]->pcsave_sticky_enable) {
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____etm_store_pcsave(etmdrvdata[cpu], 1);
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}
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break;
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case CPU_DYING:
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if (etmdrvdata[cpu] && etmdrvdata[cpu]->enable) {
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spin_lock(&etmdrvdata[cpu]->spinlock);
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@ -1894,8 +1913,10 @@ static int __devinit etm_probe(struct platform_device *pdev)
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if (boot_enable)
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coresight_enable(drvdata->csdev);
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if (drvdata->pcsave_impl && boot_pcsave_enable)
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__etm_store_pcsave(drvdata, true);
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if (drvdata->pcsave_impl && boot_pcsave_enable) {
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__etm_store_pcsave(drvdata, 1);
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drvdata->pcsave_boot_enable = true;
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}
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return 0;
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err2:
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