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drm/nouveau/fifo/nvc0: improve interrupt handler somewhat

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Logs extra info for interrupts that have a sub-status register, and
handles the "special" ack from INTR bit 31.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2013-01-31 19:49:33 -05:00
parent e2de179458
commit 32256c87ea
1 changed files with 33 additions and 3 deletions
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36
drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
View file

@ -517,12 +517,34 @@ nvc0_fifo_intr(struct nouveau_subdev *subdev)
u32 mask = nv_rd32(priv, 0x002140);
u32 stat = nv_rd32(priv, 0x002100) & mask;
if (stat & 0x00000001) {
u32 intr = nv_rd32(priv, 0x00252c);
nv_warn(priv, "INTR 0x00000001: 0x%08x\n", intr);
nv_wr32(priv, 0x002100, 0x00000001);
stat &= ~0x00000001;
}
if (stat & 0x00000100) {
nv_warn(priv, "unknown status 0x00000100\n");
u32 intr = nv_rd32(priv, 0x00254c);
nv_warn(priv, "INTR 0x00000100: 0x%08x\n", intr);
nv_wr32(priv, 0x002100, 0x00000100);
stat &= ~0x00000100;
}
if (stat & 0x00010000) {
u32 intr = nv_rd32(priv, 0x00256c);
nv_warn(priv, "INTR 0x00010000: 0x%08x\n", intr);
nv_wr32(priv, 0x002100, 0x00010000);
stat &= ~0x00010000;
}
if (stat & 0x01000000) {
u32 intr = nv_rd32(priv, 0x00258c);
nv_warn(priv, "INTR 0x01000000: 0x%08x\n", intr);
nv_wr32(priv, 0x002100, 0x01000000);
stat &= ~0x01000000;
}
if (stat & 0x10000000) {
u32 units = nv_rd32(priv, 0x00259c);
u32 u = units;
@ -552,11 +574,19 @@ nvc0_fifo_intr(struct nouveau_subdev *subdev)
}
if (stat & 0x40000000) {
nv_warn(priv, "unknown status 0x40000000\n");
nv_mask(priv, 0x002a00, 0x00000000, 0x00000000);
u32 intr0 = nv_rd32(priv, 0x0025a4);
u32 intr1 = nv_mask(priv, 0x002a00, 0x00000000, 0x00000);
nv_debug(priv, "INTR 0x40000000: 0x%08x 0x%08x\n",
intr0, intr1);
stat &= ~0x40000000;
}
if (stat & 0x80000000) {
u32 intr = nv_mask(priv, 0x0025a8, 0x00000000, 0x00000000);
nv_warn(priv, "INTR 0x80000000: 0x%08x\n", intr);
stat &= ~0x80000000;
}
if (stat) {
nv_fatal(priv, "unhandled status 0x%08x\n", stat);
nv_wr32(priv, 0x002100, stat);