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e1000: convert uint16_t style integers to u16

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Conglomerate from 4 separate patches from Joe.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Joe Perches 2008-04-03 10:06:32 -07:00 committed by Jeff Garzik
parent 222441a620
commit 406874a7cc
5 changed files with 1128 additions and 1128 deletions
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86
drivers/net/e1000/e1000.h
View file

@ -161,13 +161,13 @@ struct e1000_buffer {
struct sk_buff *skb;
dma_addr_t dma;
unsigned long time_stamp;
uint16_t length;
uint16_t next_to_watch;
u16 length;
u16 next_to_watch;
};
struct e1000_ps_page { struct page *ps_page[PS_PAGE_BUFFERS]; };
struct e1000_ps_page_dma { uint64_t ps_page_dma[PS_PAGE_BUFFERS]; };
struct e1000_ps_page_dma { u64 ps_page_dma[PS_PAGE_BUFFERS]; };
struct e1000_tx_ring {
/* pointer to the descriptor ring memory */
@ -186,8 +186,8 @@ struct e1000_tx_ring {
struct e1000_buffer *buffer_info;
spinlock_t tx_lock;
uint16_t tdh;
uint16_t tdt;
u16 tdh;
u16 tdt;
bool last_tx_tso;
};
@ -213,8 +213,8 @@ struct e1000_rx_ring {
/* cpu for rx queue */
int cpu;
uint16_t rdh;
uint16_t rdt;
u16 rdh;
u16 rdt;
};
#define E1000_DESC_UNUSED(R) \
@ -237,14 +237,14 @@ struct e1000_adapter {
struct timer_list watchdog_timer;
struct timer_list phy_info_timer;
struct vlan_group *vlgrp;
uint16_t mng_vlan_id;
uint32_t bd_number;
uint32_t rx_buffer_len;
uint32_t wol;
uint32_t smartspeed;
uint32_t en_mng_pt;
uint16_t link_speed;
uint16_t link_duplex;
u16 mng_vlan_id;
u32 bd_number;
u32 rx_buffer_len;
u32 wol;
u32 smartspeed;
u32 en_mng_pt;
u16 link_speed;
u16 link_duplex;
spinlock_t stats_lock;
#ifdef CONFIG_E1000_NAPI
spinlock_t tx_queue_lock;
@ -254,13 +254,13 @@ struct e1000_adapter {
unsigned int total_rx_bytes;
unsigned int total_rx_packets;
/* Interrupt Throttle Rate */
uint32_t itr;
uint32_t itr_setting;
uint16_t tx_itr;
uint16_t rx_itr;
u32 itr;
u32 itr_setting;
u16 tx_itr;
u16 rx_itr;
struct work_struct reset_task;
uint8_t fc_autoneg;
u8 fc_autoneg;
struct timer_list blink_timer;
unsigned long led_status;
@ -269,18 +269,18 @@ struct e1000_adapter {
struct e1000_tx_ring *tx_ring; /* One per active queue */
unsigned int restart_queue;
unsigned long tx_queue_len;
uint32_t txd_cmd;
uint32_t tx_int_delay;
uint32_t tx_abs_int_delay;
uint32_t gotcl;
uint64_t gotcl_old;
uint64_t tpt_old;
uint64_t colc_old;
uint32_t tx_timeout_count;
uint32_t tx_fifo_head;
uint32_t tx_head_addr;
uint32_t tx_fifo_size;
uint8_t tx_timeout_factor;
u32 txd_cmd;
u32 tx_int_delay;
u32 tx_abs_int_delay;
u32 gotcl;
u64 gotcl_old;
u64 tpt_old;
u64 colc_old;
u32 tx_timeout_count;
u32 tx_fifo_head;
u32 tx_head_addr;
u32 tx_fifo_size;
u8 tx_timeout_factor;
atomic_t tx_fifo_stall;
bool pcix_82544;
bool detect_tx_hung;
@ -305,17 +305,17 @@ struct e1000_adapter {
int num_tx_queues;
int num_rx_queues;
uint64_t hw_csum_err;
uint64_t hw_csum_good;
uint64_t rx_hdr_split;
uint32_t alloc_rx_buff_failed;
uint32_t rx_int_delay;
uint32_t rx_abs_int_delay;
u64 hw_csum_err;
u64 hw_csum_good;
u64 rx_hdr_split;
u32 alloc_rx_buff_failed;
u32 rx_int_delay;
u32 rx_abs_int_delay;
bool rx_csum;
unsigned int rx_ps_pages;
uint32_t gorcl;
uint64_t gorcl_old;
uint16_t rx_ps_bsize0;
u32 gorcl;
u64 gorcl_old;
u16 rx_ps_bsize0;
/* OS defined structs */
@ -329,7 +329,7 @@ struct e1000_adapter {
struct e1000_phy_info phy_info;
struct e1000_phy_stats phy_stats;
uint32_t test_icr;
u32 test_icr;
struct e1000_tx_ring test_tx_ring;
struct e1000_rx_ring test_rx_ring;
@ -341,7 +341,7 @@ struct e1000_adapter {
bool smart_power_down; /* phy smart power down */
bool quad_port_a;
unsigned long flags;
uint32_t eeprom_wol;
u32 eeprom_wol;
};
enum e1000_state_t {

160
drivers/net/e1000/e1000_ethtool.c
View file

@ -36,7 +36,7 @@ extern int e1000_up(struct e1000_adapter *adapter);
extern void e1000_down(struct e1000_adapter *adapter);
extern void e1000_reinit_locked(struct e1000_adapter *adapter);
extern void e1000_reset(struct e1000_adapter *adapter);
extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
@ -289,7 +289,7 @@ e1000_set_pauseparam(struct net_device *netdev,
return retval;
}
static uint32_t
static u32
e1000_get_rx_csum(struct net_device *netdev)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@ -297,7 +297,7 @@ e1000_get_rx_csum(struct net_device *netdev)
}
static int
e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
e1000_set_rx_csum(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
adapter->rx_csum = data;
@ -309,14 +309,14 @@ e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
return 0;
}
static uint32_t
static u32
e1000_get_tx_csum(struct net_device *netdev)
{
return (netdev->features & NETIF_F_HW_CSUM) != 0;
}
static int
e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
e1000_set_tx_csum(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@ -335,7 +335,7 @@ e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
}
static int
e1000_set_tso(struct net_device *netdev, uint32_t data)
e1000_set_tso(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
if ((adapter->hw.mac_type < e1000_82544) ||
@ -357,7 +357,7 @@ e1000_set_tso(struct net_device *netdev, uint32_t data)
return 0;
}
static uint32_t
static u32
e1000_get_msglevel(struct net_device *netdev)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@ -365,7 +365,7 @@ e1000_get_msglevel(struct net_device *netdev)
}
static void
e1000_set_msglevel(struct net_device *netdev, uint32_t data)
e1000_set_msglevel(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
adapter->msg_enable = data;
@ -375,7 +375,7 @@ static int
e1000_get_regs_len(struct net_device *netdev)
{
#define E1000_REGS_LEN 32
return E1000_REGS_LEN * sizeof(uint32_t);
return E1000_REGS_LEN * sizeof(u32);
}
static void
@ -384,10 +384,10 @@ e1000_get_regs(struct net_device *netdev,
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
uint32_t *regs_buff = p;
uint16_t phy_data;
u32 *regs_buff = p;
u16 phy_data;
memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
memset(p, 0, E1000_REGS_LEN * sizeof(u32));
regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
@ -412,44 +412,44 @@ e1000_get_regs(struct net_device *netdev,
IGP01E1000_PHY_AGC_A);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[13] = (uint32_t)phy_data; /* cable length */
regs_buff[13] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_B);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[14] = (uint32_t)phy_data; /* cable length */
regs_buff[14] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_C);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[15] = (uint32_t)phy_data; /* cable length */
regs_buff[15] = (u32)phy_data; /* cable length */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_AGC_D);
e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[16] = (uint32_t)phy_data; /* cable length */
regs_buff[16] = (u32)phy_data; /* cable length */
regs_buff[17] = 0; /* extended 10bt distance (not needed) */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
regs_buff[18] = (u32)phy_data; /* cable polarity */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
IGP01E1000_PHY_PCS_INIT_REG);
e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
IGP01E1000_PHY_PAGE_SELECT, &phy_data);
regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
regs_buff[19] = (u32)phy_data; /* cable polarity */
regs_buff[20] = 0; /* polarity correction enabled (always) */
regs_buff[22] = 0; /* phy receive errors (unavailable) */
regs_buff[23] = regs_buff[18]; /* mdix mode */
e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
} else {
e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
regs_buff[13] = (uint32_t)phy_data; /* cable length */
regs_buff[13] = (u32)phy_data; /* cable length */
regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
regs_buff[18] = regs_buff[13]; /* cable polarity */
regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
regs_buff[20] = regs_buff[17]; /* polarity correction */
@ -459,7 +459,7 @@ e1000_get_regs(struct net_device *netdev,
}
regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
regs_buff[24] = (u32)phy_data; /* phy local receiver status */
regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
if (hw->mac_type >= e1000_82540 &&
hw->mac_type < e1000_82571 &&
@ -477,14 +477,14 @@ e1000_get_eeprom_len(struct net_device *netdev)
static int
e1000_get_eeprom(struct net_device *netdev,
struct ethtool_eeprom *eeprom, uint8_t *bytes)
struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
uint16_t *eeprom_buff;
u16 *eeprom_buff;
int first_word, last_word;
int ret_val = 0;
uint16_t i;
u16 i;
if (eeprom->len == 0)
return -EINVAL;
@ -494,7 +494,7 @@ e1000_get_eeprom(struct net_device *netdev,
first_word = eeprom->offset >> 1;
last_word = (eeprom->offset + eeprom->len - 1) >> 1;
eeprom_buff = kmalloc(sizeof(uint16_t) *
eeprom_buff = kmalloc(sizeof(u16) *
(last_word - first_word + 1), GFP_KERNEL);
if (!eeprom_buff)
return -ENOMEM;
@ -514,7 +514,7 @@ e1000_get_eeprom(struct net_device *netdev,
for (i = 0; i < last_word - first_word + 1; i++)
le16_to_cpus(&eeprom_buff[i]);
memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
eeprom->len);
kfree(eeprom_buff);
@ -523,14 +523,14 @@ e1000_get_eeprom(struct net_device *netdev,
static int
e1000_set_eeprom(struct net_device *netdev,
struct ethtool_eeprom *eeprom, uint8_t *bytes)
struct ethtool_eeprom *eeprom, u8 *bytes)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
uint16_t *eeprom_buff;
u16 *eeprom_buff;
void *ptr;
int max_len, first_word, last_word, ret_val = 0;
uint16_t i;
u16 i;
if (eeprom->len == 0)
return -EOPNOTSUPP;
@ -590,7 +590,7 @@ e1000_get_drvinfo(struct net_device *netdev,
{
struct e1000_adapter *adapter = netdev_priv(netdev);
char firmware_version[32];
uint16_t eeprom_data;
u16 eeprom_data;
strncpy(drvinfo->driver, e1000_driver_name, 32);
strncpy(drvinfo->version, e1000_driver_version, 32);
@ -674,13 +674,13 @@ e1000_set_ringparam(struct net_device *netdev,
adapter->tx_ring = txdr;
adapter->rx_ring = rxdr;
rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
E1000_MAX_RXD : E1000_MAX_82544_RXD));
rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
E1000_MAX_TXD : E1000_MAX_82544_TXD));
txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
@ -728,13 +728,13 @@ err_setup:
return err;
}
static bool reg_pattern_test(struct e1000_adapter *adapter, uint64_t *data,
int reg, uint32_t mask, uint32_t write)
static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
int reg, u32 mask, u32 write)
{
static const uint32_t test[] =
static const u32 test[] =
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
uint8_t __iomem *address = adapter->hw.hw_addr + reg;
uint32_t read;
u8 __iomem *address = adapter->hw.hw_addr + reg;
u32 read;
int i;
for (i = 0; i < ARRAY_SIZE(test); i++) {
@ -751,11 +751,11 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, uint64_t *data,
return false;
}
static bool reg_set_and_check(struct e1000_adapter *adapter, uint64_t *data,
int reg, uint32_t mask, uint32_t write)
static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
int reg, u32 mask, u32 write)
{
uint8_t __iomem *address = adapter->hw.hw_addr + reg;
uint32_t read;
u8 __iomem *address = adapter->hw.hw_addr + reg;
u32 read;
writel(write & mask, address);
read = readl(address);
@ -788,10 +788,10 @@ static bool reg_set_and_check(struct e1000_adapter *adapter, uint64_t *data,
} while (0)
static int
e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
{
uint32_t value, before, after;
uint32_t i, toggle;
u32 value, before, after;
u32 i, toggle;
/* The status register is Read Only, so a write should fail.
* Some bits that get toggled are ignored.
@ -884,11 +884,11 @@ e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
}
static int
e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
{
uint16_t temp;
uint16_t checksum = 0;
uint16_t i;
u16 temp;
u16 checksum = 0;
u16 i;
*data = 0;
/* Read and add up the contents of the EEPROM */
@ -901,7 +901,7 @@ e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
}
/* If Checksum is not Correct return error else test passed */
if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
if ((checksum != (u16) EEPROM_SUM) && !(*data))
*data = 2;
return *data;
@ -919,12 +919,12 @@ e1000_test_intr(int irq, void *data)
}
static int
e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
{
struct net_device *netdev = adapter->netdev;
uint32_t mask, i = 0;
u32 mask, i = 0;
bool shared_int = true;
uint32_t irq = adapter->pdev->irq;
u32 irq = adapter->pdev->irq;
*data = 0;
@ -1070,7 +1070,7 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter)
struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
struct pci_dev *pdev = adapter->pdev;
uint32_t rctl;
u32 rctl;
int i, ret_val;
/* Setup Tx descriptor ring and Tx buffers */
@ -1096,8 +1096,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter)
txdr->next_to_use = txdr->next_to_clean = 0;
E1000_WRITE_REG(&adapter->hw, TDBAL,
((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
((u64) txdr->dma & 0x00000000FFFFFFFF));
E1000_WRITE_REG(&adapter->hw, TDBAH, ((u64) txdr->dma >> 32));
E1000_WRITE_REG(&adapter->hw, TDLEN,
txdr->count * sizeof(struct e1000_tx_desc));
E1000_WRITE_REG(&adapter->hw, TDH, 0);
@ -1153,8 +1153,8 @@ e1000_setup_desc_rings(struct e1000_adapter *adapter)
rctl = E1000_READ_REG(&adapter->hw, RCTL);
E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
E1000_WRITE_REG(&adapter->hw, RDBAL,
((uint64_t) rxdr->dma & 0xFFFFFFFF));
E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
((u64) rxdr->dma & 0xFFFFFFFF));
E1000_WRITE_REG(&adapter->hw, RDBAH, ((u64) rxdr->dma >> 32));
E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
E1000_WRITE_REG(&adapter->hw, RDH, 0);
E1000_WRITE_REG(&adapter->hw, RDT, 0);
@ -1202,7 +1202,7 @@ e1000_phy_disable_receiver(struct e1000_adapter *adapter)
static void
e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
{
uint16_t phy_reg;
u16 phy_reg;
/* Because we reset the PHY above, we need to re-force TX_CLK in the
* Extended PHY Specific Control Register to 25MHz clock. This
@ -1226,8 +1226,8 @@ e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
static int
e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
{
uint32_t ctrl_reg;
uint16_t phy_reg;
u32 ctrl_reg;
u16 phy_reg;
/* Setup the Device Control Register for PHY loopback test. */
@ -1293,8 +1293,8 @@ e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
static int
e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
{
uint32_t ctrl_reg = 0;
uint32_t stat_reg = 0;
u32 ctrl_reg = 0;
u32 stat_reg = 0;
adapter->hw.autoneg = false;
@ -1363,8 +1363,8 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
static int
e1000_set_phy_loopback(struct e1000_adapter *adapter)
{
uint16_t phy_reg = 0;
uint16_t count = 0;
u16 phy_reg = 0;
u16 count = 0;
switch (adapter->hw.mac_type) {
case e1000_82543:
@ -1416,7 +1416,7 @@ static int
e1000_setup_loopback_test(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
u32 rctl;
if (hw->media_type == e1000_media_type_fiber ||
hw->media_type == e1000_media_type_internal_serdes) {
@ -1451,8 +1451,8 @@ static void
e1000_loopback_cleanup(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl;
uint16_t phy_reg;
u32 rctl;
u16 phy_reg;
rctl = E1000_READ_REG(hw, RCTL);
rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
@ -1578,7 +1578,7 @@ e1000_run_loopback_test(struct e1000_adapter *adapter)
}
static int
e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
{
/* PHY loopback cannot be performed if SoL/IDER
* sessions are active */
@ -1603,7 +1603,7 @@ out:
}
static int
e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
e1000_link_test(struct e1000_adapter *adapter, u64 *data)
{
*data = 0;
if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
@ -1647,7 +1647,7 @@ e1000_get_sset_count(struct net_device *netdev, int sset)
static void
e1000_diag_test(struct net_device *netdev,
struct ethtool_test *eth_test, uint64_t *data)
struct ethtool_test *eth_test, u64 *data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
bool if_running = netif_running(netdev);
@ -1657,9 +1657,9 @@ e1000_diag_test(struct net_device *netdev,
/* Offline tests */
/* save speed, duplex, autoneg settings */
uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
uint8_t autoneg = adapter->hw.autoneg;
u16 autoneg_advertised = adapter->hw.autoneg_advertised;
u8 forced_speed_duplex = adapter->hw.forced_speed_duplex;
u8 autoneg = adapter->hw.autoneg;
DPRINTK(HW, INFO, "offline testing starting\n");
@ -1877,7 +1877,7 @@ e1000_led_blink_callback(unsigned long data)
}
static int
e1000_phys_id(struct net_device *netdev, uint32_t data)
e1000_phys_id(struct net_device *netdev, u32 data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
@ -1927,7 +1927,7 @@ e1000_nway_reset(struct net_device *netdev)
static void
e1000_get_ethtool_stats(struct net_device *netdev,
struct ethtool_stats *stats, uint64_t *data)
struct ethtool_stats *stats, u64 *data)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
int i;
@ -1936,15 +1936,15 @@ e1000_get_ethtool_stats(struct net_device *netdev,
for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
}
/* BUG_ON(i != E1000_STATS_LEN); */
}
static void
e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
e1000_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
{
uint8_t *p = data;
u8 *p = data;
int i;
switch (stringset) {

1324
drivers/net/e1000/e1000_hw.c
View file

File diff suppressed because it is too large Load diff

512
drivers/net/e1000/e1000_hw.h
View file

@ -100,7 +100,7 @@ typedef enum {
} e1000_fc_type;
struct e1000_shadow_ram {
uint16_t eeprom_word;
u16 eeprom_word;
bool modified;
};
@ -263,17 +263,17 @@ struct e1000_phy_info {
};
struct e1000_phy_stats {
uint32_t idle_errors;
uint32_t receive_errors;
u32 idle_errors;
u32 receive_errors;
};
struct e1000_eeprom_info {
e1000_eeprom_type type;
uint16_t word_size;
uint16_t opcode_bits;
uint16_t address_bits;
uint16_t delay_usec;
uint16_t page_size;
u16 word_size;
u16 opcode_bits;
u16 address_bits;
u16 delay_usec;
u16 page_size;
bool use_eerd;
bool use_eewr;
};
@ -308,34 +308,34 @@ typedef enum {
/* Function prototypes */
/* Initialization */
int32_t e1000_reset_hw(struct e1000_hw *hw);
int32_t e1000_init_hw(struct e1000_hw *hw);
int32_t e1000_set_mac_type(struct e1000_hw *hw);
s32 e1000_reset_hw(struct e1000_hw *hw);
s32 e1000_init_hw(struct e1000_hw *hw);
s32 e1000_set_mac_type(struct e1000_hw *hw);
void e1000_set_media_type(struct e1000_hw *hw);
/* Link Configuration */
int32_t e1000_setup_link(struct e1000_hw *hw);
int32_t e1000_phy_setup_autoneg(struct e1000_hw *hw);
s32 e1000_setup_link(struct e1000_hw *hw);
s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
void e1000_config_collision_dist(struct e1000_hw *hw);
int32_t e1000_check_for_link(struct e1000_hw *hw);
int32_t e1000_get_speed_and_duplex(struct e1000_hw *hw, uint16_t *speed, uint16_t *duplex);
int32_t e1000_force_mac_fc(struct e1000_hw *hw);
s32 e1000_check_for_link(struct e1000_hw *hw);
s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);
s32 e1000_force_mac_fc(struct e1000_hw *hw);
/* PHY */
int32_t e1000_read_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *phy_data);
int32_t e1000_write_phy_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);
int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
int32_t e1000_phy_reset(struct e1000_hw *hw);
int32_t e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
int32_t e1000_validate_mdi_setting(struct e1000_hw *hw);
s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data);
s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 data);
s32 e1000_phy_hw_reset(struct e1000_hw *hw);
s32 e1000_phy_reset(struct e1000_hw *hw);
s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
s32 e1000_validate_mdi_setting(struct e1000_hw *hw);
void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
/* EEPROM Functions */
int32_t e1000_init_eeprom_params(struct e1000_hw *hw);
s32 e1000_init_eeprom_params(struct e1000_hw *hw);
/* MNG HOST IF functions */
uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw);
#define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64
#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 /* Host Interface data length */
@ -354,80 +354,80 @@ uint32_t e1000_enable_mng_pass_thru(struct e1000_hw *hw);
#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F
struct e1000_host_mng_command_header {
uint8_t command_id;
uint8_t checksum;
uint16_t reserved1;
uint16_t reserved2;
uint16_t command_length;
u8 command_id;
u8 checksum;
u16 reserved1;
u16 reserved2;
u16 command_length;
};
struct e1000_host_mng_command_info {
struct e1000_host_mng_command_header command_header; /* Command Head/Command Result Head has 4 bytes */
uint8_t command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; /* Command data can length 0..0x658*/
u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; /* Command data can length 0..0x658*/
};
#ifdef __BIG_ENDIAN
struct e1000_host_mng_dhcp_cookie{
uint32_t signature;
uint16_t vlan_id;
uint8_t reserved0;
uint8_t status;
uint32_t reserved1;
uint8_t checksum;
uint8_t reserved3;
uint16_t reserved2;
u32 signature;
u16 vlan_id;
u8 reserved0;
u8 status;
u32 reserved1;
u8 checksum;
u8 reserved3;
u16 reserved2;
};
#else
struct e1000_host_mng_dhcp_cookie{
uint32_t signature;
uint8_t status;
uint8_t reserved0;
uint16_t vlan_id;
uint32_t reserved1;
uint16_t reserved2;
uint8_t reserved3;
uint8_t checksum;
u32 signature;
u8 status;
u8 reserved0;
u16 vlan_id;
u32 reserved1;
u16 reserved2;
u8 reserved3;
u8 checksum;
};
#endif
int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer,
uint16_t length);
s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer,
u16 length);
bool e1000_check_mng_mode(struct e1000_hw *hw);
bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw);
int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw);
int32_t e1000_write_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data);
int32_t e1000_read_mac_addr(struct e1000_hw * hw);
s32 e1000_read_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw);
s32 e1000_update_eeprom_checksum(struct e1000_hw *hw);
s32 e1000_write_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
s32 e1000_read_mac_addr(struct e1000_hw * hw);
/* Filters (multicast, vlan, receive) */
uint32_t e1000_hash_mc_addr(struct e1000_hw *hw, uint8_t * mc_addr);
void e1000_mta_set(struct e1000_hw *hw, uint32_t hash_value);
void e1000_rar_set(struct e1000_hw *hw, uint8_t * mc_addr, uint32_t rar_index);
void e1000_write_vfta(struct e1000_hw *hw, uint32_t offset, uint32_t value);
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 * mc_addr);
void e1000_mta_set(struct e1000_hw *hw, u32 hash_value);
void e1000_rar_set(struct e1000_hw *hw, u8 * mc_addr, u32 rar_index);
void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
/* LED functions */
int32_t e1000_setup_led(struct e1000_hw *hw);
int32_t e1000_cleanup_led(struct e1000_hw *hw);
int32_t e1000_led_on(struct e1000_hw *hw);
int32_t e1000_led_off(struct e1000_hw *hw);
int32_t e1000_blink_led_start(struct e1000_hw *hw);
s32 e1000_setup_led(struct e1000_hw *hw);
s32 e1000_cleanup_led(struct e1000_hw *hw);
s32 e1000_led_on(struct e1000_hw *hw);
s32 e1000_led_off(struct e1000_hw *hw);
s32 e1000_blink_led_start(struct e1000_hw *hw);
/* Adaptive IFS Functions */
/* Everything else */
void e1000_reset_adaptive(struct e1000_hw *hw);
void e1000_update_adaptive(struct e1000_hw *hw);
void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, uint32_t frame_len, uint8_t * mac_addr);
void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, u32 frame_len, u8 * mac_addr);
void e1000_get_bus_info(struct e1000_hw *hw);
void e1000_pci_set_mwi(struct e1000_hw *hw);
void e1000_pci_clear_mwi(struct e1000_hw *hw);
int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value);
s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc);
int e1000_pcix_get_mmrbc(struct e1000_hw *hw);
/* Port I/O is only supported on 82544 and newer */
void e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value);
int32_t e1000_disable_pciex_master(struct e1000_hw *hw);
int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value);
s32 e1000_disable_pciex_master(struct e1000_hw *hw);
s32 e1000_check_phy_reset_block(struct e1000_hw *hw);
#define E1000_READ_REG_IO(a, reg) \
@ -596,8 +596,8 @@ struct e1000_rx_desc {
__le64 buffer_addr; /* Address of the descriptor's data buffer */
__le16 length; /* Length of data DMAed into data buffer */
__le16 csum; /* Packet checksum */
uint8_t status; /* Descriptor status */
uint8_t errors; /* Descriptor Errors */
u8 status; /* Descriptor status */
u8 errors; /* Descriptor Errors */
__le16 special;
};
@ -718,15 +718,15 @@ struct e1000_tx_desc {
__le32 data;
struct {
__le16 length; /* Data buffer length */
uint8_t cso; /* Checksum offset */
uint8_t cmd; /* Descriptor control */
u8 cso; /* Checksum offset */
u8 cmd; /* Descriptor control */
} flags;
} lower;
union {
__le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t css; /* Checksum start */
u8 status; /* Descriptor status */
u8 css; /* Checksum start */
__le16 special;
} fields;
} upper;
@ -759,16 +759,16 @@ struct e1000_context_desc {
union {
__le32 ip_config;
struct {
uint8_t ipcss; /* IP checksum start */
uint8_t ipcso; /* IP checksum offset */
u8 ipcss; /* IP checksum start */
u8 ipcso; /* IP checksum offset */
__le16 ipcse; /* IP checksum end */
} ip_fields;
} lower_setup;
union {
__le32 tcp_config;
struct {
uint8_t tucss; /* TCP checksum start */
uint8_t tucso; /* TCP checksum offset */
u8 tucss; /* TCP checksum start */
u8 tucso; /* TCP checksum offset */
__le16 tucse; /* TCP checksum end */
} tcp_fields;
} upper_setup;
@ -776,8 +776,8 @@ struct e1000_context_desc {
union {
__le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t hdr_len; /* Header length */
u8 status; /* Descriptor status */
u8 hdr_len; /* Header length */
__le16 mss; /* Maximum segment size */
} fields;
} tcp_seg_setup;
@ -790,15 +790,15 @@ struct e1000_data_desc {
__le32 data;
struct {
__le16 length; /* Data buffer length */
uint8_t typ_len_ext; /* */
uint8_t cmd; /* */
u8 typ_len_ext; /* */
u8 cmd; /* */
} flags;
} lower;
union {
__le32 data;
struct {
uint8_t status; /* Descriptor status */
uint8_t popts; /* Packet Options */
u8 status; /* Descriptor status */
u8 popts; /* Packet Options */
__le16 special; /* */
} fields;
} upper;
@ -825,8 +825,8 @@ struct e1000_rar {
/* IPv4 Address Table Entry */
struct e1000_ipv4_at_entry {
volatile uint32_t ipv4_addr; /* IP Address (RW) */
volatile uint32_t reserved;
volatile u32 ipv4_addr; /* IP Address (RW) */
volatile u32 reserved;
};
/* Four wakeup IP addresses are supported */
@ -837,25 +837,25 @@ struct e1000_ipv4_at_entry {
/* IPv6 Address Table Entry */
struct e1000_ipv6_at_entry {
volatile uint8_t ipv6_addr[16];
volatile u8 ipv6_addr[16];
};
/* Flexible Filter Length Table Entry */
struct e1000_fflt_entry {
volatile uint32_t length; /* Flexible Filter Length (RW) */
volatile uint32_t reserved;
volatile u32 length; /* Flexible Filter Length (RW) */
volatile u32 reserved;
};
/* Flexible Filter Mask Table Entry */
struct e1000_ffmt_entry {
volatile uint32_t mask; /* Flexible Filter Mask (RW) */
volatile uint32_t reserved;
volatile u32 mask; /* Flexible Filter Mask (RW) */
volatile u32 reserved;
};
/* Flexible Filter Value Table Entry */
struct e1000_ffvt_entry {
volatile uint32_t value; /* Flexible Filter Value (RW) */
volatile uint32_t reserved;
volatile u32 value; /* Flexible Filter Value (RW) */
volatile u32 reserved;
};
/* Four Flexible Filters are supported */
@ -1309,89 +1309,89 @@ struct e1000_ffvt_entry {
/* Statistics counters collected by the MAC */
struct e1000_hw_stats {
uint64_t crcerrs;
uint64_t algnerrc;
uint64_t symerrs;
uint64_t rxerrc;
uint64_t txerrc;
uint64_t mpc;
uint64_t scc;
uint64_t ecol;
uint64_t mcc;
uint64_t latecol;
uint64_t colc;
uint64_t dc;
uint64_t tncrs;
uint64_t sec;
uint64_t cexterr;
uint64_t rlec;
uint64_t xonrxc;
uint64_t xontxc;
uint64_t xoffrxc;
uint64_t xofftxc;
uint64_t fcruc;
uint64_t prc64;
uint64_t prc127;
uint64_t prc255;
uint64_t prc511;
uint64_t prc1023;
uint64_t prc1522;
uint64_t gprc;
uint64_t bprc;
uint64_t mprc;
uint64_t gptc;
uint64_t gorcl;
uint64_t gorch;
uint64_t gotcl;
uint64_t gotch;
uint64_t rnbc;
uint64_t ruc;
uint64_t rfc;
uint64_t roc;
uint64_t rlerrc;
uint64_t rjc;
uint64_t mgprc;
uint64_t mgpdc;
uint64_t mgptc;
uint64_t torl;
uint64_t torh;
uint64_t totl;
uint64_t toth;
uint64_t tpr;
uint64_t tpt;
uint64_t ptc64;
uint64_t ptc127;
uint64_t ptc255;
uint64_t ptc511;
uint64_t ptc1023;
uint64_t ptc1522;
uint64_t mptc;
uint64_t bptc;
uint64_t tsctc;
uint64_t tsctfc;
uint64_t iac;
uint64_t icrxptc;
uint64_t icrxatc;
uint64_t ictxptc;
uint64_t ictxatc;
uint64_t ictxqec;
uint64_t ictxqmtc;
uint64_t icrxdmtc;
uint64_t icrxoc;
u64 crcerrs;
u64 algnerrc;
u64 symerrs;
u64 rxerrc;
u64 txerrc;
u64 mpc;
u64 scc;
u64 ecol;
u64 mcc;
u64 latecol;
u64 colc;
u64 dc;
u64 tncrs;
u64 sec;
u64 cexterr;
u64 rlec;
u64 xonrxc;
u64 xontxc;
u64 xoffrxc;
u64 xofftxc;
u64 fcruc;
u64 prc64;
u64 prc127;
u64 prc255;
u64 prc511;
u64 prc1023;
u64 prc1522;
u64 gprc;
u64 bprc;
u64 mprc;
u64 gptc;
u64 gorcl;
u64 gorch;
u64 gotcl;
u64 gotch;
u64 rnbc;
u64 ruc;
u64 rfc;
u64 roc;
u64 rlerrc;
u64 rjc;
u64 mgprc;
u64 mgpdc;
u64 mgptc;
u64 torl;
u64 torh;
u64 totl;
u64 toth;
u64 tpr;
u64 tpt;
u64 ptc64;
u64 ptc127;
u64 ptc255;
u64 ptc511;
u64 ptc1023;
u64 ptc1522;
u64 mptc;
u64 bptc;
u64 tsctc;
u64 tsctfc;
u64 iac;
u64 icrxptc;
u64 icrxatc;
u64 ictxptc;
u64 ictxatc;
u64 ictxqec;
u64 ictxqmtc;
u64 icrxdmtc;
u64 icrxoc;
};
/* Structure containing variables used by the shared code (e1000_hw.c) */
struct e1000_hw {
uint8_t __iomem *hw_addr;
uint8_t __iomem *flash_address;
u8 __iomem *hw_addr;
u8 __iomem *flash_address;
e1000_mac_type mac_type;
e1000_phy_type phy_type;
uint32_t phy_init_script;
u32 phy_init_script;
e1000_media_type media_type;
void *back;
struct e1000_shadow_ram *eeprom_shadow_ram;
uint32_t flash_bank_size;
uint32_t flash_base_addr;
u32 flash_bank_size;
u32 flash_base_addr;
e1000_fc_type fc;
e1000_bus_speed bus_speed;
e1000_bus_width bus_width;
@ -1400,51 +1400,51 @@ struct e1000_hw {
e1000_ms_type master_slave;
e1000_ms_type original_master_slave;
e1000_ffe_config ffe_config_state;
uint32_t asf_firmware_present;
uint32_t eeprom_semaphore_present;
uint32_t swfw_sync_present;
uint32_t swfwhw_semaphore_present;
u32 asf_firmware_present;
u32 eeprom_semaphore_present;
u32 swfw_sync_present;
u32 swfwhw_semaphore_present;
unsigned long io_base;
uint32_t phy_id;
uint32_t phy_revision;
uint32_t phy_addr;
uint32_t original_fc;
uint32_t txcw;
uint32_t autoneg_failed;
uint32_t max_frame_size;
uint32_t min_frame_size;
uint32_t mc_filter_type;
uint32_t num_mc_addrs;
uint32_t collision_delta;
uint32_t tx_packet_delta;
uint32_t ledctl_default;
uint32_t ledctl_mode1;
uint32_t ledctl_mode2;
u32 phy_id;
u32 phy_revision;
u32 phy_addr;
u32 original_fc;
u32 txcw;
u32 autoneg_failed;
u32 max_frame_size;
u32 min_frame_size;
u32 mc_filter_type;
u32 num_mc_addrs;
u32 collision_delta;
u32 tx_packet_delta;
u32 ledctl_default;
u32 ledctl_mode1;
u32 ledctl_mode2;
bool tx_pkt_filtering;
struct e1000_host_mng_dhcp_cookie mng_cookie;
uint16_t phy_spd_default;
uint16_t autoneg_advertised;
uint16_t pci_cmd_word;
uint16_t fc_high_water;
uint16_t fc_low_water;
uint16_t fc_pause_time;
uint16_t current_ifs_val;
uint16_t ifs_min_val;
uint16_t ifs_max_val;
uint16_t ifs_step_size;
uint16_t ifs_ratio;
uint16_t device_id;
uint16_t vendor_id;
uint16_t subsystem_id;
uint16_t subsystem_vendor_id;
uint8_t revision_id;
uint8_t autoneg;
uint8_t mdix;
uint8_t forced_speed_duplex;
uint8_t wait_autoneg_complete;
uint8_t dma_fairness;
uint8_t mac_addr[NODE_ADDRESS_SIZE];
uint8_t perm_mac_addr[NODE_ADDRESS_SIZE];
u16 phy_spd_default;
u16 autoneg_advertised;
u16 pci_cmd_word;
u16 fc_high_water;
u16 fc_low_water;
u16 fc_pause_time;
u16 current_ifs_val;
u16 ifs_min_val;
u16 ifs_max_val;
u16 ifs_step_size;
u16 ifs_ratio;
u16 device_id;
u16 vendor_id;
u16 subsystem_id;
u16 subsystem_vendor_id;
u8 revision_id;
u8 autoneg;
u8 mdix;
u8 forced_speed_duplex;
u8 wait_autoneg_complete;
u8 dma_fairness;
u8 mac_addr[NODE_ADDRESS_SIZE];
u8 perm_mac_addr[NODE_ADDRESS_SIZE];
bool disable_polarity_correction;
bool speed_downgraded;
e1000_smart_speed smart_speed;
@ -2165,14 +2165,14 @@ typedef enum {
#define E1000_HI_COMMAND_TIMEOUT 500 /* Time in ms to process HI command */
struct e1000_host_command_header {
uint8_t command_id;
uint8_t command_length;
uint8_t command_options; /* I/F bits for command, status for return */
uint8_t checksum;
u8 command_id;
u8 command_length;
u8 command_options; /* I/F bits for command, status for return */
u8 checksum;
};
struct e1000_host_command_info {
struct e1000_host_command_header command_header; /* Command Head/Command Result Head has 4 bytes */
uint8_t command_data[E1000_HI_MAX_DATA_LENGTH]; /* Command data can length 0..252 */
u8 command_data[E1000_HI_MAX_DATA_LENGTH]; /* Command data can length 0..252 */
};
/* Host SMB register #0 */
@ -2495,7 +2495,7 @@ struct e1000_host_command_info {
/* Number of milliseconds we wait for PHY configuration done after MAC reset */
#define PHY_CFG_TIMEOUT 100
#define E1000_TX_BUFFER_SIZE ((uint32_t)1514)
#define E1000_TX_BUFFER_SIZE ((u32)1514)
/* The carrier extension symbol, as received by the NIC. */
#define CARRIER_EXTENSION 0x0F
@ -3312,68 +3312,68 @@ struct e1000_host_command_info {
/* Offset 04h HSFSTS */
union ich8_hws_flash_status {
struct ich8_hsfsts {
#ifdef E1000_BIG_ENDIAN
uint16_t reserved2 :6;
uint16_t fldesvalid :1;
uint16_t flockdn :1;
uint16_t flcdone :1;
uint16_t flcerr :1;
uint16_t dael :1;
uint16_t berasesz :2;
uint16_t flcinprog :1;
uint16_t reserved1 :2;
#ifdef __BIG_ENDIAN
u16 reserved2 :6;
u16 fldesvalid :1;
u16 flockdn :1;
u16 flcdone :1;
u16 flcerr :1;
u16 dael :1;
u16 berasesz :2;
u16 flcinprog :1;
u16 reserved1 :2;
#else
uint16_t flcdone :1; /* bit 0 Flash Cycle Done */
uint16_t flcerr :1; /* bit 1 Flash Cycle Error */
uint16_t dael :1; /* bit 2 Direct Access error Log */
uint16_t berasesz :2; /* bit 4:3 Block/Sector Erase Size */
uint16_t flcinprog :1; /* bit 5 flash SPI cycle in Progress */
uint16_t reserved1 :2; /* bit 13:6 Reserved */
uint16_t reserved2 :6; /* bit 13:6 Reserved */
uint16_t fldesvalid :1; /* bit 14 Flash Descriptor Valid */
uint16_t flockdn :1; /* bit 15 Flash Configuration Lock-Down */
u16 flcdone :1; /* bit 0 Flash Cycle Done */
u16 flcerr :1; /* bit 1 Flash Cycle Error */
u16 dael :1; /* bit 2 Direct Access error Log */
u16 berasesz :2; /* bit 4:3 Block/Sector Erase Size */
u16 flcinprog :1; /* bit 5 flash SPI cycle in Progress */
u16 reserved1 :2; /* bit 13:6 Reserved */
u16 reserved2 :6; /* bit 13:6 Reserved */
u16 fldesvalid :1; /* bit 14 Flash Descriptor Valid */
u16 flockdn :1; /* bit 15 Flash Configuration Lock-Down */
#endif
} hsf_status;
uint16_t regval;
u16 regval;
};
/* ICH8 GbE Flash Hardware Sequencing Flash control Register bit breakdown */
/* Offset 06h FLCTL */
union ich8_hws_flash_ctrl {
struct ich8_hsflctl {
#ifdef E1000_BIG_ENDIAN
uint16_t fldbcount :2;
uint16_t flockdn :6;
uint16_t flcgo :1;
uint16_t flcycle :2;
uint16_t reserved :5;
#ifdef __BIG_ENDIAN
u16 fldbcount :2;
u16 flockdn :6;
u16 flcgo :1;
u16 flcycle :2;
u16 reserved :5;
#else
uint16_t flcgo :1; /* 0 Flash Cycle Go */
uint16_t flcycle :2; /* 2:1 Flash Cycle */
uint16_t reserved :5; /* 7:3 Reserved */
uint16_t fldbcount :2; /* 9:8 Flash Data Byte Count */
uint16_t flockdn :6; /* 15:10 Reserved */
u16 flcgo :1; /* 0 Flash Cycle Go */
u16 flcycle :2; /* 2:1 Flash Cycle */
u16 reserved :5; /* 7:3 Reserved */
u16 fldbcount :2; /* 9:8 Flash Data Byte Count */
u16 flockdn :6; /* 15:10 Reserved */
#endif
} hsf_ctrl;
uint16_t regval;
u16 regval;
};
/* ICH8 Flash Region Access Permissions */
union ich8_hws_flash_regacc {
struct ich8_flracc {
#ifdef E1000_BIG_ENDIAN
uint32_t gmwag :8;
uint32_t gmrag :8;
uint32_t grwa :8;
uint32_t grra :8;
#ifdef __BIG_ENDIAN
u32 gmwag :8;
u32 gmrag :8;
u32 grwa :8;
u32 grra :8;
#else
uint32_t grra :8; /* 0:7 GbE region Read Access */
uint32_t grwa :8; /* 8:15 GbE region Write Access */
uint32_t gmrag :8; /* 23:16 GbE Master Read Access Grant */
uint32_t gmwag :8; /* 31:24 GbE Master Write Access Grant */
u32 grra :8; /* 0:7 GbE region Read Access */
u32 grwa :8; /* 8:15 GbE region Write Access */
u32 gmrag :8; /* 23:16 GbE Master Read Access Grant */
u32 gmwag :8; /* 31:24 GbE Master Write Access Grant */
#endif
} hsf_flregacc;
uint16_t regval;
u16 regval;
};
/* Miscellaneous PHY bit definitions. */

174
drivers/net/e1000/e1000_main.c
View file

@ -127,7 +127,7 @@ int e1000_up(struct e1000_adapter *adapter);
void e1000_down(struct e1000_adapter *adapter);
void e1000_reinit_locked(struct e1000_adapter *adapter);
void e1000_reset(struct e1000_adapter *adapter);
int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
@ -203,8 +203,8 @@ static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
struct sk_buff *skb);
static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
static void e1000_restore_vlan(struct e1000_adapter *adapter);
static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
@ -368,8 +368,8 @@ static void
e1000_update_mng_vlan(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
uint16_t vid = adapter->hw.mng_cookie.vlan_id;
uint16_t old_vid = adapter->mng_vlan_id;
u16 vid = adapter->hw.mng_cookie.vlan_id;
u16 old_vid = adapter->mng_vlan_id;
if (adapter->vlgrp) {
if (!vlan_group_get_device(adapter->vlgrp, vid)) {
if (adapter->hw.mng_cookie.status &
@ -379,7 +379,7 @@ e1000_update_mng_vlan(struct e1000_adapter *adapter)
} else
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
(vid != old_vid) &&
!vlan_group_get_device(adapter->vlgrp, old_vid))
e1000_vlan_rx_kill_vid(netdev, old_vid);
@ -402,8 +402,8 @@ e1000_update_mng_vlan(struct e1000_adapter *adapter)
static void
e1000_release_hw_control(struct e1000_adapter *adapter)
{
uint32_t ctrl_ext;
uint32_t swsm;
u32 ctrl_ext;
u32 swsm;
/* Let firmware taken over control of h/w */
switch (adapter->hw.mac_type) {
@ -439,8 +439,8 @@ e1000_release_hw_control(struct e1000_adapter *adapter)
static void
e1000_get_hw_control(struct e1000_adapter *adapter)
{
uint32_t ctrl_ext;
uint32_t swsm;
u32 ctrl_ext;
u32 swsm;
/* Let firmware know the driver has taken over */
switch (adapter->hw.mac_type) {
@ -466,7 +466,7 @@ static void
e1000_init_manageability(struct e1000_adapter *adapter)
{
if (adapter->en_mng_pt) {
uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
u32 manc = E1000_READ_REG(&adapter->hw, MANC);
/* disable hardware interception of ARP */
manc &= ~(E1000_MANC_ARP_EN);
@ -475,7 +475,7 @@ e1000_init_manageability(struct e1000_adapter *adapter)
/* this will probably generate destination unreachable messages
* from the host OS, but the packets will be handled on SMBUS */
if (adapter->hw.has_manc2h) {
uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
u32 manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
manc |= E1000_MANC_EN_MNG2HOST;
#define E1000_MNG2HOST_PORT_623 (1 << 5)
@ -493,7 +493,7 @@ static void
e1000_release_manageability(struct e1000_adapter *adapter)
{
if (adapter->en_mng_pt) {
uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
u32 manc = E1000_READ_REG(&adapter->hw, MANC);
/* re-enable hardware interception of ARP */
manc |= E1000_MANC_ARP_EN;
@ -566,7 +566,7 @@ int e1000_up(struct e1000_adapter *adapter)
void e1000_power_up_phy(struct e1000_adapter *adapter)
{
uint16_t mii_reg = 0;
u16 mii_reg = 0;
/* Just clear the power down bit to wake the phy back up */
if (adapter->hw.media_type == e1000_media_type_copper) {
@ -587,7 +587,7 @@ static void e1000_power_down_phy(struct e1000_adapter *adapter)
* (c) SoL/IDER session is active */
if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
adapter->hw.media_type == e1000_media_type_copper) {
uint16_t mii_reg = 0;
u16 mii_reg = 0;
switch (adapter->hw.mac_type) {
case e1000_82540:
@ -667,8 +667,8 @@ e1000_reinit_locked(struct e1000_adapter *adapter)
void
e1000_reset(struct e1000_adapter *adapter)
{
uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
u32 pba = 0, tx_space, min_tx_space, min_rx_space;
u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
bool legacy_pba_adjust = false;
/* Repartition Pba for greater than 9k mtu
@ -815,7 +815,7 @@ e1000_reset(struct e1000_adapter *adapter)
adapter->hw.mac_type <= e1000_82547_rev_2 &&
adapter->hw.autoneg == 1 &&
adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
u32 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
/* clear phy power management bit if we are in gig only mode,
* which if enabled will attempt negotiation to 100Mb, which
* can cause a loss of link at power off or driver unload */
@ -832,7 +832,7 @@ e1000_reset(struct e1000_adapter *adapter)
if (!adapter->smart_power_down &&
(adapter->hw.mac_type == e1000_82571 ||
adapter->hw.mac_type == e1000_82572)) {
uint16_t phy_data = 0;
u16 phy_data = 0;
/* speed up time to link by disabling smart power down, ignore
* the return value of this function because there is nothing
* different we would do if it failed */
@ -926,8 +926,8 @@ e1000_probe(struct pci_dev *pdev,
static int cards_found = 0;
static int global_quad_port_a = 0; /* global ksp3 port a indication */
int i, err, pci_using_dac;
uint16_t eeprom_data = 0;
uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
u16 eeprom_data = 0;
u16 eeprom_apme_mask = E1000_EEPROM_APME;
DECLARE_MAC_BUF(mac);
if ((err = pci_enable_device(pdev)))
@ -1702,10 +1702,10 @@ e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
static void
e1000_configure_tx(struct e1000_adapter *adapter)
{
uint64_t tdba;
u64 tdba;
struct e1000_hw *hw = &adapter->hw;
uint32_t tdlen, tctl, tipg, tarc;
uint32_t ipgr1, ipgr2;
u32 tdlen, tctl, tipg, tarc;
u32 ipgr1, ipgr2;
/* Setup the HW Tx Head and Tail descriptor pointers */
@ -1947,10 +1947,10 @@ e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
static void
e1000_setup_rctl(struct e1000_adapter *adapter)
{
uint32_t rctl, rfctl;
uint32_t psrctl = 0;
u32 rctl, rfctl;
u32 psrctl = 0;
#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
uint32_t pages = 0;
u32 pages = 0;
#endif
rctl = E1000_READ_REG(&adapter->hw, RCTL);
@ -2065,9 +2065,9 @@ e1000_setup_rctl(struct e1000_adapter *adapter)
static void
e1000_configure_rx(struct e1000_adapter *adapter)
{
uint64_t rdba;
u64 rdba;
struct e1000_hw *hw = &adapter->hw;
uint32_t rdlen, rctl, rxcsum, ctrl_ext;
u32 rdlen, rctl, rxcsum, ctrl_ext;
if (adapter->rx_ps_pages) {
/* this is a 32 byte descriptor */
@ -2387,7 +2387,7 @@ static void
e1000_enter_82542_rst(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
uint32_t rctl;
u32 rctl;
e1000_pci_clear_mwi(&adapter->hw);
@ -2405,7 +2405,7 @@ static void
e1000_leave_82542_rst(struct e1000_adapter *adapter)
{
struct net_device *netdev = adapter->netdev;
uint32_t rctl;
u32 rctl;
rctl = E1000_READ_REG(&adapter->hw, RCTL);
rctl &= ~E1000_RCTL_RST;
@ -2490,8 +2490,8 @@ e1000_set_rx_mode(struct net_device *netdev)
struct e1000_hw *hw = &adapter->hw;
struct dev_addr_list *uc_ptr;
struct dev_addr_list *mc_ptr;
uint32_t rctl;
uint32_t hash_value;
u32 rctl;
u32 hash_value;
int i, rar_entries = E1000_RAR_ENTRIES;
int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
E1000_NUM_MTA_REGISTERS_ICH8LAN :
@ -2595,7 +2595,7 @@ e1000_82547_tx_fifo_stall(unsigned long data)
{
struct e1000_adapter *adapter = (struct e1000_adapter *) data;
struct net_device *netdev = adapter->netdev;
uint32_t tctl;
u32 tctl;
if (atomic_read(&adapter->tx_fifo_stall)) {
if ((E1000_READ_REG(&adapter->hw, TDT) ==
@ -2637,8 +2637,8 @@ e1000_watchdog(unsigned long data)
struct e1000_adapter *adapter = (struct e1000_adapter *) data;
struct net_device *netdev = adapter->netdev;
struct e1000_tx_ring *txdr = adapter->tx_ring;
uint32_t link, tctl;
int32_t ret_val;
u32 link, tctl;
s32 ret_val;
ret_val = e1000_check_for_link(&adapter->hw);
if ((ret_val == E1000_ERR_PHY) &&
@ -2663,7 +2663,7 @@ e1000_watchdog(unsigned long data)
if (link) {
if (!netif_carrier_ok(netdev)) {
uint32_t ctrl;
u32 ctrl;
bool txb2b = true;
e1000_get_speed_and_duplex(&adapter->hw,
&adapter->link_speed,
@ -2700,7 +2700,7 @@ e1000_watchdog(unsigned long data)
if ((adapter->hw.mac_type == e1000_82571 ||
adapter->hw.mac_type == e1000_82572) &&
!txb2b) {
uint32_t tarc0;
u32 tarc0;
tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
tarc0 &= ~(1 << 21);
E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
@ -2742,7 +2742,7 @@ e1000_watchdog(unsigned long data)
/* make sure the receive unit is started */
if (adapter->hw.rx_needs_kicking) {
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl = E1000_READ_REG(hw, RCTL);
u32 rctl = E1000_READ_REG(hw, RCTL);
E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
}
}
@ -2832,7 +2832,7 @@ enum latency_range {
* @bytes: the number of bytes during this measurement interval
**/
static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
uint16_t itr_setting,
u16 itr_setting,
int packets,
int bytes)
{
@ -2884,8 +2884,8 @@ update_itr_done:
static void e1000_set_itr(struct e1000_adapter *adapter)
{
struct e1000_hw *hw = &adapter->hw;
uint16_t current_itr;
uint32_t new_itr = adapter->itr;
u16 current_itr;
u32 new_itr = adapter->itr;
if (unlikely(hw->mac_type < e1000_82540))
return;
@ -2959,9 +2959,9 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
struct e1000_context_desc *context_desc;
struct e1000_buffer *buffer_info;
unsigned int i;
uint32_t cmd_length = 0;
uint16_t ipcse = 0, tucse, mss;
uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
u32 cmd_length = 0;
u16 ipcse = 0, tucse, mss;
u8 ipcss, ipcso, tucss, tucso, hdr_len;
int err;
if (skb_is_gso(skb)) {
@ -3032,7 +3032,7 @@ e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
struct e1000_context_desc *context_desc;
struct e1000_buffer *buffer_info;
unsigned int i;
uint8_t css;
u8 css;
if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
css = skb_transport_offset(skb);
@ -3177,7 +3177,7 @@ e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
{
struct e1000_tx_desc *tx_desc = NULL;
struct e1000_buffer *buffer_info;
uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
unsigned int i;
if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
@ -3241,8 +3241,8 @@ e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
static int
e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
{
uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
@ -3269,7 +3269,7 @@ static int
e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
{
struct e1000_hw *hw = &adapter->hw;
uint16_t length, offset;
u16 length, offset;
if (vlan_tx_tag_present(skb)) {
if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
( adapter->hw.mng_cookie.status &
@ -3280,17 +3280,17 @@ e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
struct ethhdr *eth = (struct ethhdr *) skb->data;
if ((htons(ETH_P_IP) == eth->h_proto)) {
const struct iphdr *ip =
(struct iphdr *)((uint8_t *)skb->data+14);
(struct iphdr *)((u8 *)skb->data+14);
if (IPPROTO_UDP == ip->protocol) {
struct udphdr *udp =
(struct udphdr *)((uint8_t *)ip +
(struct udphdr *)((u8 *)ip +
(ip->ihl << 2));
if (ntohs(udp->dest) == 67) {
offset = (uint8_t *)udp + 8 - skb->data;
offset = (u8 *)udp + 8 - skb->data;
length = skb->len - offset;
return e1000_mng_write_dhcp_info(hw,
(uint8_t *)udp + 8,
(u8 *)udp + 8,
length);
}
}
@ -3370,7 +3370,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
* overrun the FIFO, adjust the max buffer len if mss
* drops. */
if (mss) {
uint8_t hdr_len;
u8 hdr_len;
max_per_txd = min(mss << 2, max_per_txd);
max_txd_pwr = fls(max_per_txd) - 1;
@ -3557,7 +3557,7 @@ e1000_change_mtu(struct net_device *netdev, int new_mtu)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
uint16_t eeprom_data = 0;
u16 eeprom_data = 0;
if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
(max_frame > MAX_JUMBO_FRAME_SIZE)) {
@ -3652,7 +3652,7 @@ e1000_update_stats(struct e1000_adapter *adapter)
struct e1000_hw *hw = &adapter->hw;
struct pci_dev *pdev = adapter->pdev;
unsigned long flags;
uint16_t phy_tmp;
u16 phy_tmp;
#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
@ -3829,7 +3829,7 @@ e1000_intr_msi(int irq, void *data)
#ifndef CONFIG_E1000_NAPI
int i;
#endif
uint32_t icr = E1000_READ_REG(hw, ICR);
u32 icr = E1000_READ_REG(hw, ICR);
/* in NAPI mode read ICR disables interrupts using IAM */
@ -3841,7 +3841,7 @@ e1000_intr_msi(int irq, void *data)
if (netif_carrier_ok(netdev) &&
(adapter->hw.mac_type == e1000_80003es2lan)) {
/* disable receives */
uint32_t rctl = E1000_READ_REG(hw, RCTL);
u32 rctl = E1000_READ_REG(hw, RCTL);
E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
}
/* guard against interrupt when we're going down */
@ -3888,7 +3888,7 @@ e1000_intr(int irq, void *data)
struct net_device *netdev = data;
struct e1000_adapter *adapter = netdev_priv(netdev);
struct e1000_hw *hw = &adapter->hw;
uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
u32 rctl, icr = E1000_READ_REG(hw, ICR);
#ifndef CONFIG_E1000_NAPI
int i;
#endif
@ -4139,11 +4139,11 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter,
static void
e1000_rx_checksum(struct e1000_adapter *adapter,
uint32_t status_err, uint32_t csum,
u32 status_err, u32 csum,
struct sk_buff *skb)
{
uint16_t status = (uint16_t)status_err;
uint8_t errors = (uint8_t)(status_err >> 24);
u16 status = (u16)status_err;
u8 errors = (u8)(status_err >> 24);
skb->ip_summed = CHECKSUM_NONE;
/* 82543 or newer only */
@ -4200,8 +4200,8 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter,
struct e1000_rx_desc *rx_desc, *next_rxd;
struct e1000_buffer *buffer_info, *next_buffer;
unsigned long flags;
uint32_t length;
uint8_t last_byte;
u32 length;
u8 last_byte;
unsigned int i;
int cleaned_count = 0;
bool cleaned = false;
@ -4301,8 +4301,8 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter,
/* Receive Checksum Offload */
e1000_rx_checksum(adapter,
(uint32_t)(status) |
((uint32_t)(rx_desc->errors) << 24),
(u32)(status) |
((u32)(rx_desc->errors) << 24),
le16_to_cpu(rx_desc->csum), skb);
skb->protocol = eth_type_trans(skb, netdev);
@ -4376,7 +4376,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
struct e1000_ps_page_dma *ps_page_dma;
struct sk_buff *skb;
unsigned int i, j;
uint32_t length, staterr;
u32 length, staterr;
int cleaned_count = 0;
bool cleaned = false;
unsigned int total_rx_bytes=0, total_rx_packets=0;
@ -4759,8 +4759,8 @@ no_buffers:
static void
e1000_smartspeed(struct e1000_adapter *adapter)
{
uint16_t phy_status;
uint16_t phy_ctrl;
u16 phy_status;
u16 phy_ctrl;
if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
!(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
@ -4839,8 +4839,8 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
struct e1000_adapter *adapter = netdev_priv(netdev);
struct mii_ioctl_data *data = if_mii(ifr);
int retval;
uint16_t mii_reg;
uint16_t spddplx;
u16 mii_reg;
u16 spddplx;
unsigned long flags;
if (adapter->hw.media_type != e1000_media_type_copper)
@ -4959,11 +4959,11 @@ e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
pcix_set_mmrbc(adapter->pdev, mmrbc);
}
int32_t
e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
s32
e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
{
struct e1000_adapter *adapter = hw->back;
uint16_t cap_offset;
u16 cap_offset;
cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
if (!cap_offset)
@ -4975,7 +4975,7 @@ e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
}
void
e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
{
outl(value, port);
}
@ -4984,7 +4984,7 @@ static void
e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t ctrl, rctl;
u32 ctrl, rctl;
if (!test_bit(__E1000_DOWN, &adapter->flags))
e1000_irq_disable(adapter);
@ -5016,7 +5016,7 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
rctl &= ~E1000_RCTL_VFE;
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
if (adapter->mng_vlan_id !=
(uint16_t)E1000_MNG_VLAN_NONE) {
(u16)E1000_MNG_VLAN_NONE) {
e1000_vlan_rx_kill_vid(netdev,
adapter->mng_vlan_id);
adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
@ -5029,10 +5029,10 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
}
static void
e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t vfta, index;
u32 vfta, index;
if ((adapter->hw.mng_cookie.status &
E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
@ -5046,10 +5046,10 @@ e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
}
static void
e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
{
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t vfta, index;
u32 vfta, index;
if (!test_bit(__E1000_DOWN, &adapter->flags))
e1000_irq_disable(adapter);
@ -5078,7 +5078,7 @@ e1000_restore_vlan(struct e1000_adapter *adapter)
e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
if (adapter->vlgrp) {
uint16_t vid;
u16 vid;
for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
if (!vlan_group_get_device(adapter->vlgrp, vid))
continue;
@ -5088,7 +5088,7 @@ e1000_restore_vlan(struct e1000_adapter *adapter)
}
int
e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
{
adapter->hw.autoneg = 0;
@ -5129,8 +5129,8 @@ e1000_suspend(struct pci_dev *pdev, pm_message_t state)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t ctrl, ctrl_ext, rctl, status;
uint32_t wufc = adapter->wol;
u32 ctrl, ctrl_ext, rctl, status;
u32 wufc = adapter->wol;
#ifdef CONFIG_PM
int retval = 0;
#endif
@ -5227,7 +5227,7 @@ e1000_resume(struct pci_dev *pdev)
{
struct net_device *netdev = pci_get_drvdata(pdev);
struct e1000_adapter *adapter = netdev_priv(netdev);
uint32_t err;
u32 err;
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);