display: JDI panel porting

1. for SR1 gpio
2. use pwm to control backlight
in the run afterwards, we would use mipi commands to control backlight

Change-Id: Ie7b6de6fb5a8866f5e929d12284a1d85dda8582a
Signed-off-by: yetta_wu <yetta_wu@asus.com>

arch/arm/configs/flo_defconfig

@@ -315,9 +315,9 @@ CONFIG_DEBUG_GPIO=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_SX150X=y
 CONFIG_POWER_SUPPLY=y
+CONFIG_CHARGER_SMB345=y
 # CONFIG_BATTERY_MSM is not set
 CONFIG_BATTERY_ASUS_BQ27541=y
-CONFIG_CHARGER_SMB345=y
 CONFIG_SENSORS_PM8XXX_ADC=y
 CONFIG_SENSORS_EPM_ADC=y
 CONFIG_SENSORS_CAP1106=y
@@ -372,6 +372,7 @@ CONFIG_FB_MSM_OVERLAY0_WRITEBACK=y
 CONFIG_FB_MSM_OVERLAY1_WRITEBACK=y
 CONFIG_FB_MSM_MIPI_NOVATEK_VIDEO_MODE=y
 CONFIG_FB_MSM_MIPI_LG_VIDEO_MODE=y
+CONFIG_FB_MSM_MIPI_JDI_CMD_MODE=y
 CONFIG_FB_MSM_HDMI_MSM_PANEL=y
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y

arch/arm/mach-msm/asustek/flo/board-flo-display.c

@@ -74,6 +74,9 @@ static struct resource msm_fb_resources[] = {
 #define gpio_LCD_BL_PWM PM8921_GPIO_PM_TO_SYS(26)	//backlight pwm
 #define gpio_display_ID1 12
 #define gpio_display_ID2 1
+#define gpio_LCM_XRES 36 /* JDI reset pin */
+#define gpio_LCM_TE 0	/* JDI te pin,
+	default requested and config in mipi_dsi.c */
 
 #ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
 static unsigned char hdmi_is_primary = 1;
@@ -349,11 +352,19 @@ static struct platform_device wfd_device = {
 #define HDMI_DDC_DATA_GPIO	71
 #define HDMI_HPD_GPIO		72
 
+static uint32_t display_gpio_table[] = {
+	/* LCM_XRES */
+	GPIO_CFG(gpio_LCM_XRES, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
+		GPIO_CFG_8MA),
+};
+
 static bool dsi_power_on;
 static int mipi_dsi_panel_power(int on)
 {
-	static struct regulator *reg_lvs7, *reg_l2, *reg_l11, *reg_l17;
-	int rc;
+	static struct regulator *reg_lvs7, *reg_l2, *reg_l11, *reg_l17,
+		*reg_lvs5;
+	int rc, n;
+	lcd_type type = asustek_get_lcd_type();
 
 	printk("%s+, on=%d\n", __func__, on);
 
@@ -400,6 +411,32 @@ static int mipi_dsi_panel_power(int on)
 			return -ENODEV;
 		}
 
+		if (type == 0) {	/* only for JDI panel */
+			reg_lvs5 = regulator_get(NULL, "JDI_IOVCC");
+			if (IS_ERR_OR_NULL(reg_lvs5)) {
+				pr_err("could not get 8921_lvs5, rc = %ld\n",
+					PTR_ERR(reg_lvs5));
+				return -ENODEV;
+			}
+			/* LCM_XRES */
+			rc = gpio_request(gpio_LCM_XRES, "LCM_XRES");
+			if (rc) {
+				pr_err("request gpio 36 failed, rc=%d\n", rc);
+				return -ENODEV;
+			}
+			/* config LCM_XRES and LCM_TE for JDI panel */
+			for (n = 0; n < ARRAY_SIZE(display_gpio_table); n++) {
+				rc = gpio_tlmm_config(display_gpio_table[n],
+					GPIO_CFG_ENABLE);
+				if (rc) {
+					pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
+						__func__, display_gpio_table[n],
+						rc);
+					break;
+				}
+			}
+		}
+
 		//EN_VDD_BL
 		rc = gpio_request(gpio_EN_VDD_BL, "EN_VDD_BL");
 		if (rc) {
@@ -457,16 +494,41 @@ static int mipi_dsi_panel_power(int on)
 			return -ENODEV;
 		}
 
-		gpio_set_value_cansleep(gpio_EN_VDD_BL, 1);
-		msleep(210);
-		gpio_set_value_cansleep(gpio_LCD_BL_EN, 1);
-		msleep(20);
+		if (type == 0) {
+			rc = regulator_enable(reg_lvs5);
+			if (rc) {
+				pr_err("enable lvs5 failed, rc=%d\n", rc);
+				return -ENODEV;
+			}
+			msleep(20);
+			gpio_set_value_cansleep(gpio_EN_VDD_BL, 1);
+			msleep(20);
+			gpio_set_value_cansleep(gpio_LCM_XRES, 1);
+			msleep(20);
+		} else {
+			gpio_set_value_cansleep(gpio_EN_VDD_BL, 1);
+			msleep(210);
+			gpio_set_value_cansleep(gpio_LCD_BL_EN, 1);
+			msleep(20);
+		}
 	} else {
-
-		msleep(20);
-		gpio_set_value_cansleep(gpio_LCD_BL_EN, 0);
-		msleep(210);
-		gpio_set_value_cansleep(gpio_EN_VDD_BL, 0);
+		if (type == 0) {
+			msleep(20);
+			gpio_set_value_cansleep(gpio_EN_VDD_BL, 0);
+			msleep(20);
+			gpio_set_value_cansleep(gpio_LCM_XRES, 0);
+			msleep(20);
+			rc = regulator_disable(reg_lvs5);
+			if (rc) {
+				pr_err("disable reg_lvs5 failed, rc=%d\n", rc);
+				return -ENODEV;
+			}
+		} else {
+			msleep(20);
+			gpio_set_value_cansleep(gpio_LCD_BL_EN, 0);
+			msleep(210);
+			gpio_set_value_cansleep(gpio_EN_VDD_BL, 0);
+		}
 
 		rc = regulator_disable(reg_l17);
 		if (rc) {
@@ -688,6 +750,19 @@ static struct platform_device mipi_lg_panel_device = {
 	}
 };
 
+static int mipi_JDI_gpio[] = {LPM_CHANNEL};
+
+static struct mipi_dsi_panel_platform_data mipi_JDI_pdata = {
+	.gpio = mipi_JDI_gpio,
+};
+
+static struct platform_device mipi_JDI_panel_device = {
+	.name = "mipi_JDI",
+	.id = 0,
+	.dev = {
+		.platform_data = &mipi_JDI_pdata,
+	}
+};
 #if 0
 #define FRC_GPIO_UPDATE	(SX150X_EXP4_GPIO_BASE + 8)
 #define FRC_GPIO_RESET	(SX150X_EXP4_GPIO_BASE + 9)
@@ -1046,6 +1121,9 @@ void __init apq8064_init_fb(void)
 	if (type==3) {
 		printk("%s: register mipi_lg_panel_device\n", __func__);
 		platform_device_register(&mipi_lg_panel_device);
+	} else if (type == 0) {
+		pr_info("%s: register mipi_JDI_panel_device\n", __func__);
+		platform_device_register(&mipi_JDI_panel_device);
 	} else {
 		printk("%s: register mipi_novatek_panel_device\n", __func__);
 		platform_device_register(&mipi_novatek_panel_device);

arch/arm/mach-msm/asustek/flo/board-flo-regulator.c

@@ -214,6 +214,7 @@ VREG_CONSUMERS(LVS5) = {
 	REGULATOR_SUPPLY("cam_vio",		"4-006c"),
 	REGULATOR_SUPPLY("cam_vio",		"4-0034"),
 	REGULATOR_SUPPLY("cam_vio",		"4-0020"),
+	REGULATOR_SUPPLY("JDI_IOVCC",		NULL),
 };
 VREG_CONSUMERS(LVS6) = {
 	REGULATOR_SUPPLY("8921_lvs6",		NULL),

drivers/video/msm/Kconfig

@@ -208,6 +208,11 @@ config FB_MSM_MIPI_DSI_LG
 	select FB_MSM_MIPI_DSI
 	default n
 
+config FB_MSM_MIPI_DSI_JDI
+	bool
+	select FB_MSM_MIPI_DSI
+	default n
+
 config FB_MSM_MIPI_DSI_NT35510
 	bool
 	select FB_MSM_MIPI_DSI
@@ -357,6 +362,11 @@ config FB_MSM_MIPI_LG_1080_HD_PT
 	select FB_MSM_MIPI_DSI_LG
 	default n
 
+config FB_MSM_MIPI_JDI_1080_HD_PT
+	bool
+	select FB_MSM_MIPI_DSI_JDI
+	default n
+
 config FB_MSM_MIPI_ORISE_VIDEO_720P_PT
 	bool
 	select FB_MSM_MIPI_DSI_ORISE
@@ -454,9 +464,6 @@ config FB_MSM_WRITEBACK_MSM_PANEL
 	  Support for MDP4 OVERLAY write back mode
 
 # need to config multiple mipi panels simultaneously in ASUS project
-config FB_MSM_MIPI_NOVATEK_CMD_MODE
-	bool "MIPI NOVATEK 1080P HD PT Panel"
-	select FB_MSM_MIPI_NOVATEK_1080_HD_PT
 
 config FB_MSM_MIPI_NOVATEK_VIDEO_MODE
 	bool "MIPI NOVATEK 1080P HD PT Panel"

drivers/video/msm/Makefile

@@ -78,6 +78,7 @@ obj-$(CONFIG_FB_MSM_MIPI_DSI) += msm_mipi.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_TOSHIBA) += mipi_toshiba.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_NOVATEK) += mipi_novatek.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_LG) += mipi_lg.o
+obj-$(CONFIG_FB_MSM_MIPI_DSI_JDI) += mipi_JDI.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_ORISE) += mipi_orise.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_RENESAS) += mipi_renesas.o
 obj-$(CONFIG_FB_MSM_MIPI_DSI_TRULY) += mipi_truly.o
@@ -150,6 +151,7 @@ obj-$(CONFIG_FB_MSM_MIPI_CHIMEI_WXGA) += mipi_chimei_wxga_pt.o
 obj-$(CONFIG_FB_MSM_MIPI_CHIMEI_WUXGA) += mipi_chimei_wuxga.o
 obj-$(CONFIG_FB_MSM_MIPI_NOVATEK_1080_HD_PT) += mipi_novatek_1080P_pt.o
 obj-$(CONFIG_FB_MSM_MIPI_LG_1080_HD_PT) += mipi_lg_1080P_pt.o
+obj-$(CONFIG_FB_MSM_MIPI_JDI_1080_HD_PT) += mipi_JDI_1080P_pt.o
 endif
 
 obj-$(CONFIG_FB_MSM_LCDC_PANEL) += lcdc_panel.o

drivers/video/msm/mipi_JDI.c

@@ -0,0 +1,300 @@
+/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_JDI.h"
+
+#include "../board-8064.h"
+#include <asm/mach-types.h>
+#include <linux/pwm.h>
+#include <linux/mfd/pm8xxx/pm8921.h>
+#include <linux/gpio.h>
+
+#define PWM_FREQ_HZ 300
+#define PWM_PERIOD_USEC (USEC_PER_SEC / PWM_FREQ_HZ)
+#define PWM_LEVEL 255
+#define PWM_DUTY_LEVEL \
+	(PWM_PERIOD_USEC / PWM_LEVEL)
+
+#define gpio_EN_VDD_BL PM8921_GPIO_PM_TO_SYS(23)
+#define gpio_LCD_BL_EN PM8921_GPIO_PM_TO_SYS(30)
+
+static struct mipi_dsi_panel_platform_data *mipi_JDI_pdata;
+static struct pwm_device *bl_lpm;
+
+static struct dsi_buf JDI_tx_buf;
+static struct dsi_buf JDI_rx_buf;
+static int mipi_JDI_lcd_init(void);
+
+static char sw_reset[2] = {0x01, 0x00}; /* DTYPE_DCS_WRITE */
+static char enter_sleep[2] = {0x10, 0x00}; /* DTYPE_DCS_WRITE */
+static char exit_sleep[2] = {0x11, 0x00}; /* DTYPE_DCS_WRITE */
+static char display_off[2] = {0x28, 0x00}; /* DTYPE_DCS_WRITE */
+static char display_on[2] = {0x29, 0x00}; /* DTYPE_DCS_WRITE */
+
+static char MCAP[2] = {0xB0, 0x00};
+static char interface_setting[6] = {0xB3, 0x04, 0x08, 0x00, 0x22, 0x00};
+static char interface_ID_setting[2] = {0xB4, 0x0C};
+static char DSI_control[3] = {0xB6, 0x3A, 0xD3};
+static char set_pixel_format[2] = {0x3A, 0x77};
+static char set_column_addr[5] = {0x2A, 0x00, 0x00, 0x04, 0xAF};
+static char set_page_addr[5] = {0x2B, 0x00, 0x00, 0x07, 0x7F};
+
+static struct dsi_cmd_desc JDI_display_on_cmds[] = {
+	{DTYPE_DCS_WRITE, 1, 0, 0, 5,
+		sizeof(sw_reset), sw_reset},
+	{DTYPE_GEN_WRITE2, 1, 0, 0, 0,
+		sizeof(MCAP), MCAP},
+	{DTYPE_GEN_LWRITE, 1, 0, 0, 0,
+		sizeof(interface_setting), interface_setting},
+	{DTYPE_GEN_LWRITE, 1, 0, 0, 0,
+		sizeof(interface_ID_setting), interface_ID_setting},
+	{DTYPE_GEN_LWRITE, 1, 0, 0, 0,
+		sizeof(DSI_control), DSI_control},
+	{DTYPE_DCS_WRITE1, 1, 0, 0, 0,
+		sizeof(set_pixel_format), set_pixel_format},
+	{DTYPE_DCS_LWRITE, 1, 0, 0, 0,
+		sizeof(set_column_addr), set_column_addr},
+	{DTYPE_DCS_LWRITE, 1, 0, 0, 0,
+		sizeof(set_page_addr), set_page_addr},
+	{DTYPE_DCS_WRITE, 1, 0, 0, 120,
+		sizeof(exit_sleep), exit_sleep},
+	{DTYPE_DCS_WRITE, 1, 0, 0, 50,
+		sizeof(display_on), display_on},
+};
+
+static struct dsi_cmd_desc JDI_display_off_cmds[] = {
+	{DTYPE_DCS_WRITE, 1, 0, 0, 20,
+		sizeof(display_off), display_off},
+	{DTYPE_DCS_WRITE, 1, 0, 0, 80,
+		sizeof(enter_sleep), enter_sleep},
+};
+
+struct dcs_cmd_req cmdreq_JDI;
+
+static int mipi_JDI_lcd_on(struct platform_device *pdev)
+{
+	struct msm_fb_data_type *mfd;
+	int ret;
+
+	pr_info("%s+\n", __func__);
+
+	mfd = platform_get_drvdata(pdev);
+	if (!mfd)
+		return -ENODEV;
+	if (mfd->key != MFD_KEY)
+		return -EINVAL;
+
+	msleep(20);
+
+	pr_info("%s, JDI display on command+\n", __func__);
+	cmdreq_JDI.cmds = JDI_display_on_cmds;
+	cmdreq_JDI.cmds_cnt = ARRAY_SIZE(JDI_display_on_cmds);
+	cmdreq_JDI.flags = CMD_REQ_COMMIT;
+	cmdreq_JDI.rlen = 0;
+	cmdreq_JDI.cb = NULL;
+	mipi_dsi_cmdlist_put(&cmdreq_JDI);
+
+	pr_info("%s, JDI display on command-\n", __func__);
+
+	msleep(210);
+
+	if (bl_lpm) {
+		ret = pwm_config(bl_lpm, PWM_DUTY_LEVEL * 40,
+			PWM_PERIOD_USEC);
+		if (ret)
+			pr_err("pwm_config on lpm failed %d\n", ret);
+		ret = pwm_enable(bl_lpm);
+		if (ret)
+			pr_err("pwm enable on lpm failed\n");
+	}
+
+	msleep(20);
+	gpio_set_value_cansleep(gpio_LCD_BL_EN, 1);
+
+	pr_info("%s-\n", __func__);
+	return 0;
+}
+
+static int mipi_JDI_lcd_off(struct platform_device *pdev)
+{
+	struct msm_fb_data_type *mfd;
+
+	pr_info("%s+\n", __func__);
+
+	mfd = platform_get_drvdata(pdev);
+
+	if (!mfd)
+		return -ENODEV;
+	if (mfd->key != MFD_KEY)
+		return -EINVAL;
+
+	msleep(210);
+
+	pr_info("%s, JDI display off command+\n", __func__);
+	cmdreq_JDI.cmds = JDI_display_off_cmds;
+	cmdreq_JDI.cmds_cnt = ARRAY_SIZE(JDI_display_off_cmds);
+	cmdreq_JDI.flags = CMD_REQ_COMMIT;
+	cmdreq_JDI.rlen = 0;
+	cmdreq_JDI.cb = NULL;
+	mipi_dsi_cmdlist_put(&cmdreq_JDI);
+	pr_info("%s, JDI display off command-\n", __func__);
+
+	msleep(20);
+
+	pr_info("%s-\n", __func__);
+	return 0;
+}
+
+static void mipi_JDI_set_backlight(struct msm_fb_data_type *mfd)
+{
+	int ret;
+	static int bl_enable_sleep_control;
+		/* sleep only when suspend or resume, init value is 0 */
+
+	pr_debug("%s: back light level %d\n", __func__, mfd->bl_level);
+
+	if (bl_lpm) {
+		if (mfd->bl_level) {
+			ret = pwm_config(bl_lpm, PWM_DUTY_LEVEL *
+				mfd->bl_level, PWM_PERIOD_USEC);
+			if (ret) {
+				pr_err("pwm_config on lpm failed %d\n", ret);
+				return;
+			}
+			ret = pwm_enable(bl_lpm);
+			if (ret)
+				pr_err("pwm enable on lpm failed, bl=%d\n",
+					mfd->bl_level);
+			if (!bl_enable_sleep_control) {
+				msleep(20);
+				bl_enable_sleep_control = 1;
+				pr_info("%s: pwm enable\n", __func__);
+			}
+			gpio_set_value_cansleep(gpio_LCD_BL_EN, 1);
+		} else {
+			gpio_set_value_cansleep(gpio_LCD_BL_EN, 0);
+			if (bl_enable_sleep_control) {
+				msleep(20);
+				bl_enable_sleep_control = 0;
+				pr_info("%s: pwm disable\n", __func__);
+			}
+			ret = pwm_config(bl_lpm, PWM_DUTY_LEVEL *
+				mfd->bl_level, PWM_PERIOD_USEC);
+			if (ret) {
+				pr_err("pwm_config on lpm failed %d\n", ret);
+				return;
+			}
+			pwm_disable(bl_lpm);
+		}
+	}
+}
+
+static int __devinit mipi_JDI_lcd_probe(struct platform_device *pdev)
+{
+	pr_info("%s+\n", __func__);
+
+	if (pdev->id == 0) {
+		mipi_JDI_pdata = pdev->dev.platform_data;
+		return 0;
+	}
+
+	if (mipi_JDI_pdata == NULL) {
+		pr_err("%s.invalid platform data.\n", __func__);
+		return -ENODEV;
+	} else {
+		bl_lpm = pwm_request(mipi_JDI_pdata->gpio[0],
+			"backlight");
+	}
+
+	if (bl_lpm == NULL || IS_ERR(bl_lpm)) {
+		pr_err("%s pwm_request() failed\n", __func__);
+		bl_lpm = NULL;
+	}
+	pr_debug("bl_lpm = %p lpm = %d\n", bl_lpm,
+		mipi_JDI_pdata->gpio[0]);
+
+	msm_fb_add_device(pdev);
+
+	pr_info("%s-\n", __func__);
+	return 0;
+}
+
+static struct platform_driver this_driver = {
+	.probe  = mipi_JDI_lcd_probe,
+	.driver = {
+		.name   = "mipi_JDI",
+	},
+};
+
+static struct msm_fb_panel_data JDI_panel_data = {
+	.on		= mipi_JDI_lcd_on,
+	.off		= mipi_JDI_lcd_off,
+	.set_backlight = mipi_JDI_set_backlight,
+};
+
+static int ch_used[3];
+
+int mipi_JDI_device_register(struct msm_panel_info *pinfo,
+					u32 channel, u32 panel)
+{
+	struct platform_device *pdev = NULL;
+	int ret;
+
+	if ((channel >= 3) || ch_used[channel])
+		return -ENODEV;
+
+	ch_used[channel] = TRUE;
+
+	ret = mipi_JDI_lcd_init();
+	if (ret) {
+		pr_err("mipi_JDI_lcd_init() failed with ret %u\n", ret);
+		return ret;
+	}
+
+	pdev = platform_device_alloc("mipi_JDI", (panel << 8)|channel);
+	if (!pdev)
+		return -ENOMEM;
+
+	JDI_panel_data.panel_info = *pinfo;
+
+	ret = platform_device_add_data(pdev, &JDI_panel_data,
+		sizeof(JDI_panel_data));
+	if (ret) {
+		printk(KERN_ERR
+		  "%s: platform_device_add_data failed!\n", __func__);
+		goto err_device_put;
+	}
+
+	ret = platform_device_add(pdev);
+	if (ret) {
+		printk(KERN_ERR
+		  "%s: platform_device_register failed!\n", __func__);
+		goto err_device_put;
+	}
+
+	return 0;
+
+err_device_put:
+	platform_device_put(pdev);
+	return ret;
+}
+
+static int mipi_JDI_lcd_init(void)
+{
+	mipi_dsi_buf_alloc(&JDI_tx_buf, DSI_BUF_SIZE);
+	mipi_dsi_buf_alloc(&JDI_rx_buf, DSI_BUF_SIZE);
+
+	return platform_driver_register(&this_driver);
+}

drivers/video/msm/mipi_JDI.h

@@ -0,0 +1,20 @@
+/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef MIPI_JDI_H
+#define MIPI_JDI_H
+
+int mipi_JDI_device_register(struct msm_panel_info *pinfo,
+					u32 channel, u32 panel);
+
+#endif  /* MIPI_JDI_H */

drivers/video/msm/mipi_JDI_1080P_pt.c

@@ -0,0 +1,113 @@
+/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include "msm_fb.h"
+#include "mipi_dsi.h"
+#include "mipi_JDI.h"
+#include <asm/mach-types.h>
+#include <linux/gpio.h>
+#include <mach/board_asustek.h>
+
+static struct msm_panel_info pinfo;
+
+static struct mipi_dsi_phy_ctrl dsi_mode_phy_db = {
+	/* 1920*1200, RGB888, 4 Lane 60 fps video mode */
+	/* regulator */
+	{0x03, 0x0a, 0x04, 0x00, 0x20},
+	/* timing */
+	{0x66, 0x26, 0x38, 0x00, 0x3E, 0xE6, 0x1E, 0x9B,
+	0x3E, 0x03, 0x04, 0xa0},
+	/* phy ctrl */
+	{0x5f, 0x00, 0x00, 0x10},
+	/* strength */
+	{0xff, 0x00, 0x06, 0x00},
+	/* pll control */
+	{0x0, 0xBD, 0x30, 0xCA, 0x00, 0x10, 0xf, 0x62,
+	0x70, 0x88, 0x99,
+	0x00, 0x14, 0x03, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01 },
+};
+
+static int __init mipi_JDI_1080P_pt_init(void)
+{
+	int ret;
+
+	lcd_type type = asustek_get_lcd_type();
+
+	if (type != 0)
+		return 0;
+
+	pr_info("%s+\n", __func__);
+
+	pinfo.xres = 1200;
+	pinfo.yres = 1920;
+
+	pinfo.pdest = DISPLAY_1;
+	pinfo.wait_cycle = 0;
+	pinfo.bpp = 24;
+	pinfo.lcdc.h_back_porch = 60;
+	pinfo.lcdc.h_front_porch = 48;
+	pinfo.lcdc.h_pulse_width = 32;
+	pinfo.lcdc.v_back_porch = 6;
+	pinfo.lcdc.v_front_porch = 3;
+	pinfo.lcdc.v_pulse_width = 5;
+	pinfo.lcdc.border_clr = 0;	/* blk */
+	pinfo.lcdc.underflow_clr = 0xff;	/* blue */
+	pinfo.lcdc.hsync_skew = 0;
+	pinfo.lcdc.xres_pad = 0;
+	pinfo.lcdc.yres_pad = 0;
+	pinfo.bl_max = 255;
+	pinfo.bl_min = 1;
+	pinfo.fb_num = 2;
+
+	/* only for command mode */
+	pinfo.type = MIPI_CMD_PANEL;
+	pinfo.lcd.vsync_enable = TRUE;
+	pinfo.lcd.hw_vsync_mode = TRUE;
+	pinfo.lcd.refx100 = 5830; /* adjust refx100 to prevent tearing */
+	pinfo.clk_rate = 932961600;
+
+	pinfo.mipi.mode = DSI_CMD_MODE;
+	pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
+	pinfo.mipi.te_sel = 1; /* TE from vsycn gpio */
+	pinfo.mipi.interleave_max = 1;
+	pinfo.mipi.insert_dcs_cmd = TRUE;
+	pinfo.mipi.wr_mem_continue = 0x3c;
+	pinfo.mipi.wr_mem_start = 0x2c;
+	pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
+
+	pinfo.mipi.vc = 0;
+	pinfo.mipi.rgb_swap = DSI_RGB_SWAP_BGR;
+	pinfo.mipi.data_lane0 = TRUE;
+	pinfo.mipi.data_lane1 = TRUE;
+	pinfo.mipi.data_lane2 = TRUE;
+	pinfo.mipi.data_lane3 = TRUE;
+	pinfo.mipi.tx_eot_append = TRUE;
+	pinfo.mipi.t_clk_post = 0x04;
+	pinfo.mipi.t_clk_pre = 0x1c;
+	pinfo.mipi.stream = 0;	/* dma_p */
+	pinfo.mipi.esc_byte_ratio = 9;	/*control TLPX: 75ns */
+	pinfo.mipi.mdp_trigger = 0;
+	pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
+	pinfo.mipi.dsi_phy_db = &dsi_mode_phy_db;
+
+	ret = mipi_JDI_device_register(&pinfo, MIPI_DSI_PRIM,
+						MIPI_DSI_PANEL_WUXGA);
+	if (ret)
+		printk(KERN_ERR "%s: failed to register device!\n", __func__);
+
+	pr_info("%s-\n", __func__);
+
+	return ret;
+}
+
+module_init(mipi_JDI_1080P_pt_init);