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PCI: be more verbose about resource quirks
When reserving an PCI quirk, note that in the kernel bootup messages. Also, parse the strange PIIX4 device resources - they should get their own PCI resource quirks, but for now just print out what it finds to verify that the code does the right thing. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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5ed688a716
commit
6693e74a16
1 changed files with 88 additions and 13 deletions
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@ -241,7 +241,8 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M );
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M );
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static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, unsigned size, int nr)
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static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
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unsigned size, int nr, const char *name)
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{
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region &= ~(size-1);
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if (region) {
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@ -259,6 +260,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, unsi
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pcibios_bus_to_resource(dev, res, &bus_region);
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pci_claim_resource(dev, nr);
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printk("PCI quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
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}
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}
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@ -291,25 +293,98 @@ static void __devinit quirk_ali7101_acpi(struct pci_dev *dev)
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u16 region;
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pci_read_config_word(dev, 0xE0, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "ali7101 ACPI");
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pci_read_config_word(dev, 0xE2, ®ion);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "ali7101 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi );
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static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
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{
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u32 devres;
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u32 mask, size, base;
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pci_read_config_dword(dev, port, &devres);
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if ((devres & enable) != enable)
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return;
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mask = (devres >> 16) & 15;
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base = devres & 0xffff;
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size = 16;
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for (;;) {
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unsigned bit = size >> 1;
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if ((bit & mask) == bit)
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break;
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size = bit;
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}
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/*
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* For now we only print it out. Eventually we'll want to
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* reserve it (at least if it's in the 0x1000+ range), but
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* let's get enough confirmation reports first.
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*/
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base &= -size;
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printk("%s PIO at %04x-%04x\n", name, base, base + size - 1);
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}
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static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
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{
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u32 devres;
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u32 mask, size, base;
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pci_read_config_dword(dev, port, &devres);
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if ((devres & enable) != enable)
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return;
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base = devres & 0xffff0000;
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mask = (devres & 0x3f) << 16;
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size = 128 << 16;
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for (;;) {
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unsigned bit = size >> 1;
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if ((bit & mask) == bit)
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break;
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size = bit;
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}
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/*
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* For now we only print it out. Eventually we'll want to
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* reserve it, but let's get enough confirmation reports first.
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*/
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base &= -size;
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printk("%s MMIO at %04x-%04x\n", name, base, base + size - 1);
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}
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/*
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* PIIX4 ACPI: Two IO regions pointed to by longwords at
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* 0x40 (64 bytes of ACPI registers)
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* 0x90 (32 bytes of SMB registers)
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* and a few strange programmable PIIX4 device resources.
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*/
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static void __devinit quirk_piix4_acpi(struct pci_dev *dev)
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{
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u32 region;
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u32 region, res_a;
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pci_read_config_dword(dev, 0x40, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES, "PIIX4 ACPI");
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pci_read_config_dword(dev, 0x90, ®ion);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1);
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quirk_io_region(dev, region, 32, PCI_BRIDGE_RESOURCES+1, "PIIX4 SMB");
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/* Device resource A has enables for some of the other ones */
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pci_read_config_dword(dev, 0x5c, &res_a);
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piix4_io_quirk(dev, "PIIX4 devres B", 0x60, 3 << 21);
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piix4_io_quirk(dev, "PIIX4 devres C", 0x64, 3 << 21);
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/* Device resource D is just bitfields for static resources */
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/* Device 12 enabled? */
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if (res_a & (1 << 29)) {
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piix4_io_quirk(dev, "PIIX4 devres E", 0x68, 1 << 20);
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piix4_mem_quirk(dev, "PIIX4 devres F", 0x6c, 1 << 7);
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}
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/* Device 13 enabled? */
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if (res_a & (1 << 30)) {
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piix4_io_quirk(dev, "PIIX4 devres G", 0x70, 1 << 20);
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piix4_mem_quirk(dev, "PIIX4 devres H", 0x74, 1 << 7);
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}
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piix4_io_quirk(dev, "PIIX4 devres I", 0x78, 1 << 20);
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piix4_io_quirk(dev, "PIIX4 devres J", 0x7c, 1 << 20);
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, quirk_piix4_acpi );
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@ -323,10 +398,10 @@ static void __devinit quirk_ich4_lpc_acpi(struct pci_dev *dev)
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u32 region;
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pci_read_config_dword(dev, 0x40, ®ion);
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES);
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quirk_io_region(dev, region, 128, PCI_BRIDGE_RESOURCES, "ICH4 ACPI/GPIO/TCO");
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pci_read_config_dword(dev, 0x58, ®ion);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1);
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quirk_io_region(dev, region, 64, PCI_BRIDGE_RESOURCES+1, "ICH4 GPIO");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0, quirk_ich4_lpc_acpi );
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0, quirk_ich4_lpc_acpi );
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@ -352,7 +427,7 @@ static void __devinit quirk_vt82c586_acpi(struct pci_dev *dev)
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if (rev & 0x10) {
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pci_read_config_dword(dev, 0x48, ®ion);
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region &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES);
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quirk_io_region(dev, region, 256, PCI_BRIDGE_RESOURCES, "vt82c586 ACPI");
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_vt82c586_acpi );
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@ -372,11 +447,11 @@ static void __devinit quirk_vt82c686_acpi(struct pci_dev *dev)
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pci_read_config_word(dev, 0x70, &hm);
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hm &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1);
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quirk_io_region(dev, hm, 128, PCI_BRIDGE_RESOURCES + 1, "vt82c868 HW-mon");
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pci_read_config_dword(dev, 0x90, &smb);
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smb &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2);
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 2, "vt82c868 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vt82c686_acpi );
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@ -391,11 +466,11 @@ static void __devinit quirk_vt8235_acpi(struct pci_dev *dev)
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pci_read_config_word(dev, 0x88, &pm);
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pm &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES);
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quirk_io_region(dev, pm, 128, PCI_BRIDGE_RESOURCES, "vt8235 PM");
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pci_read_config_word(dev, 0xd0, &smb);
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smb &= PCI_BASE_ADDRESS_IO_MASK;
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1);
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quirk_io_region(dev, smb, 16, PCI_BRIDGE_RESOURCES + 1, "vt8235 SMB");
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
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