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gpio: qpnp-pin: Update MPP and GPIO subtypes based on doc change

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The subtypes defined in the documentation have changed again.
Update both GPIO and MPP subtype values in the qpnp-pin driver to
reflect this.

Change-Id: I22e22414a74d724259706c927582d1573dc58875
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
This commit is contained in:
Michael Bohan 2012-08-14 14:35:37 -07:00 committed by Stephen Boyd
parent 780242c7f8
commit 6f7d371668
1 changed files with 6 additions and 6 deletions
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12
drivers/gpio/qpnp-pin.c
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@ -39,17 +39,17 @@
/* gpio peripheral type and subtype values */
#define Q_GPIO_TYPE 0x10
#define Q_GPIO_SUBTYPE_GPIO_4CH 0x0
#define Q_GPIO_SUBTYPE_GPIOC_4CH 0x2
#define Q_GPIO_SUBTYPE_GPIO_8CH 0x4
#define Q_GPIO_SUBTYPE_GPIOC_8CH 0x6
#define Q_GPIO_SUBTYPE_GPIO_4CH 0x1
#define Q_GPIO_SUBTYPE_GPIOC_4CH 0x5
#define Q_GPIO_SUBTYPE_GPIO_8CH 0x9
#define Q_GPIO_SUBTYPE_GPIOC_8CH 0xD
/* mpp peripheral type and subtype values */
#define Q_MPP_TYPE 0x11
#define Q_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
#define Q_MPP_SUBTYPE_4CH_NO_SINK 0x5
#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x2
#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0x4
#define Q_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
#define Q_MPP_SUBTYPE_8CH_FULL_FUNC 0xF
/* control register base address offsets */
#define Q_REG_MODE_CTL 0x40