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KVM: Use standard CR8 flags, and fix TPR definition
Intel manual (and KVM definition) say the TPR is 4 bits wide. Also fix CR8_RESEVED_BITS typo. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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2 changed files with 3 additions and 3 deletions
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@ -92,7 +92,7 @@ static struct dentry *debugfs_dir;
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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| X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
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#define CR8_RESEVED_BITS (~0x0fULL)
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#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
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#define EFER_RESERVED_BITS 0xfffffffffffff2fe
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#define EFER_RESERVED_BITS 0xfffffffffffff2fe
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_X86_64
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@ -625,7 +625,7 @@ EXPORT_SYMBOL_GPL(set_cr3);
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
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void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
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{
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{
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if ( cr8 & CR8_RESEVED_BITS) {
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if (cr8 & CR8_RESERVED_BITS) {
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printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
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printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
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inject_gp(vcpu);
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inject_gp(vcpu);
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return;
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return;
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@ -63,7 +63,7 @@
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/*
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/*
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* x86-64 Task Priority Register, CR8
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* x86-64 Task Priority Register, CR8
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*/
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*/
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#define X86_CR8_TPR 0x00000007 /* task priority register */
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#define X86_CR8_TPR 0x0000000F /* task priority register */
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/*
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/*
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* AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
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* AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
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