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msm: clock: Remove the "auto_off" feature

Browse source 
The auto_off feature loops through all clocks in lateinit and disables
them if their reference count is 0, so long as the SKIP_AUTO_OFF flag
is not set. This has a significant functional overlap with the more
intelligent handoff feature.

In addition to detecting initial clock rates, handoff (like auto_off)
disables clocks in lateinit, but only if the clock was detected to be
on when the handoff op was called during msm_clock_init.

Currently, handoff does not support a skip flag like SKIP_AUTO_OFF,
which was used aggressively by proc_comm targets. Experimentally,
however, this does not seem to cause problems, possibly because
clocks are now being more selectively disabled.

Because there is no up-to-date documentation of the reasons why many
of these flags were set, the flags are just dropped by this patch
until their questionable utility can be re-evaluated.

Change-Id: I6b3eeff9f8040d87be1a94cb28b28ab5774f23fb
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
This commit is contained in:
Matt Wagantall 2012-05-16 14:32:14 -07:00 committed by Stephen Boyd
parent 596a4b70a1
commit 83ef32e9fc
13 changed files with 92 additions and 141 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

108
arch/arm/mach-msm/clock-7x30.c
View file

@ -2328,60 +2328,53 @@ static struct branch_clk lpa_core_clk = {
},
};
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(codec_ssbi_clk, CODEC_SSBI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLKFLAG_SKIP_AUTO_OFF | CLKFLAG_MIN);
static DEFINE_CLK_PCOM(ebi1_fixed_clk, EBI1_FIXED_CLK, CLKFLAG_MIN |
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(gp_clk, GP_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, 0);
static DEFINE_CLK_PCOM(codec_ssbi_clk, CODEC_SSBI_CLK, 0);
static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(ebi1_fixed_clk, EBI1_FIXED_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, 0);
static DEFINE_CLK_PCOM(gp_clk, GP_CLK, 0);
static DEFINE_CLK_PCOM(uart3_clk, UART3_CLK, 0);
static DEFINE_CLK_PCOM(usb_phy_clk, USB_PHY_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(p_grp_2d_clk, GRP_2D_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_grp_2d_p_clk, GRP_2D_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_hdmi_clk, HDMI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_grp_2d_clk, GRP_2D_CLK, 0);
static DEFINE_CLK_PCOM(p_grp_2d_p_clk, GRP_2D_P_CLK, 0);
static DEFINE_CLK_PCOM(p_hdmi_clk, HDMI_CLK, 0);
static DEFINE_CLK_PCOM(p_jpeg_clk, JPEG_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(p_jpeg_p_clk, JPEG_P_CLK, 0);
static DEFINE_CLK_PCOM(p_lpa_codec_clk, LPA_CODEC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_lpa_core_clk, LPA_CORE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_lpa_p_clk, LPA_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_m_clk, MI2S_M_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_s_clk, MI2S_S_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_codec_rx_m_clk, MI2S_CODEC_RX_M_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_codec_rx_s_clk, MI2S_CODEC_RX_S_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_codec_tx_m_clk, MI2S_CODEC_TX_M_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mi2s_codec_tx_s_clk, MI2S_CODEC_TX_S_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_lpa_codec_clk, LPA_CODEC_CLK, 0);
static DEFINE_CLK_PCOM(p_lpa_core_clk, LPA_CORE_CLK, 0);
static DEFINE_CLK_PCOM(p_lpa_p_clk, LPA_P_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_m_clk, MI2S_M_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_s_clk, MI2S_S_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_codec_rx_m_clk, MI2S_CODEC_RX_M_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_codec_rx_s_clk, MI2S_CODEC_RX_S_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_codec_tx_m_clk, MI2S_CODEC_TX_M_CLK, 0);
static DEFINE_CLK_PCOM(p_mi2s_codec_tx_s_clk, MI2S_CODEC_TX_S_CLK, 0);
static DEFINE_CLK_PCOM(p_sdac_clk, SDAC_CLK, 0);
static DEFINE_CLK_PCOM(p_sdac_m_clk, SDAC_M_CLK, 0);
static DEFINE_CLK_PCOM(p_vfe_clk, VFE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_vfe_camif_clk, VFE_CAMIF_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_vfe_mdc_clk, VFE_MDC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_vfe_clk, VFE_CLK, 0);
static DEFINE_CLK_PCOM(p_vfe_camif_clk, VFE_CAMIF_CLK, 0);
static DEFINE_CLK_PCOM(p_vfe_mdc_clk, VFE_MDC_CLK, 0);
static DEFINE_CLK_PCOM(p_vfe_p_clk, VFE_P_CLK, 0);
static DEFINE_CLK_PCOM(p_grp_3d_clk, GRP_3D_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_grp_3d_p_clk, GRP_3D_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_grp_3d_clk, GRP_3D_CLK, 0);
static DEFINE_CLK_PCOM(p_grp_3d_p_clk, GRP_3D_P_CLK, 0);
static DEFINE_CLK_PCOM(p_imem_clk, IMEM_CLK, 0);
static DEFINE_CLK_PCOM(p_mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mdp_p_clk, MDP_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK, 0);
static DEFINE_CLK_PCOM(p_mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK, 0);
static DEFINE_CLK_PCOM(p_mdp_p_clk, MDP_P_CLK, 0);
static DEFINE_CLK_PCOM(p_mdp_vsync_clk, MDP_VSYNC_CLK, 0);
static DEFINE_CLK_PCOM(p_tsif_ref_clk, TSIF_REF_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_tsif_p_clk, TSIF_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_tv_dac_clk, TV_DAC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_tv_enc_clk, TV_ENC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_tsif_ref_clk, TSIF_REF_CLK, 0);
static DEFINE_CLK_PCOM(p_tsif_p_clk, TSIF_P_CLK, 0);
static DEFINE_CLK_PCOM(p_tv_dac_clk, TV_DAC_CLK, 0);
static DEFINE_CLK_PCOM(p_tv_enc_clk, TV_ENC_CLK, 0);
static DEFINE_CLK_PCOM(p_emdh_clk, EMDH_CLK, CLKFLAG_MIN | CLKFLAG_MAX);
static DEFINE_CLK_PCOM(p_emdh_p_clk, EMDH_P_CLK, 0);
static DEFINE_CLK_PCOM(p_i2c_clk, I2C_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_i2c_2_clk, I2C_2_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mdc_clk, MDC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_i2c_clk, I2C_CLK, 0);
static DEFINE_CLK_PCOM(p_i2c_2_clk, I2C_2_CLK, 0);
static DEFINE_CLK_PCOM(p_mdc_clk, MDC_CLK, 0);
static DEFINE_CLK_PCOM(p_pmdh_clk, PMDH_CLK, CLKFLAG_MIN | CLKFLAG_MAX);
static DEFINE_CLK_PCOM(p_pmdh_p_clk, PMDH_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_pmdh_p_clk, PMDH_P_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc1_clk, SDC1_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc1_p_clk, SDC1_P_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc2_clk, SDC2_CLK, 0);
@ -2390,36 +2383,35 @@ static DEFINE_CLK_PCOM(p_sdc3_clk, SDC3_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc3_p_clk, SDC3_P_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc4_clk, SDC4_CLK, 0);
static DEFINE_CLK_PCOM(p_sdc4_p_clk, SDC4_P_CLK, 0);
static DEFINE_CLK_PCOM(p_uart2_clk, UART2_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_uart2_clk, UART2_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs2_clk, USB_HS2_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs2_core_clk, USB_HS2_CORE_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs2_p_clk, USB_HS2_P_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs3_clk, USB_HS3_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs3_core_clk, USB_HS3_CORE_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs3_p_clk, USB_HS3_P_CLK, 0);
static DEFINE_CLK_PCOM(p_qup_i2c_clk, QUP_I2C_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_spi_clk, SPI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_spi_p_clk, SPI_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_qup_i2c_clk, QUP_I2C_CLK, 0);
static DEFINE_CLK_PCOM(p_spi_clk, SPI_CLK, 0);
static DEFINE_CLK_PCOM(p_spi_p_clk, SPI_P_CLK, 0);
static DEFINE_CLK_PCOM(p_uart1_clk, UART1_CLK, 0);
static DEFINE_CLK_PCOM(p_uart1dm_clk, UART1DM_CLK, 0);
static DEFINE_CLK_PCOM(p_uart2dm_clk, UART2DM_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_uart2dm_clk, UART2DM_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs_clk, USB_HS_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs_core_clk, USB_HS_CORE_CLK, 0);
static DEFINE_CLK_PCOM(p_usb_hs_p_clk, USB_HS_P_CLK, 0);
static DEFINE_CLK_PCOM(p_cam_m_clk, CAM_M_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_cam_m_clk, CAM_M_CLK, 0);
static DEFINE_CLK_PCOM(p_camif_pad_p_clk, CAMIF_PAD_P_CLK, 0);
static DEFINE_CLK_PCOM(p_csi0_clk, CSI0_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_csi0_vfe_clk, CSI0_VFE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_csi0_p_clk, CSI0_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_csi0_clk, CSI0_CLK, 0);
static DEFINE_CLK_PCOM(p_csi0_vfe_clk, CSI0_VFE_CLK, 0);
static DEFINE_CLK_PCOM(p_csi0_p_clk, CSI0_P_CLK, 0);
static DEFINE_CLK_PCOM(p_mdp_clk, MDP_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(p_mfc_clk, MFC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mfc_div2_clk, MFC_DIV2_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mfc_p_clk, MFC_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_vpe_clk, VPE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_adm_clk, ADM_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_ce_clk, CE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_axi_rotator_clk, AXI_ROTATOR_CLK,
CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(p_mfc_clk, MFC_CLK, 0);
static DEFINE_CLK_PCOM(p_mfc_div2_clk, MFC_DIV2_CLK, 0);
static DEFINE_CLK_PCOM(p_mfc_p_clk, MFC_P_CLK, 0);
static DEFINE_CLK_PCOM(p_vpe_clk, VPE_CLK, 0);
static DEFINE_CLK_PCOM(p_adm_clk, ADM_CLK, 0);
static DEFINE_CLK_PCOM(p_ce_clk, CE_CLK, 0);
static DEFINE_CLK_PCOM(p_axi_rotator_clk, AXI_ROTATOR_CLK, 0);
static DEFINE_CLK_PCOM(p_rotator_imem_clk, ROTATOR_IMEM_CLK, 0);
static DEFINE_CLK_PCOM(p_rotator_p_clk, ROTATOR_P_CLK, 0);

1
arch/arm/mach-msm/clock-8960.c
View file

@ -2990,7 +2990,6 @@ static enum handoff pix_rdi_clk_handoff(struct clk *c)
static struct clk_ops clk_ops_pix_rdi_8960 = {
.enable = pix_rdi_clk_enable,
.disable = pix_rdi_clk_disable,
.auto_off = pix_rdi_clk_disable,
.handoff = pix_rdi_clk_handoff,
.set_rate = pix_rdi_clk_set_rate,
.get_rate = pix_rdi_clk_get_rate,

1
arch/arm/mach-msm/clock-8x60.c
View file

@ -602,7 +602,6 @@ static struct branch_clk smi_2x_axi_clk = {
.c = {
.dbg_name = "smi_2x_axi_clk",
.ops = &clk_ops_branch,
.flags = CLKFLAG_SKIP_AUTO_OFF,
CLK_INIT(smi_2x_axi_clk.c),
},
};

1
arch/arm/mach-msm/clock-9615.c
View file

@ -250,7 +250,6 @@ static void pll_acpu_vote_clk_disable(struct clk *c)
static struct clk_ops clk_ops_pll_acpu_vote = {
.enable = pll_acpu_vote_clk_enable,
.disable = pll_acpu_vote_clk_disable,
.auto_off = pll_acpu_vote_clk_disable,
.is_enabled = pll_vote_clk_is_enabled,
.get_parent = pll_vote_clk_get_parent,
};

3
arch/arm/mach-msm/clock-local.c
View file

@ -805,7 +805,6 @@ struct clk_ops clk_ops_branch = {
.enable_hwcg = branch_clk_enable_hwcg,
.disable_hwcg = branch_clk_disable_hwcg,
.in_hwcg_mode = branch_clk_in_hwcg_mode,
.auto_off = branch_clk_disable,
.is_enabled = branch_clk_is_enabled,
.reset = branch_clk_reset,
.get_parent = branch_clk_get_parent,
@ -828,7 +827,6 @@ struct clk_ops clk_ops_rcg = {
.enable_hwcg = rcg_clk_enable_hwcg,
.disable_hwcg = rcg_clk_disable_hwcg,
.in_hwcg_mode = rcg_clk_in_hwcg_mode,
.auto_off = rcg_clk_disable,
.handoff = rcg_clk_handoff,
.set_rate = rcg_clk_set_rate,
.list_rate = rcg_clk_list_rate,
@ -941,7 +939,6 @@ struct clk_ops clk_ops_cdiv = {
.in_hwcg_mode = cdiv_clk_in_hwcg_mode,
.enable_hwcg = cdiv_clk_enable_hwcg,
.disable_hwcg = cdiv_clk_disable_hwcg,
.auto_off = cdiv_clk_disable,
.handoff = cdiv_clk_handoff,
.set_rate = cdiv_clk_set_rate,
.get_rate = cdiv_clk_get_rate,

2
arch/arm/mach-msm/clock-local2.c
View file

@ -589,7 +589,6 @@ struct clk_ops clk_ops_rcg_mnd = {
struct clk_ops clk_ops_branch = {
.enable = branch_clk_enable,
.disable = branch_clk_disable,
.auto_off = branch_clk_disable,
.set_rate = branch_clk_set_rate,
.get_rate = branch_clk_get_rate,
.list_rate = branch_clk_list_rate,
@ -602,7 +601,6 @@ struct clk_ops clk_ops_branch = {
struct clk_ops clk_ops_vote = {
.enable = local_vote_clk_enable,
.disable = local_vote_clk_disable,
.auto_off = local_vote_clk_disable,
.reset = local_vote_clk_reset,
.handoff = local_vote_clk_handoff,
};

78
arch/arm/mach-msm/clock-pcom-lookup.c
View file

@ -22,19 +22,19 @@
#define PLLn_MODE(n) (MSM_CLK_CTL_BASE + 0x300 + 28 * (n))
#define PLL4_MODE (MSM_CLK_CTL_BASE + 0x374)
static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ahb_m_clk, AHB_M_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ahb_s_clk, AHB_S_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(cam_m_clk, CAM_M_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(adm_clk, ADM_CLK, 0);
static DEFINE_CLK_PCOM(adsp_clk, ADSP_CLK, 0);
static DEFINE_CLK_PCOM(ahb_m_clk, AHB_M_CLK, 0);
static DEFINE_CLK_PCOM(ahb_s_clk, AHB_S_CLK, 0);
static DEFINE_CLK_PCOM(cam_m_clk, CAM_M_CLK, 0);
static DEFINE_CLK_PCOM(axi_rotator_clk, AXI_ROTATOR_CLK, 0);
static DEFINE_CLK_PCOM(ce_clk, CE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi0_clk, CSI0_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi0_p_clk, CSI0_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi0_vfe_clk, CSI0_VFE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi1_clk, CSI1_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi1_p_clk, CSI1_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(csi1_vfe_clk, CSI1_VFE_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ce_clk, CE_CLK, 0);
static DEFINE_CLK_PCOM(csi0_clk, CSI0_CLK, 0);
static DEFINE_CLK_PCOM(csi0_p_clk, CSI0_P_CLK, 0);
static DEFINE_CLK_PCOM(csi0_vfe_clk, CSI0_VFE_CLK, 0);
static DEFINE_CLK_PCOM(csi1_clk, CSI1_CLK, 0);
static DEFINE_CLK_PCOM(csi1_p_clk, CSI1_P_CLK, 0);
static DEFINE_CLK_PCOM(csi1_vfe_clk, CSI1_VFE_CLK, 0);
static struct pll_shared_clk pll0_clk = {
.id = PLL_0,
@ -113,38 +113,36 @@ static struct pcom_clk dsi_pixel_clk = {
};
static DEFINE_CLK_PCOM(dsi_ref_clk, DSI_REF_CLK, 0);
static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK,
CLKFLAG_SKIP_AUTO_OFF | CLKFLAG_MIN);
static DEFINE_CLK_PCOM(ebi2_clk, EBI2_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(ebi1_clk, EBI1_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(ebi2_clk, EBI2_CLK, 0);
static DEFINE_CLK_PCOM(ecodec_clk, ECODEC_CLK, 0);
static DEFINE_CLK_PCOM(emdh_clk, EMDH_CLK, CLKFLAG_MIN | CLKFLAG_MAX);
static DEFINE_CLK_PCOM(gp_clk, GP_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(grp_2d_clk, GRP_2D_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(grp_2d_p_clk, GRP_2D_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(gp_clk, GP_CLK, 0);
static DEFINE_CLK_PCOM(grp_2d_clk, GRP_2D_CLK, 0);
static DEFINE_CLK_PCOM(grp_2d_p_clk, GRP_2D_P_CLK, 0);
static DEFINE_CLK_PCOM(grp_3d_clk, GRP_3D_CLK, 0);
static DEFINE_CLK_PCOM(grp_3d_p_clk, GRP_3D_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(grp_3d_p_clk, GRP_3D_P_CLK, 0);
static DEFINE_CLK_PCOM(gsbi1_qup_clk, GSBI1_QUP_CLK, 0);
static DEFINE_CLK_PCOM(gsbi1_qup_p_clk, GSBI1_QUP_P_CLK, 0);
static DEFINE_CLK_PCOM(gsbi2_qup_clk, GSBI2_QUP_CLK, 0);
static DEFINE_CLK_PCOM(gsbi2_qup_p_clk, GSBI2_QUP_P_CLK, 0);
static DEFINE_CLK_PCOM(gsbi_clk, GSBI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(gsbi_p_clk, GSBI_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(hdmi_clk, HDMI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(i2c_clk, I2C_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(icodec_rx_clk, ICODEC_RX_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(icodec_tx_clk, ICODEC_TX_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(gsbi_clk, GSBI_CLK, 0);
static DEFINE_CLK_PCOM(gsbi_p_clk, GSBI_P_CLK, 0);
static DEFINE_CLK_PCOM(hdmi_clk, HDMI_CLK, 0);
static DEFINE_CLK_PCOM(i2c_clk, I2C_CLK, 0);
static DEFINE_CLK_PCOM(icodec_rx_clk, ICODEC_RX_CLK, 0);
static DEFINE_CLK_PCOM(icodec_tx_clk, ICODEC_TX_CLK, 0);
static DEFINE_CLK_PCOM(imem_clk, IMEM_CLK, 0);
static DEFINE_CLK_PCOM(mdc_clk, MDC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(mdc_clk, MDC_CLK, 0);
static DEFINE_CLK_PCOM(mdp_clk, MDP_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(mdp_lcdc_pad_pclk_clk, MDP_LCDC_PAD_PCLK_CLK,
CLKFLAG_SKIP_AUTO_OFF);
0);
static DEFINE_CLK_PCOM(mdp_lcdc_pclk_clk, MDP_LCDC_PCLK_CLK,
CLKFLAG_SKIP_AUTO_OFF);
0);
static DEFINE_CLK_PCOM(mdp_vsync_clk, MDP_VSYNC_CLK, 0);
static DEFINE_CLK_PCOM(mdp_dsi_p_clk, MDP_DSI_P_CLK, 0);
static DEFINE_CLK_PCOM(pbus_clk, PBUS_CLK,
CLKFLAG_SKIP_AUTO_OFF | CLKFLAG_MIN);
static DEFINE_CLK_PCOM(pcm_clk, PCM_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(pbus_clk, PBUS_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(pcm_clk, PCM_CLK, 0);
static DEFINE_CLK_PCOM(pmdh_clk, PMDH_CLK, CLKFLAG_MIN | CLKFLAG_MAX);
static DEFINE_CLK_PCOM(sdac_clk, SDAC_CLK, 0);
static DEFINE_CLK_PCOM(sdc1_clk, SDC1_CLK, 0);
@ -155,12 +153,12 @@ static DEFINE_CLK_PCOM(sdc3_clk, SDC3_CLK, 0);
static DEFINE_CLK_PCOM(sdc3_p_clk, SDC3_P_CLK, 0);
static DEFINE_CLK_PCOM(sdc4_clk, SDC4_CLK, 0);
static DEFINE_CLK_PCOM(sdc4_p_clk, SDC4_P_CLK, 0);
static DEFINE_CLK_PCOM(spi_clk, SPI_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(tsif_clk, TSIF_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(tsif_p_clk, TSIF_P_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(tsif_ref_clk, TSIF_REF_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(tv_dac_clk, TV_DAC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(tv_enc_clk, TV_ENC_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(spi_clk, SPI_CLK, 0);
static DEFINE_CLK_PCOM(tsif_clk, TSIF_CLK, 0);
static DEFINE_CLK_PCOM(tsif_p_clk, TSIF_P_CLK, 0);
static DEFINE_CLK_PCOM(tsif_ref_clk, TSIF_REF_CLK, 0);
static DEFINE_CLK_PCOM(tv_dac_clk, TV_DAC_CLK, 0);
static DEFINE_CLK_PCOM(tv_enc_clk, TV_ENC_CLK, 0);
static DEFINE_CLK_PCOM(uart1_clk, UART1_CLK, 0);
static DEFINE_CLK_PCOM(uart1dm_clk, UART1DM_CLK, 0);
static DEFINE_CLK_PCOM(uart2_clk, UART2_CLK, 0);
@ -173,8 +171,8 @@ static DEFINE_CLK_PCOM(usb_hs3_p_clk, USB_HS3_P_CLK, 0);
static DEFINE_CLK_PCOM(usb_hs_clk, USB_HS_CLK, 0);
static DEFINE_CLK_PCOM(usb_hs_core_clk, USB_HS_CORE_CLK, 0);
static DEFINE_CLK_PCOM(usb_hs_p_clk, USB_HS_P_CLK, 0);
static DEFINE_CLK_PCOM(usb_otg_clk, USB_OTG_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(usb_phy_clk, USB_PHY_CLK, CLKFLAG_SKIP_AUTO_OFF);
static DEFINE_CLK_PCOM(usb_otg_clk, USB_OTG_CLK, 0);
static DEFINE_CLK_PCOM(usb_phy_clk, USB_PHY_CLK, 0);
static DEFINE_CLK_PCOM(vdc_clk, VDC_CLK, CLKFLAG_MIN);
static DEFINE_CLK_PCOM(vfe_axi_clk, VFE_AXI_CLK, 0);
static DEFINE_CLK_PCOM(vfe_clk, VFE_CLK, 0);

2
arch/arm/mach-msm/clock-pcom.c
View file

@ -190,7 +190,6 @@ static enum handoff pc_clk_handoff(struct clk *clk)
struct clk_ops clk_ops_pcom = {
.enable = pc_clk_enable,
.disable = pc_clk_disable,
.auto_off = pc_clk_disable,
.reset = pc_reset,
.set_rate = pc_clk_set_rate,
.set_max_rate = pc_clk_set_max_rate,
@ -205,7 +204,6 @@ struct clk_ops clk_ops_pcom = {
struct clk_ops clk_ops_pcom_ext_config = {
.enable = pc_clk_enable,
.disable = pc_clk_disable,
.auto_off = pc_clk_disable,
.reset = pc_reset,
.set_rate = pc_clk_set_ext_config,
.set_max_rate = pc_clk_set_max_rate,

2
arch/arm/mach-msm/clock-pll.c
View file

@ -121,7 +121,6 @@ static enum handoff pll_vote_clk_handoff(struct clk *c)
struct clk_ops clk_ops_pll_vote = {
.enable = pll_vote_clk_enable,
.disable = pll_vote_clk_disable,
.auto_off = pll_vote_clk_disable,
.is_enabled = pll_vote_clk_is_enabled,
.get_parent = pll_vote_clk_get_parent,
.handoff = pll_vote_clk_handoff,
@ -300,7 +299,6 @@ out:
struct clk_ops clk_ops_local_pll = {
.enable = local_pll_clk_enable,
.disable = local_pll_clk_disable,
.auto_off = local_pll_clk_disable,
.handoff = local_pll_clk_handoff,
.get_parent = local_pll_clk_get_parent,
};

6
arch/arm/mach-msm/clock-rpm.h
View file

@ -58,7 +58,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #name, \
CLK_INIT(name.c), \
.depends = dep, \
@ -74,7 +73,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #active, \
CLK_INIT(active.c), \
.depends = dep, \
@ -96,7 +94,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm_branch, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #name, \
.rate = (r), \
CLK_INIT(name.c), \
@ -115,7 +112,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm_branch, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #active, \
.rate = (r), \
CLK_INIT(active.c), \
@ -134,7 +130,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #name, \
CLK_INIT(name.c), \
.warned = true, \
@ -150,7 +145,6 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd;
.rpmrs_data = (rpmrsdata),\
.c = { \
.ops = &clk_ops_rpm, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.dbg_name = #active, \
CLK_INIT(active.c), \
.warned = true, \

1
arch/arm/mach-msm/clock-voter.h
View file

@ -34,7 +34,6 @@ static inline struct clk_voter *to_clk_voter(struct clk *clk)
.c = { \
.dbg_name = #clk_name, \
.ops = &clk_ops_voter, \
.flags = CLKFLAG_SKIP_AUTO_OFF, \
.rate = _default_rate, \
CLK_INIT(clk_name.c), \
}, \

26
arch/arm/mach-msm/clock.c
View file

@ -506,34 +506,16 @@ void __init msm_clock_init(struct clock_init_data *data)
clk_init_data->post_init();
}
/*
* The bootloader and/or AMSS may have left various clocks enabled.
* Disable any clocks that have not been explicitly enabled by a
* clk_enable() call and don't have the CLKFLAG_SKIP_AUTO_OFF flag.
*/
static int __init clock_late_init(void)
{
unsigned n, count = 0;
struct handoff_clk *h, *h_temp;
unsigned long flags;
int ret = 0;
int n, ret = 0;
clock_debug_init(clk_init_data);
for (n = 0; n < clk_init_data->size; n++) {
struct clk *clk = clk_init_data->table[n].clk;
clock_debug_add(clk);
spin_lock_irqsave(&clk->lock, flags);
if (!(clk->flags & CLKFLAG_SKIP_AUTO_OFF)) {
if (!clk->count && clk->ops->auto_off) {
count++;
clk->ops->auto_off(clk);
}
}
spin_unlock_irqrestore(&clk->lock, flags);
}
pr_info("clock_late_init() disabled %d unused clocks\n", count);
for (n = 0; n < clk_init_data->size; n++)
clock_debug_add(clk_init_data->table[n].clk);
pr_info("%s: Removing enables held for handed-off clocks\n", __func__);
list_for_each_entry_safe(h, h_temp, &handoff_list, list) {
clk_disable_unprepare(h->clk);
list_del(&h->list);

2
arch/arm/mach-msm/clock.h
View file

@ -33,7 +33,6 @@
#define CLKFLAG_RETAIN 0x00000040
#define CLKFLAG_NORETAIN 0x00000080
#define CLKFLAG_SKIP_HANDOFF 0x00000100
#define CLKFLAG_SKIP_AUTO_OFF 0x00000200
#define CLKFLAG_MIN 0x00000400
#define CLKFLAG_MAX 0x00000800
@ -90,7 +89,6 @@ struct clk_ops {
int (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
void (*unprepare)(struct clk *clk);
void (*auto_off)(struct clk *clk);
void (*enable_hwcg)(struct clk *clk);
void (*disable_hwcg)(struct clk *clk);
int (*in_hwcg_mode)(struct clk *clk);