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msm: acpuclock-8930ab: Lower VDD_DIG voltage vote for L2 at 384MHz

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New characterization data shows that vdd_dig voltage for L2@384MHz
can be lowered to the low level. Update the data in this patch.

Change-Id: Ia80ee9397b3b433b96f2bce49a86d5ef7b024fc5
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
(cherry picked from commit f684b386cbe45229e12a0eb778b933c69bceb0d4)
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
This commit is contained in:
Tianyi Gou 2013-02-05 18:27:32 -08:00 committed by Iliyan Malchev
parent b9bfd3374a
commit 83f7866d30
1 changed files with 1 additions and 2 deletions
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3
arch/arm/mach-msm/acpuclock-8930ab.c
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@ -130,9 +130,8 @@ static struct msm_bus_scale_pdata bus_scale_data __initdata = {
.name = "acpuclk-8930ab",
};
/* TODO: Update new L2 freqs once they are available */
static struct l2_level l2_freq_tbl[] __initdata = {
[0] = { { 384000, PLL_8, 0, 0x00 }, LVL_NOM, 1050000, 1 },
[0] = { { 384000, PLL_8, 0, 0x00 }, LVL_LOW, 1050000, 1 },
[1] = { { 432000, HFPLL, 2, 0x20 }, LVL_NOM, 1050000, 2 },
[2] = { { 486000, HFPLL, 2, 0x24 }, LVL_NOM, 1050000, 2 },
[3] = { { 540000, HFPLL, 2, 0x28 }, LVL_NOM, 1050000, 2 },