mirror of
https://github.com/followmsi/android_kernel_google_msm.git
synced 2024-11-06 23:17:41 +00:00
coresight: support dumping tmc-etf and tmc-etr on kernel panic
Dump TMC ETF and TMC ETR registers on abort to allow post crash parsing. Also ensure magic value is written for TMC ETF buffer dump. Change-Id: I8f21c456bcc79ed3e2831bd6bd1e6a6dbfdb93d0 Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
This commit is contained in:
Pratik Patel
Iliyan Malchev
parent
6e99801d1b
commit
8efed79331
1 changed files with 116 additions and 39 deletions
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@ -50,41 +50,45 @@ do { \
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mb(); \
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} while (0)
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#define TMC_RSZ (0x004)
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#define TMC_STS (0x00C)
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#define TMC_RRD (0x010)
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#define TMC_RRP (0x014)
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#define TMC_RWP (0x018)
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#define TMC_TRG (0x01C)
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#define TMC_CTL (0x020)
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#define TMC_RWD (0x024)
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#define TMC_MODE (0x028)
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#define TMC_LBUFLEVEL (0x02C)
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#define TMC_CBUFLEVEL (0x030)
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#define TMC_BUFWM (0x034)
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#define TMC_RRPHI (0x038)
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#define TMC_RWPHI (0x03C)
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#define TMC_AXICTL (0x110)
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#define TMC_DBALO (0x118)
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#define TMC_DBAHI (0x11C)
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#define TMC_FFSR (0x300)
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#define TMC_FFCR (0x304)
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#define TMC_PSCR (0x308)
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#define TMC_ITMISCOP0 (0xEE0)
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#define TMC_ITTRFLIN (0xEE8)
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#define TMC_ITATBDATA0 (0xEEC)
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#define TMC_ITATBCTR2 (0xEF0)
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#define TMC_ITATBCTR1 (0xEF4)
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#define TMC_ITATBCTR0 (0xEF8)
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#define TMC_RSZ (0x004)
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#define TMC_STS (0x00C)
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#define TMC_RRD (0x010)
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#define TMC_RRP (0x014)
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#define TMC_RWP (0x018)
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#define TMC_TRG (0x01C)
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#define TMC_CTL (0x020)
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#define TMC_RWD (0x024)
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#define TMC_MODE (0x028)
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#define TMC_LBUFLEVEL (0x02C)
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#define TMC_CBUFLEVEL (0x030)
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#define TMC_BUFWM (0x034)
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#define TMC_RRPHI (0x038)
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#define TMC_RWPHI (0x03C)
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#define TMC_AXICTL (0x110)
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#define TMC_DBALO (0x118)
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#define TMC_DBAHI (0x11C)
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#define TMC_FFSR (0x300)
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#define TMC_FFCR (0x304)
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#define TMC_PSCR (0x308)
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#define TMC_ITMISCOP0 (0xEE0)
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#define TMC_ITTRFLIN (0xEE8)
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#define TMC_ITATBDATA0 (0xEEC)
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#define TMC_ITATBCTR2 (0xEF0)
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#define TMC_ITATBCTR1 (0xEF4)
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#define TMC_ITATBCTR0 (0xEF8)
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#define BYTES_PER_WORD 4
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#define TMC_ETR_BAM_PIPE_INDEX 0
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#define TMC_ETR_BAM_NR_PIPES 2
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#define BYTES_PER_WORD 4
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#define TMC_ETR_BAM_PIPE_INDEX 0
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#define TMC_ETR_BAM_NR_PIPES 2
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#define TMC_ETFETB_DUMP_VER_OFF (4)
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#define TMC_ETFETB_DUMP_VER (1)
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#define TMC_REG_DUMP_VER_OFF (4)
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#define TMC_REG_DUMP_VER (1)
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#define TMC_ETFETB_DUMP_MAGIC_OFF (0)
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#define TMC_ETFETB_DUMP_MAGIC (0x5D1DB1BF)
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#define TMC_ETFETB_DUMP_VER_OFF (4)
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#define TMC_ETFETB_DUMP_VER (1)
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#define TMC_REG_DUMP_MAGIC_OFF (0)
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#define TMC_REG_DUMP_MAGIC (0x5D1DB1BF)
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#define TMC_REG_DUMP_VER_OFF (4)
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#define TMC_REG_DUMP_VER (1)
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enum tmc_config_type {
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TMC_CONFIG_TYPE_ETB,
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@ -134,6 +138,8 @@ struct tmc_drvdata {
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struct mutex read_lock;
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int read_count;
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bool reading;
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bool aborting;
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char *reg_buf;
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char *buf;
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unsigned long paddr;
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void __iomem *vaddr;
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@ -462,10 +468,64 @@ static int tmc_enable_link(struct coresight_device *csdev, int inport,
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return tmc_enable(drvdata, TMC_MODE_HARDWARE_FIFO);
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}
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static void __tmc_reg_dump(struct tmc_drvdata *drvdata)
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{
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char *reg_hdr;
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uint32_t *reg_buf;
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if (!drvdata->reg_buf || !drvdata->aborting)
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return;
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reg_hdr = drvdata->reg_buf - PAGE_SIZE;
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reg_buf = (uint32_t *)drvdata->reg_buf;
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reg_buf[1] = tmc_readl(drvdata, TMC_RSZ);
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reg_buf[3] = tmc_readl(drvdata, TMC_STS);
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reg_buf[5] = tmc_readl(drvdata, TMC_RRP);
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reg_buf[6] = tmc_readl(drvdata, TMC_RWP);
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reg_buf[7] = tmc_readl(drvdata, TMC_TRG);
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reg_buf[8] = tmc_readl(drvdata, TMC_CTL);
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reg_buf[10] = tmc_readl(drvdata, TMC_MODE);
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reg_buf[11] = tmc_readl(drvdata, TMC_LBUFLEVEL);
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reg_buf[12] = tmc_readl(drvdata, TMC_CBUFLEVEL);
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reg_buf[13] = tmc_readl(drvdata, TMC_BUFWM);
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if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
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reg_buf[14] = tmc_readl(drvdata, TMC_RRPHI);
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reg_buf[15] = tmc_readl(drvdata, TMC_RWPHI);
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reg_buf[68] = tmc_readl(drvdata, TMC_AXICTL);
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reg_buf[70] = tmc_readl(drvdata, TMC_DBALO);
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reg_buf[71] = tmc_readl(drvdata, TMC_DBAHI);
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}
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reg_buf[192] = tmc_readl(drvdata, TMC_FFSR);
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reg_buf[193] = tmc_readl(drvdata, TMC_FFCR);
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reg_buf[194] = tmc_readl(drvdata, TMC_PSCR);
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reg_buf[1000] = tmc_readl(drvdata, CORESIGHT_CLAIMSET);
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reg_buf[1001] = tmc_readl(drvdata, CORESIGHT_CLAIMCLR);
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reg_buf[1005] = tmc_readl(drvdata, CORESIGHT_LSR);
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reg_buf[1006] = tmc_readl(drvdata, CORESIGHT_AUTHSTATUS);
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reg_buf[1010] = tmc_readl(drvdata, CORESIGHT_DEVID);
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reg_buf[1011] = tmc_readl(drvdata, CORESIGHT_DEVTYPE);
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reg_buf[1012] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR4);
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reg_buf[1013] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR5);
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reg_buf[1014] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR6);
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reg_buf[1015] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR7);
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reg_buf[1016] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR0);
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reg_buf[1017] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR1);
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reg_buf[1018] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR2);
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reg_buf[1019] = tmc_readl(drvdata, CORESIGHT_PERIPHIDR3);
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reg_buf[1020] = tmc_readl(drvdata, CORESIGHT_COMPIDR0);
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reg_buf[1021] = tmc_readl(drvdata, CORESIGHT_COMPIDR1);
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reg_buf[1022] = tmc_readl(drvdata, CORESIGHT_COMPIDR2);
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reg_buf[1023] = tmc_readl(drvdata, CORESIGHT_COMPIDR3);
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*(uint32_t *)(reg_hdr + TMC_REG_DUMP_MAGIC_OFF) = TMC_REG_DUMP_MAGIC;
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}
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static void __tmc_etb_dump(struct tmc_drvdata *drvdata)
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{
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enum tmc_mem_intf_width memwidth;
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uint8_t memwords;
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char *hdr;
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char *bufp;
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uint32_t read_data;
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int i;
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@ -485,11 +545,18 @@ static void __tmc_etb_dump(struct tmc_drvdata *drvdata)
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for (i = 0; i < memwords; i++) {
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read_data = tmc_readl(drvdata, TMC_RRD);
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if (read_data == 0xFFFFFFFF)
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return;
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goto out;
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memcpy(bufp, &read_data, BYTES_PER_WORD);
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bufp += BYTES_PER_WORD;
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}
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}
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out:
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if (drvdata->aborting) {
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hdr = drvdata->buf - PAGE_SIZE;
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*(uint32_t *)(hdr + TMC_ETFETB_DUMP_MAGIC_OFF) =
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TMC_ETFETB_DUMP_MAGIC;
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}
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}
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static void __tmc_etb_disable(struct tmc_drvdata *drvdata)
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@ -498,6 +565,7 @@ static void __tmc_etb_disable(struct tmc_drvdata *drvdata)
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tmc_flush_and_stop(drvdata);
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__tmc_etb_dump(drvdata);
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__tmc_reg_dump(drvdata);
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__tmc_disable(drvdata);
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TMC_LOCK(drvdata);
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@ -522,6 +590,7 @@ static void __tmc_etr_disable_to_mem(struct tmc_drvdata *drvdata)
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tmc_flush_and_stop(drvdata);
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__tmc_etr_dump(drvdata);
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__tmc_reg_dump(drvdata);
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__tmc_disable(drvdata);
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TMC_LOCK(drvdata);
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@ -604,6 +673,8 @@ static void tmc_abort(struct coresight_device *csdev)
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unsigned long flags;
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enum tmc_mode mode;
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drvdata->aborting = true;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading)
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goto out0;
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@ -1077,8 +1148,10 @@ static int __devinit tmc_probe(struct platform_device *pdev)
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dump.start_addr = virt_to_phys(baddr);
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dump.end_addr = dump.start_addr + PAGE_SIZE + drvdata->size;
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ret = msm_dump_table_register(&dump);
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/* Don't free the buffer in case of error since it can still
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* be used to provide dump collection via the device node
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/*
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* Don't free the buffer in case of error since it can still
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* be used to provide dump collection via the device node or
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* as part of abort.
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*/
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if (ret)
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dev_info(dev, "TMC ETF-ETB dump setup failed\n");
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@ -1087,15 +1160,19 @@ static int __devinit tmc_probe(struct platform_device *pdev)
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baddr = devm_kzalloc(dev, PAGE_SIZE + reg_size, GFP_KERNEL);
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if (baddr) {
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drvdata->reg_buf = baddr + PAGE_SIZE;
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*(uint32_t *)(baddr + TMC_REG_DUMP_VER_OFF) = TMC_REG_DUMP_VER;
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dump.id = MSM_TMC0_REG + count;
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dump.start_addr = virt_to_phys(baddr);
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dump.end_addr = dump.start_addr + PAGE_SIZE + reg_size;
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ret = msm_dump_table_register(&dump);
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if (ret) {
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devm_kfree(dev, baddr);
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/*
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* Don't free the buffer in case of error since it can still
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* be used to dump registers as part of abort to aid post crash
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* parsing.
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*/
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if (ret)
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dev_info(dev, "TMC REG dump setup failed\n");
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}
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} else {
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dev_info(dev, "TMC REG dump space allocation failed\n");
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}
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