mirror of
https://github.com/followmsi/android_kernel_google_msm.git
synced 2024-11-06 23:17:41 +00:00
OMAP3: Setup MUX settings for SDRC CKE signals
This patches ensures the MUX settings are correct for the SDRC CKE signals to SDRAM. This allows the self-refresh to work when 2 chip-selects are in use. A warning is thrown away in case the initial muxing is incorrect, in order to track faulty or old-dated bootloaders. Note: The CONFIG_OMAP_MUX and CONFIG_OMAP_MUX_WARNINGS options must be enabled for the mux code to have effect. Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
parent
58cda884ec
commit
9fb97412c3
6 changed files with 28 additions and 0 deletions
|
@ -409,6 +409,10 @@ static void __init omap3_beagle_init(void)
|
|||
|
||||
usb_musb_init();
|
||||
omap3beagle_flash_init();
|
||||
|
||||
/* Ensure SDRC pins are mux'd for self-refresh */
|
||||
omap_cfg_reg(H16_34XX_SDRC_CKE0);
|
||||
omap_cfg_reg(H17_34XX_SDRC_CKE1);
|
||||
}
|
||||
|
||||
static void __init omap3_beagle_map_io(void)
|
||||
|
|
|
@ -40,6 +40,7 @@
|
|||
#include <mach/mcspi.h>
|
||||
#include <mach/usb.h>
|
||||
#include <mach/keypad.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
#include "mmc-twl4030.h"
|
||||
|
@ -398,6 +399,10 @@ static void __init omap3pandora_init(void)
|
|||
omap3pandora_ads7846_init();
|
||||
pandora_keys_gpio_init();
|
||||
usb_musb_init();
|
||||
|
||||
/* Ensure SDRC pins are mux'd for self-refresh */
|
||||
omap_cfg_reg(H16_34XX_SDRC_CKE0);
|
||||
omap_cfg_reg(H17_34XX_SDRC_CKE1);
|
||||
}
|
||||
|
||||
static void __init omap3pandora_map_io(void)
|
||||
|
|
|
@ -44,6 +44,7 @@
|
|||
#include <mach/gpmc.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/usb.h>
|
||||
|
||||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
|
@ -396,6 +397,10 @@ static void __init overo_init(void)
|
|||
overo_ads7846_init();
|
||||
overo_init_smsc911x();
|
||||
|
||||
/* Ensure SDRC pins are mux'd for self-refresh */
|
||||
omap_cfg_reg(H16_34XX_SDRC_CKE0);
|
||||
omap_cfg_reg(H17_34XX_SDRC_CKE1);
|
||||
|
||||
if ((gpio_request(OVERO_GPIO_W2W_NRESET,
|
||||
"OVERO_GPIO_W2W_NRESET") == 0) &&
|
||||
(gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) {
|
||||
|
|
|
@ -75,6 +75,10 @@ static void __init rx51_init(void)
|
|||
omap_serial_init();
|
||||
usb_musb_init();
|
||||
rx51_peripherals_init();
|
||||
|
||||
/* Ensure SDRC pins are mux'd for self-refresh */
|
||||
omap_cfg_reg(H16_34XX_SDRC_CKE0);
|
||||
omap_cfg_reg(H17_34XX_SDRC_CKE1);
|
||||
}
|
||||
|
||||
static void __init rx51_map_io(void)
|
||||
|
|
|
@ -486,6 +486,12 @@ MUX_CFG_34XX("H19_34XX_GPIO164_OUT", 0x19c,
|
|||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_OUTPUT)
|
||||
MUX_CFG_34XX("J25_34XX_GPIO170", 0x1c6,
|
||||
OMAP34XX_MUX_MODE4 | OMAP34XX_PIN_INPUT)
|
||||
|
||||
/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
|
||||
MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
|
||||
OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
|
||||
MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
|
||||
OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
|
||||
};
|
||||
|
||||
#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
|
||||
|
|
|
@ -853,6 +853,10 @@ enum omap34xx_index {
|
|||
AE5_34XX_GPIO143,
|
||||
H19_34XX_GPIO164_OUT,
|
||||
J25_34XX_GPIO170,
|
||||
|
||||
/* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
|
||||
H16_34XX_SDRC_CKE0,
|
||||
H17_34XX_SDRC_CKE1,
|
||||
};
|
||||
|
||||
struct omap_mux_cfg {
|
||||
|
|
Loading…
Reference in a new issue