Piteball/android_kernel_google_msm
1
0
Fork 0
mirror of https://github.com/followmsi/android_kernel_google_msm.git synced 2024-11-06 23:17:41 +00:00
Code Issues Projects Releases Wiki Activity

sh: convert cpg code to sh_clk_ops

Browse source 
Convert the CPG code to use sh_clk_ops.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This commit is contained in:
Magnus Damm 2012-02-29 22:16:21 +09:00 committed by Rafael J. Wysocki
parent e34828298e
commit a0ec360f6b
1 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

16
drivers/sh/clk/cpg.c
View file

@ -26,7 +26,7 @@ static void sh_clk_mstp32_disable(struct clk *clk)
clk->mapped_reg); clk->mapped_reg);
} }
static struct clk_ops sh_clk_mstp32_clk_ops = { static struct sh_clk_ops sh_clk_mstp32_clk_ops = {
.enable = sh_clk_mstp32_enable, .enable = sh_clk_mstp32_enable,
.disable = sh_clk_mstp32_disable, .disable = sh_clk_mstp32_disable,
.recalc = followparent_recalc, .recalc = followparent_recalc,
@ -150,7 +150,7 @@ static void sh_clk_div6_disable(struct clk *clk)
iowrite32(value, clk->mapped_reg); iowrite32(value, clk->mapped_reg);
} }
static struct clk_ops sh_clk_div6_clk_ops = { static struct sh_clk_ops sh_clk_div6_clk_ops = {
.recalc = sh_clk_div6_recalc, .recalc = sh_clk_div6_recalc,
.round_rate = sh_clk_div_round_rate, .round_rate = sh_clk_div_round_rate,
.set_rate = sh_clk_div6_set_rate, .set_rate = sh_clk_div6_set_rate,
@ -158,7 +158,7 @@ static struct clk_ops sh_clk_div6_clk_ops = {
.disable = sh_clk_div6_disable, .disable = sh_clk_div6_disable,
}; };
static struct clk_ops sh_clk_div6_reparent_clk_ops = { static struct sh_clk_ops sh_clk_div6_reparent_clk_ops = {
.recalc = sh_clk_div6_recalc, .recalc = sh_clk_div6_recalc,
.round_rate = sh_clk_div_round_rate, .round_rate = sh_clk_div_round_rate,
.set_rate = sh_clk_div6_set_rate, .set_rate = sh_clk_div6_set_rate,
@ -200,7 +200,7 @@ static int __init sh_clk_init_parent(struct clk *clk)
} }
static int __init sh_clk_div6_register_ops(struct clk *clks, int nr, static int __init sh_clk_div6_register_ops(struct clk *clks, int nr,
struct clk_ops *ops) struct sh_clk_ops *ops)
{ {
struct clk *clkp; struct clk *clkp;
void *freq_table; void *freq_table;
@ -317,13 +317,13 @@ static void sh_clk_div4_disable(struct clk *clk)
iowrite32(ioread32(clk->mapped_reg) | (1 << 8), clk->mapped_reg); iowrite32(ioread32(clk->mapped_reg) | (1 << 8), clk->mapped_reg);
} }
static struct clk_ops sh_clk_div4_clk_ops = { static struct sh_clk_ops sh_clk_div4_clk_ops = {
.recalc = sh_clk_div4_recalc, .recalc = sh_clk_div4_recalc,
.set_rate = sh_clk_div4_set_rate, .set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate, .round_rate = sh_clk_div_round_rate,
}; };
static struct clk_ops sh_clk_div4_enable_clk_ops = { static struct sh_clk_ops sh_clk_div4_enable_clk_ops = {
.recalc = sh_clk_div4_recalc, .recalc = sh_clk_div4_recalc,
.set_rate = sh_clk_div4_set_rate, .set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate, .round_rate = sh_clk_div_round_rate,
@ -331,7 +331,7 @@ static struct clk_ops sh_clk_div4_enable_clk_ops = {
.disable = sh_clk_div4_disable, .disable = sh_clk_div4_disable,
}; };
static struct clk_ops sh_clk_div4_reparent_clk_ops = { static struct sh_clk_ops sh_clk_div4_reparent_clk_ops = {
.recalc = sh_clk_div4_recalc, .recalc = sh_clk_div4_recalc,
.set_rate = sh_clk_div4_set_rate, .set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate, .round_rate = sh_clk_div_round_rate,
@ -341,7 +341,7 @@ static struct clk_ops sh_clk_div4_reparent_clk_ops = {
}; };
static int __init sh_clk_div4_register_ops(struct clk *clks, int nr, static int __init sh_clk_div4_register_ops(struct clk *clks, int nr,
struct clk_div4_table *table, struct clk_ops *ops) struct clk_div4_table *table, struct sh_clk_ops *ops)
{ {
struct clk *clkp; struct clk *clkp;
void *freq_table; void *freq_table;