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msm: kgsl: Set the gpu address range for MMU to correct value

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Set the upper limit for the gpu address that the MMU can access to
be the base address where the first IOMMU units register space
is mapped. Earlier we set it to the last address mapped minus
a PAGE_SIZE, but we can actually set it to the base address of the
first mapped unit since the GPU should never access that space
unless we are updating IOMMU registers.

Change-Id: I6507ee373a9218210c148685e443e948a311bd29
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
This commit is contained in:
Shubhraprakash Das 2012-08-08 18:21:36 -07:00 committed by Stephen Boyd
parent c8806dbeaa
commit a22e44ebdb
2 changed files with 2 additions and 4 deletions
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2
drivers/gpu/msm/adreno.c
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@ -387,7 +387,7 @@ static void adreno_iommu_setstate(struct kgsl_device *device,
if (cpu_is_msm8960())
cmds += adreno_add_change_mh_phys_limit_cmds(cmds,
reg_map_desc[num_iommu_units - 1]->gpuaddr - PAGE_SIZE,
reg_map_desc[0]->gpuaddr,
device->mmu.setstate_memory.gpuaddr +
KGSL_IOMMU_SETSTATE_NOP_OFFSET);
else

4
drivers/gpu/msm/kgsl_iommu.c
View file

@ -756,9 +756,7 @@ static int kgsl_iommu_start(struct kgsl_mmu *mmu)
kgsl_regwrite(mmu->device, MH_MMU_CONFIG, 0x00000001);
kgsl_regwrite(mmu->device, MH_MMU_MPU_END,
mh->mpu_base +
iommu->iommu_units
[iommu->unit_count - 1].reg_map.gpuaddr -
PAGE_SIZE);
iommu->iommu_units[0].reg_map.gpuaddr);
} else {
kgsl_regwrite(mmu->device, MH_MMU_CONFIG, 0x00000000);
}