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ARM: configs: flo: Go back to 100Hz

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On the low-class hardware like flo this only introduces issues
and performance degradation due to increased scheduler overhead.

Revert "arm: configs: flo: set CONFIG_HZ to 300"

This reverts commit 029a1baa6f.

Revert "ARM: msm: flo: fix idle_timeout value to 100ms"

This reverts commit a63fd90f21.

Revert "msm: kgsl: Fix direct references to HZ"

This reverts commit 38d48e1127.

Change-Id: Ib65977c959bff9cce43f5039f8f543e074992fec
This commit is contained in:
Artem Borisov 2018-03-23 18:38:25 +03:00
parent fa52784cac
commit a4b9cf707b
7 changed files with 23 additions and 11 deletions
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2
Documentation/devicetree/bindings/gpu/adreno.txt
View file

@ -63,7 +63,7 @@ Optional Properties:
- qcom,initial-powerlevel: This value indicates which qcom,gpu-pwrlevel should be used at start time
and when coming back out of resume
- qcom,step-pwrlevel: How many qcom,gpu-pwrlevel should be decremented at once
- qcom,idle-timeout: This property represents the time in milliseconds for idle timeout.
- qcom,idle-timeout: This property represents the time in microseconds for idle timeout.
- qcom,chipid: If it exists this property is used to replace
the chip identification read from the GPU hardware.
This is used to override faulty hardware readings.

10
arch/arm/Kconfig
View file

@ -1695,7 +1695,15 @@ config ARCH_NR_GPIO
If unsure, leave the default value.
source kernel/Kconfig.preempt
source kernel/Kconfig.hz
config HZ
int
default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
ARCH_S5PV210 || ARCH_EXYNOS4
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
default 100
config THUMB2_KERNEL
bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"

1
arch/arm/configs/lineageos_flo_defconfig
View file

@ -91,7 +91,6 @@ CONFIG_SMP=y
# CONFIG_SMP_ON_UP is not set
CONFIG_SCHED_MC=y
CONFIG_PREEMPT=y
CONFIG_HZ_300=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_HIGHMEM=y

2
arch/arm/mach-msm/asustek/flo/board-flo-gpu.c
View file

@ -254,7 +254,7 @@ static struct kgsl_device_platform_data kgsl_3d0_pdata = {
.init_level = 1,
.num_levels = 5,
.set_grp_async = NULL,
.idle_timeout = 100,
.idle_timeout = HZ/10,
.strtstp_sleepwake = true,
.clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE,
#ifdef CONFIG_MSM_BUS_SCALING

2
drivers/gpu/msm/adreno.c
View file

@ -1439,7 +1439,7 @@ static int adreno_of_get_pdata(struct platform_device *pdev)
if (adreno_of_read_property(pdev->dev.of_node, "qcom,idle-timeout",
&pdata->idle_timeout))
pdata->idle_timeout = 80;
pdata->idle_timeout = HZ/12;
pdata->strtstp_sleepwake = of_property_read_bool(pdev->dev.of_node,
"qcom,strtstp-sleepwake");

2
drivers/gpu/msm/kgsl_device.h
View file

@ -30,6 +30,8 @@
#define KGSL_TIMEOUT_PART 50 /* 50 msec */
#define KGSL_TIMEOUT_LONG_IB_DETECTION 2000 /* 2 sec*/
#define FIRST_TIMEOUT (HZ / 2)
/* KGSL device state is initialized to INIT when platform_probe *
* sucessfully initialized the device. Once a device has been opened *

15
drivers/gpu/msm/kgsl_pwrctrl.c
View file

@ -491,6 +491,7 @@ static int kgsl_pwrctrl_idle_timer_store(struct device *dev,
unsigned long val;
struct kgsl_device *device = kgsl_device_from_dev(dev);
struct kgsl_pwrctrl *pwr;
const long div = 1000/HZ;
int rc;
if (device == NULL)
@ -505,8 +506,9 @@ static int kgsl_pwrctrl_idle_timer_store(struct device *dev,
mutex_lock(&device->mutex);
/* Let the timeout be requested in jiffies */
pwr->interval_timeout = msecs_to_jiffies(val);
/* Let the timeout be requested in ms, but convert to jiffies. */
val /= div;
pwr->interval_timeout = val;
mutex_unlock(&device->mutex);
@ -518,11 +520,12 @@ static int kgsl_pwrctrl_idle_timer_show(struct device *dev,
char *buf)
{
struct kgsl_device *device = kgsl_device_from_dev(dev);
int mul = 1000/HZ;
if (device == NULL)
return 0;
/* Show the idle_timeout in msec */
/* Show the idle_timeout converted to msec */
return snprintf(buf, PAGE_SIZE, "%d\n",
jiffies_to_msecs(device->pwrctrl.interval_timeout));
device->pwrctrl.interval_timeout * mul);
}
static int kgsl_pwrctrl_pmqos_latency_store(struct device *dev,
@ -1080,7 +1083,7 @@ int kgsl_pwrctrl_init(struct kgsl_device *device)
pwr->power_flags = 0;
pwr->idle_needed = pdata->idle_needed;
pwr->interval_timeout = msecs_to_jiffies(pdata->idle_timeout);
pwr->interval_timeout = pdata->idle_timeout;
pwr->strtstp_sleepwake = pdata->strtstp_sleepwake;
pwr->ebi1_clk = clk_get(&pdev->dev, "bus_clk");
if (IS_ERR(pwr->ebi1_clk))
@ -1631,7 +1634,7 @@ int kgsl_active_count_wait(struct kgsl_device *device, int count)
int ret;
mutex_unlock(&device->mutex);
ret = wait_event_timeout(device->active_cnt_wq,
_check_active_count(device, count), msecs_to_jiffies(1000));
_check_active_count(device, count), HZ);
mutex_lock(&device->mutex);
result = ret == 0 ? -ETIMEDOUT : 0;
}