mirror of
https://github.com/followmsi/android_kernel_google_msm.git
synced 2024-11-06 23:17:41 +00:00
PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev
commit fc2798502f
upstream.
These interfaces:
pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource)
pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region)
took a pci_dev, but they really depend only on the pci_bus. And we want to
use them in resource allocation paths where we have the bus but not a
device, so this patch converts them to take the pci_bus instead of the
pci_dev:
pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource)
pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region)
In fact, with standard PCI-PCI bridges, they only depend on the host
bridge, because that's the only place address translation occurs, but
we aren't going that far yet.
[bhelgaas: changelog]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dirk Behme <dirk.behme@gmail.com>
[lizf: Backported to 3.4:
- make changes to pci_host_bridge() instead of find_pci_root_bus()
- adjust context]
Signed-off-by: Zefan Li <lizefan@huawei.com>
This commit is contained in:
parent
edf76233db
commit
bded67cc51
16 changed files with 49 additions and 50 deletions
|
@ -84,7 +84,7 @@ static int pci_mmap_resource(struct kobject *kobj,
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if (iomem_is_exclusive(res->start))
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if (iomem_is_exclusive(res->start))
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return -EINVAL;
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return -EINVAL;
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pcibios_resource_to_bus(pdev, &bar, res);
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pcibios_resource_to_bus(pdev->bus, &bar, res);
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vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
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vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
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mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
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mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
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@ -140,7 +140,7 @@ static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
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long dense_offset;
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long dense_offset;
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unsigned long sparse_size;
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unsigned long sparse_size;
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pcibios_resource_to_bus(pdev, &bar, &pdev->resource[num]);
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pcibios_resource_to_bus(pdev->bus, &bar, &pdev->resource[num]);
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/* All core logic chips have 4G sparse address space, except
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/* All core logic chips have 4G sparse address space, except
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CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
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CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
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@ -111,7 +111,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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res->name = pci_name(dev);
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res->name = pci_name(dev);
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region.start = base;
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region.start = base;
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region.end = base + size - 1;
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region.end = base + size - 1;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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}
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}
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@ -276,7 +276,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
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res->flags = flags;
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res->flags = flags;
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region.start = of_read_number(&ranges[1], 2);
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region.start = of_read_number(&ranges[1], 2);
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region.end = region.start + size - 1;
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region.end = region.start + size - 1;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
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sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
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bus->number);
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bus->number);
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@ -392,7 +392,7 @@ static void __devinit pnv_ioda_setup_pe_segments(struct pci_dev *dev)
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/* Setup IO segments */
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/* Setup IO segments */
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if (io_res.start < io_res.end) {
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if (io_res.start < io_res.end) {
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pcibios_resource_to_bus(dev, ®ion, &io_res);
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pcibios_resource_to_bus(dev->bus, ®ion, &io_res);
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pos = region.start;
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pos = region.start;
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i = pos / phb->ioda.io_segsize;
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i = pos / phb->ioda.io_segsize;
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while(i < phb->ioda.total_pe && pos <= region.end) {
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while(i < phb->ioda.total_pe && pos <= region.end) {
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@ -422,7 +422,7 @@ static void __devinit pnv_ioda_setup_pe_segments(struct pci_dev *dev)
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/* Setup M32 segments */
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/* Setup M32 segments */
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if (m32_res.start < m32_res.end) {
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if (m32_res.start < m32_res.end) {
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pcibios_resource_to_bus(dev, ®ion, &m32_res);
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pcibios_resource_to_bus(dev->bus, ®ion, &m32_res);
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pos = region.start;
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pos = region.start;
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i = pos / phb->ioda.m32_segsize;
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i = pos / phb->ioda.m32_segsize;
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while(i < phb->ioda.total_pe && pos <= region.end) {
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while(i < phb->ioda.total_pe && pos <= region.end) {
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@ -409,7 +409,7 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
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res2.flags = res->flags;
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res2.flags = res->flags;
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region.start = base;
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region.start = base;
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region.end = limit + 0xfff;
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region.end = limit + 0xfff;
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pcibios_bus_to_resource(dev, &res2, ®ion);
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pcibios_bus_to_resource(dev->bus, &res2, ®ion);
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if (!res->start)
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if (!res->start)
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res->start = res2.start;
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res->start = res2.start;
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if (!res->end)
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if (!res->end)
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@ -427,7 +427,7 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
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IORESOURCE_MEM);
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IORESOURCE_MEM);
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region.start = base;
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region.start = base;
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region.end = limit + 0xfffff;
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region.end = limit + 0xfffff;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
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pci_read_config_word(dev, PCI_PREF_MEMORY_BASE, &mem_base_lo);
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@ -458,7 +458,7 @@ static void __devinit pci_cfg_fake_ranges(struct pci_dev *dev,
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IORESOURCE_MEM | IORESOURCE_PREFETCH);
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IORESOURCE_MEM | IORESOURCE_PREFETCH);
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region.start = base;
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region.start = base;
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region.end = limit + 0xfffff;
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region.end = limit + 0xfffff;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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}
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}
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@ -480,7 +480,7 @@ static void __devinit apb_fake_ranges(struct pci_dev *dev,
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res->flags = IORESOURCE_IO;
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res->flags = IORESOURCE_IO;
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region.start = (first << 21);
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region.start = (first << 21);
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region.end = (last << 21) + ((1 << 21) - 1);
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region.end = (last << 21) + ((1 << 21) - 1);
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
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pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
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apb_calc_first_last(map, &first, &last);
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apb_calc_first_last(map, &first, &last);
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@ -488,7 +488,7 @@ static void __devinit apb_fake_ranges(struct pci_dev *dev,
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res->flags = IORESOURCE_MEM;
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res->flags = IORESOURCE_MEM;
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region.start = (first << 29);
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region.start = (first << 29);
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region.end = (last << 29) + ((1 << 29) - 1);
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region.end = (last << 29) + ((1 << 29) - 1);
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm,
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static void __devinit pci_of_scan_bus(struct pci_pbm_info *pbm,
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@ -579,7 +579,7 @@ static void __devinit of_scan_pci_bridge(struct pci_pbm_info *pbm,
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res->flags = flags;
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res->flags = flags;
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region.start = GET_64BIT(ranges, 1);
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region.start = GET_64BIT(ranges, 1);
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region.end = region.start + size - 1;
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region.end = region.start + size - 1;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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after_ranges:
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after_ranges:
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sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
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sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
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@ -44,12 +44,10 @@ int no_pci_devices(void)
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}
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}
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EXPORT_SYMBOL(no_pci_devices);
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EXPORT_SYMBOL(no_pci_devices);
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static struct pci_host_bridge *pci_host_bridge(struct pci_dev *dev)
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static struct pci_host_bridge *pci_host_bridge(struct pci_bus *bus)
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{
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{
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struct pci_bus *bus;
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struct pci_host_bridge *bridge;
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struct pci_host_bridge *bridge;
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bus = dev->bus;
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while (bus->parent)
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while (bus->parent)
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bus = bus->parent;
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bus = bus->parent;
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@ -66,10 +64,10 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
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return res1->start <= res2->start && res1->end >= res2->end;
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return res1->start <= res2->start && res1->end >= res2->end;
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}
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}
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void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
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void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
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struct resource *res)
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struct resource *res)
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{
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{
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struct pci_host_bridge *bridge = pci_host_bridge(dev);
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struct pci_host_bridge *bridge = pci_host_bridge(bus);
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struct pci_host_bridge_window *window;
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struct pci_host_bridge_window *window;
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resource_size_t offset = 0;
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resource_size_t offset = 0;
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@ -94,10 +92,10 @@ static bool region_contains(struct pci_bus_region *region1,
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return region1->start <= region2->start && region1->end >= region2->end;
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return region1->start <= region2->start && region1->end >= region2->end;
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}
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}
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void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
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void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
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struct pci_bus_region *region)
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struct pci_bus_region *region)
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{
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{
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struct pci_host_bridge *bridge = pci_host_bridge(dev);
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struct pci_host_bridge *bridge = pci_host_bridge(bus);
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struct pci_host_bridge_window *window;
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struct pci_host_bridge_window *window;
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struct pci_bus_region bus_region;
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struct pci_bus_region bus_region;
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resource_size_t offset = 0;
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resource_size_t offset = 0;
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@ -298,11 +296,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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pci_write_config_dword(dev, pos + 4, 0);
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pci_write_config_dword(dev, pos + 4, 0);
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region.start = 0;
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region.start = 0;
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region.end = sz64;
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region.end = sz64;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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} else {
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} else {
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region.start = l64;
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region.start = l64;
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region.end = l64 + sz64;
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region.end = l64 + sz64;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
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dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
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pos, res);
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pos, res);
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}
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}
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@ -314,7 +312,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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region.start = l;
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region.start = l;
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region.end = l + sz;
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region.end = l + sz;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
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dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
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}
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}
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@ -373,7 +371,7 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
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res2.flags = res->flags;
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res2.flags = res->flags;
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region.start = base;
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region.start = base;
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region.end = limit + 0xfff;
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region.end = limit + 0xfff;
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pcibios_bus_to_resource(dev, &res2, ®ion);
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pcibios_bus_to_resource(dev->bus, &res2, ®ion);
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if (!res->start)
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if (!res->start)
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res->start = res2.start;
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res->start = res2.start;
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if (!res->end)
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if (!res->end)
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@ -399,7 +397,7 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
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res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
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res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
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region.start = base;
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region.start = base;
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region.end = limit + 0xfffff;
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region.end = limit + 0xfffff;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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}
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}
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}
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}
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@ -448,7 +446,7 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
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res->flags |= IORESOURCE_MEM_64;
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res->flags |= IORESOURCE_MEM_64;
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region.start = base;
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region.start = base;
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region.end = limit + 0xfffff;
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region.end = limit + 0xfffff;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
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}
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}
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}
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}
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@ -1063,24 +1061,24 @@ int pci_setup_device(struct pci_dev *dev)
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region.end = 0x1F7;
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region.end = 0x1F7;
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res = &dev->resource[0];
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res = &dev->resource[0];
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res->flags = LEGACY_IO_RESOURCE;
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res->flags = LEGACY_IO_RESOURCE;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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region.start = 0x3F6;
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region.start = 0x3F6;
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region.end = 0x3F6;
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region.end = 0x3F6;
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res = &dev->resource[1];
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res = &dev->resource[1];
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res->flags = LEGACY_IO_RESOURCE;
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res->flags = LEGACY_IO_RESOURCE;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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if ((progif & 4) == 0) {
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if ((progif & 4) == 0) {
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region.start = 0x170;
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region.start = 0x170;
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region.end = 0x177;
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region.end = 0x177;
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res = &dev->resource[2];
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res = &dev->resource[2];
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res->flags = LEGACY_IO_RESOURCE;
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res->flags = LEGACY_IO_RESOURCE;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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region.start = 0x376;
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region.start = 0x376;
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region.end = 0x376;
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region.end = 0x376;
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res = &dev->resource[3];
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res = &dev->resource[3];
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res->flags = LEGACY_IO_RESOURCE;
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res->flags = LEGACY_IO_RESOURCE;
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pcibios_bus_to_resource(dev, res, ®ion);
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pcibios_bus_to_resource(dev->bus, res, ®ion);
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}
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}
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}
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}
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break;
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break;
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@ -393,7 +393,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
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/* Convert from PCI bus to resource space. */
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/* Convert from PCI bus to resource space. */
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bus_region.start = res->start;
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bus_region.start = res->start;
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bus_region.end = res->end;
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bus_region.end = res->end;
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pcibios_bus_to_resource(dev, res, &bus_region);
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pcibios_bus_to_resource(dev->bus, res, &bus_region);
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if (pci_claim_resource(dev, nr) == 0)
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if (pci_claim_resource(dev, nr) == 0)
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
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dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
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@ -31,7 +31,7 @@ int pci_enable_rom(struct pci_dev *pdev)
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if (!res->flags)
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if (!res->flags)
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return -1;
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return -1;
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|
||||||
pcibios_resource_to_bus(pdev, ®ion, res);
|
pcibios_resource_to_bus(pdev->bus, ®ion, res);
|
||||||
pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
|
pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
|
||||||
rom_addr &= ~PCI_ROM_ADDRESS_MASK;
|
rom_addr &= ~PCI_ROM_ADDRESS_MASK;
|
||||||
rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
|
rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
|
||||||
|
|
|
@ -408,7 +408,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
|
||||||
bus->secondary, bus->subordinate);
|
bus->secondary, bus->subordinate);
|
||||||
|
|
||||||
res = bus->resource[0];
|
res = bus->resource[0];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_IO) {
|
if (res->flags & IORESOURCE_IO) {
|
||||||
/*
|
/*
|
||||||
* The IO resource is allocated a range twice as large as it
|
* The IO resource is allocated a range twice as large as it
|
||||||
|
@ -422,7 +422,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
|
||||||
}
|
}
|
||||||
|
|
||||||
res = bus->resource[1];
|
res = bus->resource[1];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_IO) {
|
if (res->flags & IORESOURCE_IO) {
|
||||||
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
||||||
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
|
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
|
||||||
|
@ -432,7 +432,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
|
||||||
}
|
}
|
||||||
|
|
||||||
res = bus->resource[2];
|
res = bus->resource[2];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_MEM) {
|
if (res->flags & IORESOURCE_MEM) {
|
||||||
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
||||||
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
|
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
|
||||||
|
@ -442,7 +442,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
|
||||||
}
|
}
|
||||||
|
|
||||||
res = bus->resource[3];
|
res = bus->resource[3];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_MEM) {
|
if (res->flags & IORESOURCE_MEM) {
|
||||||
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
dev_info(&bridge->dev, " bridge window %pR\n", res);
|
||||||
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
|
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
|
||||||
|
@ -473,7 +473,7 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
|
||||||
|
|
||||||
/* Set up the top and bottom of the PCI I/O segment for this bus. */
|
/* Set up the top and bottom of the PCI I/O segment for this bus. */
|
||||||
res = bus->resource[0];
|
res = bus->resource[0];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_IO) {
|
if (res->flags & IORESOURCE_IO) {
|
||||||
pci_read_config_dword(bridge, PCI_IO_BASE, &l);
|
pci_read_config_dword(bridge, PCI_IO_BASE, &l);
|
||||||
l &= 0xffff0000;
|
l &= 0xffff0000;
|
||||||
|
@ -504,7 +504,7 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
|
||||||
|
|
||||||
/* Set up the top and bottom of the PCI Memory segment for this bus. */
|
/* Set up the top and bottom of the PCI Memory segment for this bus. */
|
||||||
res = bus->resource[1];
|
res = bus->resource[1];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_MEM) {
|
if (res->flags & IORESOURCE_MEM) {
|
||||||
l = (region.start >> 16) & 0xfff0;
|
l = (region.start >> 16) & 0xfff0;
|
||||||
l |= region.end & 0xfff00000;
|
l |= region.end & 0xfff00000;
|
||||||
|
@ -530,7 +530,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
|
||||||
/* Set up PREF base/limit. */
|
/* Set up PREF base/limit. */
|
||||||
bu = lu = 0;
|
bu = lu = 0;
|
||||||
res = bus->resource[2];
|
res = bus->resource[2];
|
||||||
pcibios_resource_to_bus(bridge, ®ion, res);
|
pcibios_resource_to_bus(bridge->bus, ®ion, res);
|
||||||
if (res->flags & IORESOURCE_PREFETCH) {
|
if (res->flags & IORESOURCE_PREFETCH) {
|
||||||
l = (region.start >> 16) & 0xfff0;
|
l = (region.start >> 16) & 0xfff0;
|
||||||
l |= region.end & 0xfff00000;
|
l |= region.end & 0xfff00000;
|
||||||
|
|
|
@ -50,7 +50,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
|
||||||
if (res->flags & IORESOURCE_PCI_FIXED)
|
if (res->flags & IORESOURCE_PCI_FIXED)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
pcibios_resource_to_bus(dev, ®ion, res);
|
pcibios_resource_to_bus(dev->bus, ®ion, res);
|
||||||
|
|
||||||
new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
|
new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
|
||||||
if (res->flags & IORESOURCE_IO)
|
if (res->flags & IORESOURCE_IO)
|
||||||
|
|
|
@ -610,7 +610,7 @@ static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_
|
||||||
|
|
||||||
enter("i82092aa_set_mem_map");
|
enter("i82092aa_set_mem_map");
|
||||||
|
|
||||||
pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res);
|
pcibios_resource_to_bus(sock_info->dev->bus, ®ion, mem->res);
|
||||||
|
|
||||||
map = mem->map;
|
map = mem->map;
|
||||||
if (map > 4) {
|
if (map > 4) {
|
||||||
|
|
|
@ -445,7 +445,7 @@ static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *
|
||||||
unsigned int start, stop, card_start;
|
unsigned int start, stop, card_start;
|
||||||
unsigned short word;
|
unsigned short word;
|
||||||
|
|
||||||
pcibios_resource_to_bus(socket->dev, ®ion, mem->res);
|
pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
|
||||||
|
|
||||||
map = mem->map;
|
map = mem->map;
|
||||||
start = region.start;
|
start = region.start;
|
||||||
|
@ -709,7 +709,7 @@ static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type
|
||||||
region.start = config_readl(socket, addr_start) & mask;
|
region.start = config_readl(socket, addr_start) & mask;
|
||||||
region.end = config_readl(socket, addr_end) | ~mask;
|
region.end = config_readl(socket, addr_end) | ~mask;
|
||||||
if (region.start && region.end > region.start && !override_bios) {
|
if (region.start && region.end > region.start && !override_bios) {
|
||||||
pcibios_bus_to_resource(dev, res, ®ion);
|
pcibios_bus_to_resource(dev->bus, res, ®ion);
|
||||||
if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
|
if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
|
||||||
return 0;
|
return 0;
|
||||||
dev_printk(KERN_INFO, &dev->dev,
|
dev_printk(KERN_INFO, &dev->dev,
|
||||||
|
@ -1033,7 +1033,7 @@ static void yenta_config_init(struct yenta_socket *socket)
|
||||||
struct pci_dev *dev = socket->dev;
|
struct pci_dev *dev = socket->dev;
|
||||||
struct pci_bus_region region;
|
struct pci_bus_region region;
|
||||||
|
|
||||||
pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]);
|
pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
|
||||||
|
|
||||||
config_writel(socket, CB_LEGACY_MODE_BASE, 0);
|
config_writel(socket, CB_LEGACY_MODE_BASE, 0);
|
||||||
config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
|
config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
|
||||||
|
|
|
@ -1609,7 +1609,7 @@ sym_iomap_device(struct sym_device *device)
|
||||||
struct pci_bus_region bus_addr;
|
struct pci_bus_region bus_addr;
|
||||||
int i = 2;
|
int i = 2;
|
||||||
|
|
||||||
pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
|
pcibios_resource_to_bus(pdev->bus, &bus_addr, &pdev->resource[1]);
|
||||||
device->mmio_base = bus_addr.start;
|
device->mmio_base = bus_addr.start;
|
||||||
|
|
||||||
if (device->chip.features & FE_RAM) {
|
if (device->chip.features & FE_RAM) {
|
||||||
|
@ -1619,7 +1619,8 @@ sym_iomap_device(struct sym_device *device)
|
||||||
*/
|
*/
|
||||||
if (!pdev->resource[i].flags)
|
if (!pdev->resource[i].flags)
|
||||||
i++;
|
i++;
|
||||||
pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
|
pcibios_resource_to_bus(pdev->bus, &bus_addr,
|
||||||
|
&pdev->resource[i]);
|
||||||
device->ram_base = bus_addr.start;
|
device->ram_base = bus_addr.start;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -1014,7 +1014,7 @@ static int __devinit ark_pci_probe(struct pci_dev *dev, const struct pci_device_
|
||||||
|
|
||||||
vga_res.flags = IORESOURCE_IO;
|
vga_res.flags = IORESOURCE_IO;
|
||||||
|
|
||||||
pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
|
pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
|
||||||
|
|
||||||
par->state.vgabase = (void __iomem *) vga_res.start;
|
par->state.vgabase = (void __iomem *) vga_res.start;
|
||||||
|
|
||||||
|
|
|
@ -1172,7 +1172,7 @@ static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_i
|
||||||
|
|
||||||
vga_res.flags = IORESOURCE_IO;
|
vga_res.flags = IORESOURCE_IO;
|
||||||
|
|
||||||
pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
|
pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
|
||||||
|
|
||||||
par->state.vgabase = (void __iomem *) vga_res.start;
|
par->state.vgabase = (void __iomem *) vga_res.start;
|
||||||
|
|
||||||
|
|
|
@ -727,7 +727,7 @@ static int __devinit vt8623_pci_probe(struct pci_dev *dev, const struct pci_devi
|
||||||
|
|
||||||
vga_res.flags = IORESOURCE_IO;
|
vga_res.flags = IORESOURCE_IO;
|
||||||
|
|
||||||
pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
|
pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
|
||||||
|
|
||||||
par->state.vgabase = (void __iomem *) vga_res.start;
|
par->state.vgabase = (void __iomem *) vga_res.start;
|
||||||
|
|
||||||
|
|
|
@ -648,9 +648,9 @@ void pci_fixup_cardbus(struct pci_bus *);
|
||||||
|
|
||||||
/* Generic PCI functions used internally */
|
/* Generic PCI functions used internally */
|
||||||
|
|
||||||
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
|
void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
|
||||||
struct resource *res);
|
struct resource *res);
|
||||||
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
|
void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
|
||||||
struct pci_bus_region *region);
|
struct pci_bus_region *region);
|
||||||
void pcibios_scan_specific_bus(int busn);
|
void pcibios_scan_specific_bus(int busn);
|
||||||
extern struct pci_bus *pci_find_bus(int domain, int busnr);
|
extern struct pci_bus *pci_find_bus(int domain, int busnr);
|
||||||
|
|
Loading…
Reference in a new issue