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Revert "Camera Bring-up MR1."

Browse source 
This reverts commit 5cf67b1a1f82e20e9659a4a120c67abe4f918893.

Change-Id: If4e182553f46918e5b7a84e9f915039a52541ebb
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
This commit is contained in:
Sudhir Sharma 2012-12-01 14:00:27 -08:00 committed by Stephen Boyd
parent 5861b2e9b8
commit bea6dbbe98
265 changed files with 4417 additions and 16265 deletions
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90
arch/arm/mach-msm/board-8064-camera.c
View file

@ -16,7 +16,7 @@
#include <asm/mach-types.h>
#include <mach/camera.h>
#include <mach/board.h>
#include <mach/msm_bus_board.h>
#include <mach/gpiomux.h>
@ -323,40 +323,6 @@ static struct msm_bus_vectors cam_video_ls_vectors[] = {
},
};
static struct msm_bus_vectors cam_dual_vectors[] = {
{
.src = MSM_BUS_MASTER_VFE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 348192000,
.ib = 1208286720,
},
{
.src = MSM_BUS_MASTER_VPE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 206807040,
.ib = 488816640,
},
{
.src = MSM_BUS_MASTER_JPEG_ENC,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 540000000,
.ib = 1350000000,
},
{
.src = MSM_BUS_MASTER_JPEG_ENC,
.dst = MSM_BUS_SLAVE_MM_IMEM,
.ab = 43200000,
.ib = 69120000,
},
{
.src = MSM_BUS_MASTER_VFE,
.dst = MSM_BUS_SLAVE_MM_IMEM,
.ab = 43200000,
.ib = 69120000,
},
};
static struct msm_bus_paths cam_bus_client_config[] = {
{
ARRAY_SIZE(cam_init_vectors),
@ -382,10 +348,6 @@ static struct msm_bus_paths cam_bus_client_config[] = {
ARRAY_SIZE(cam_video_ls_vectors),
cam_video_ls_vectors,
},
{
ARRAY_SIZE(cam_dual_vectors),
cam_dual_vectors,
},
};
static struct msm_bus_scale_pdata cam_bus_client_pdata = {
@ -407,13 +369,20 @@ static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
},
};
static struct camera_vreg_t apq_8064_cam_vreg[] = {
static struct camera_vreg_t apq_8064_back_cam_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct camera_vreg_t apq_8064_front_cam_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
#define CAML_RSTN PM8921_GPIO_PM_TO_SYS(28)
#define CAMR_RSTN 34
@ -513,8 +482,8 @@ static struct msm_camera_csi_lane_params imx074_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_imx074 = {
.mount_angle = 90,
.cam_vreg = apq_8064_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_cam_vreg),
.cam_vreg = apq_8064_back_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_back_cam_vreg),
.gpio_conf = &apq8064_back_cam_gpio_conf,
.i2c_conf = &apq8064_back_cam_i2c_conf,
.csi_lane_params = &imx074_csi_lane_params,
@ -546,14 +515,21 @@ static struct msm_camera_csi_lane_params imx091_csi_lane_params = {
.csi_lane_mask = 0xF,
};
static struct camera_vreg_t apq_8064_imx091_vreg[] = {
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
};
static struct msm_camera_sensor_flash_data flash_imx091 = {
.flash_type = MSM_CAMERA_FLASH_NONE,
};
static struct msm_camera_sensor_platform_info sensor_board_info_imx091 = {
.mount_angle = 0,
.cam_vreg = apq_8064_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_cam_vreg),
.cam_vreg = apq_8064_imx091_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_imx091_vreg),
.gpio_conf = &apq8064_back_cam_gpio_conf,
.i2c_conf = &apq8064_back_cam_i2c_conf,
.csi_lane_params = &imx091_csi_lane_params,
@ -580,6 +556,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_imx091_data = {
.eeprom_info = &imx091_eeprom_info,
};
static struct camera_vreg_t apq_8064_s5k3l1yx_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct msm_camera_sensor_flash_data flash_s5k3l1yx = {
.flash_type = MSM_CAMERA_FLASH_NONE,
};
@ -591,8 +574,8 @@ static struct msm_camera_csi_lane_params s5k3l1yx_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_s5k3l1yx = {
.mount_angle = 90,
.cam_vreg = apq_8064_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_cam_vreg),
.cam_vreg = apq_8064_s5k3l1yx_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_s5k3l1yx_vreg),
.gpio_conf = &apq8064_back_cam_gpio_conf,
.i2c_conf = &apq8064_back_cam_i2c_conf,
.csi_lane_params = &s5k3l1yx_csi_lane_params,
@ -608,6 +591,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_s5k3l1yx_data = {
.sensor_type = BAYER_SENSOR,
};
static struct camera_vreg_t apq_8064_mt9m114_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct msm_camera_sensor_flash_data flash_mt9m114 = {
.flash_type = MSM_CAMERA_FLASH_NONE
};
@ -619,8 +609,8 @@ static struct msm_camera_csi_lane_params mt9m114_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_mt9m114 = {
.mount_angle = 90,
.cam_vreg = apq_8064_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_cam_vreg),
.cam_vreg = apq_8064_mt9m114_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_mt9m114_vreg),
.gpio_conf = &apq8064_front_cam_gpio_conf,
.i2c_conf = &apq8064_front_cam_i2c_conf,
.csi_lane_params = &mt9m114_csi_lane_params,
@ -647,8 +637,8 @@ static struct msm_camera_csi_lane_params ov2720_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_ov2720 = {
.mount_angle = 0,
.cam_vreg = apq_8064_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_cam_vreg),
.cam_vreg = apq_8064_front_cam_vreg,
.num_vreg = ARRAY_SIZE(apq_8064_front_cam_vreg),
.gpio_conf = &apq8064_front_cam_gpio_conf,
.i2c_conf = &apq8064_front_cam_i2c_conf,
.csi_lane_params = &ov2720_csi_lane_params,

66
arch/arm/mach-msm/board-8930-camera.c
View file

@ -13,7 +13,7 @@
#include <asm/mach-types.h>
#include <linux/gpio.h>
#include <mach/camera.h>
#include <mach/board.h>
#include <mach/msm_bus_board.h>
#include <mach/gpiomux.h>
#include "devices.h"
@ -331,28 +331,6 @@ static struct msm_bus_vectors cam_video_ls_vectors[] = {
},
};
static struct msm_bus_vectors cam_dual_vectors[] = {
{
.src = MSM_BUS_MASTER_VFE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 302071680,
.ib = 1208286720,
},
{
.src = MSM_BUS_MASTER_VPE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 206807040,
.ib = 488816640,
},
{
.src = MSM_BUS_MASTER_JPEG_ENC,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 540000000,
.ib = 1350000000,
},
};
static struct msm_bus_paths cam_bus_client_config[] = {
{
ARRAY_SIZE(cam_init_vectors),
@ -378,10 +356,6 @@ static struct msm_bus_paths cam_bus_client_config[] = {
ARRAY_SIZE(cam_video_ls_vectors),
cam_video_ls_vectors,
},
{
ARRAY_SIZE(cam_dual_vectors),
cam_dual_vectors,
},
};
static struct msm_bus_scale_pdata cam_bus_client_pdata = {
@ -403,13 +377,19 @@ static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
},
};
static struct camera_vreg_t msm_8930_cam_vreg[] = {
static struct camera_vreg_t msm_8930_back_cam_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct camera_vreg_t msm_8930_front_cam_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
};
static struct gpio msm8930_common_cam_gpio[] = {
{20, GPIOF_DIR_IN, "CAMIF_I2C_DATA"},
{21, GPIOF_DIR_IN, "CAMIF_I2C_CLK"},
@ -486,8 +466,8 @@ static struct msm_camera_csi_lane_params imx074_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_imx074 = {
.mount_angle = 90,
.cam_vreg = msm_8930_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_cam_vreg),
.cam_vreg = msm_8930_back_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_back_cam_vreg),
.gpio_conf = &msm_8930_back_cam_gpio_conf,
.csi_lane_params = &imx074_csi_lane_params,
};
@ -504,6 +484,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
.actuator_info = &msm_act_main_cam_0_info,
};
static struct camera_vreg_t msm_8930_mt9m114_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct msm_camera_sensor_flash_data flash_mt9m114 = {
.flash_type = MSM_CAMERA_FLASH_NONE
};
@ -515,8 +502,8 @@ static struct msm_camera_csi_lane_params mt9m114_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_mt9m114 = {
.mount_angle = 90,
.cam_vreg = msm_8930_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_cam_vreg),
.cam_vreg = msm_8930_mt9m114_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_mt9m114_vreg),
.gpio_conf = &msm_8930_front_cam_gpio_conf,
.csi_lane_params = &mt9m114_csi_lane_params,
};
@ -542,8 +529,8 @@ static struct msm_camera_csi_lane_params ov2720_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_ov2720 = {
.mount_angle = 0,
.cam_vreg = msm_8930_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_cam_vreg),
.cam_vreg = msm_8930_front_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_front_cam_vreg),
.gpio_conf = &msm_8930_front_cam_gpio_conf,
.csi_lane_params = &ov2720_csi_lane_params,
};
@ -558,6 +545,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
.sensor_type = BAYER_SENSOR,
};
static struct camera_vreg_t msm_8930_s5k3l1yx_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vaf", REG_LDO, 2800000, 2850000, 300000},
};
static struct msm_camera_sensor_flash_data flash_s5k3l1yx = {
.flash_type = MSM_CAMERA_FLASH_LED,
.flash_src = &msm_flash_src
@ -570,8 +564,8 @@ static struct msm_camera_csi_lane_params s5k3l1yx_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_s5k3l1yx = {
.mount_angle = 90,
.cam_vreg = msm_8930_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_cam_vreg),
.cam_vreg = msm_8930_s5k3l1yx_vreg,
.num_vreg = ARRAY_SIZE(msm_8930_s5k3l1yx_vreg),
.gpio_conf = &msm_8930_back_cam_gpio_conf,
.csi_lane_params = &s5k3l1yx_csi_lane_params,
};

98
arch/arm/mach-msm/board-8960-camera.c
View file

@ -13,7 +13,7 @@
#include <asm/mach-types.h>
#include <linux/gpio.h>
#include <mach/camera.h>
#include <mach/board.h>
#include <mach/msm_bus_board.h>
#include <mach/gpiomux.h>
#include "devices.h"
@ -402,40 +402,6 @@ static struct msm_bus_vectors cam_video_ls_vectors[] = {
},
};
static struct msm_bus_vectors cam_dual_vectors[] = {
{
.src = MSM_BUS_MASTER_VFE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 348192000,
.ib = 1208286720,
},
{
.src = MSM_BUS_MASTER_VPE,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 206807040,
.ib = 488816640,
},
{
.src = MSM_BUS_MASTER_JPEG_ENC,
.dst = MSM_BUS_SLAVE_EBI_CH0,
.ab = 540000000,
.ib = 1350000000,
},
{
.src = MSM_BUS_MASTER_JPEG_ENC,
.dst = MSM_BUS_SLAVE_MM_IMEM,
.ab = 43200000,
.ib = 69120000,
},
{
.src = MSM_BUS_MASTER_VFE,
.dst = MSM_BUS_SLAVE_MM_IMEM,
.ab = 43200000,
.ib = 69120000,
},
};
static struct msm_bus_paths cam_bus_client_config[] = {
{
@ -462,10 +428,6 @@ static struct msm_bus_paths cam_bus_client_config[] = {
ARRAY_SIZE(cam_video_ls_vectors),
cam_video_ls_vectors,
},
{
ARRAY_SIZE(cam_dual_vectors),
cam_dual_vectors,
},
};
static struct msm_bus_scale_pdata cam_bus_client_pdata = {
@ -492,13 +454,19 @@ static struct msm_camera_device_platform_data msm_camera_csi_device_data[] = {
},
};
static struct camera_vreg_t msm_8960_cam_vreg[] = {
static struct camera_vreg_t msm_8960_back_cam_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2800000, 300000},
};
static struct camera_vreg_t msm_8960_front_cam_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
};
static struct gpio msm8960_common_cam_gpio[] = {
{5, GPIOF_DIR_IN, "CAMIF_MCLK"},
{20, GPIOF_DIR_IN, "CAMIF_I2C_DATA"},
@ -583,8 +551,8 @@ static struct msm_camera_csi_lane_params imx074_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_imx074 = {
.mount_angle = 90,
.cam_vreg = msm_8960_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_cam_vreg),
.cam_vreg = msm_8960_back_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_back_cam_vreg),
.gpio_conf = &msm_8960_back_cam_gpio_conf,
.csi_lane_params = &imx074_csi_lane_params,
};
@ -611,6 +579,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
.eeprom_info = &imx074_eeprom_info,
};
static struct camera_vreg_t msm_8960_mt9m114_vreg[] = {
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2800000, 300000},
};
static struct msm_camera_sensor_flash_data flash_mt9m114 = {
.flash_type = MSM_CAMERA_FLASH_NONE
};
@ -620,16 +595,10 @@ static struct msm_camera_csi_lane_params mt9m114_csi_lane_params = {
.csi_lane_mask = 0x1,
};
static struct camera_vreg_t mt9m114_cam_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000, 50},
{"cam_vio", REG_VS, 0, 0, 0, 50},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600, 50},
};
static struct msm_camera_sensor_platform_info sensor_board_info_mt9m114 = {
.mount_angle = 90,
.cam_vreg = mt9m114_cam_vreg,
.num_vreg = ARRAY_SIZE(mt9m114_cam_vreg),
.cam_vreg = msm_8960_mt9m114_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_mt9m114_vreg),
.gpio_conf = &msm_8960_front_cam_gpio_conf,
.csi_lane_params = &mt9m114_csi_lane_params,
};
@ -655,8 +624,8 @@ static struct msm_camera_csi_lane_params ov2720_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_ov2720 = {
.mount_angle = 0,
.cam_vreg = msm_8960_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_cam_vreg),
.cam_vreg = msm_8960_front_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_front_cam_vreg),
.gpio_conf = &msm_8960_front_cam_gpio_conf,
.csi_lane_params = &ov2720_csi_lane_params,
};
@ -671,6 +640,13 @@ static struct msm_camera_sensor_info msm_camera_sensor_ov2720_data = {
.sensor_type = BAYER_SENSOR,
};
static struct camera_vreg_t msm_8960_s5k3l1yx_vreg[] = {
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vio", REG_VS, 0, 0, 0},
{"cam_vaf", REG_LDO, 2800000, 2800000, 300000},
};
static struct msm_camera_sensor_flash_data flash_s5k3l1yx = {
.flash_type = MSM_CAMERA_FLASH_NONE,
};
@ -682,8 +658,8 @@ static struct msm_camera_csi_lane_params s5k3l1yx_csi_lane_params = {
static struct msm_camera_sensor_platform_info sensor_board_info_s5k3l1yx = {
.mount_angle = 0,
.cam_vreg = msm_8960_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_cam_vreg),
.cam_vreg = msm_8960_s5k3l1yx_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_s5k3l1yx_vreg),
.gpio_conf = &msm_8960_back_cam_gpio_conf,
.csi_lane_params = &s5k3l1yx_csi_lane_params,
};
@ -712,6 +688,13 @@ static struct msm_camera_csi_lane_params imx091_csi_lane_params = {
.csi_lane_mask = 0xF,
};
static struct camera_vreg_t msm_8960_imx091_vreg[] = {
{"cam_vana", REG_LDO, 2800000, 2850000, 85600},
{"cam_vaf", REG_LDO, 2800000, 2800000, 300000},
{"cam_vdig", REG_LDO, 1200000, 1200000, 105000},
{"cam_vio", REG_VS, 0, 0, 0},
};
static struct msm_camera_sensor_flash_data flash_imx091 = {
.flash_type = MSM_CAMERA_FLASH_LED,
#ifdef CONFIG_MSM_CAMERA_FLASH
@ -721,8 +704,8 @@ static struct msm_camera_sensor_flash_data flash_imx091 = {
static struct msm_camera_sensor_platform_info sensor_board_info_imx091 = {
.mount_angle = 0,
.cam_vreg = msm_8960_cam_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_cam_vreg),
.cam_vreg = msm_8960_imx091_vreg,
.num_vreg = ARRAY_SIZE(msm_8960_imx091_vreg),
.gpio_conf = &msm_8960_back_cam_gpio_conf,
.csi_lane_params = &imx091_csi_lane_params,
};
@ -734,9 +717,6 @@ static struct i2c_board_info imx091_eeprom_i2c_info = {
static struct msm_eeprom_info imx091_eeprom_info = {
.board_info = &imx091_eeprom_i2c_info,
.bus_id = MSM_8960_GSBI4_QUP_I2C_BUS_ID,
.eeprom_i2c_slave_addr = 0xA1,
.eeprom_reg_addr = 0x05,
.eeprom_read_length = 6,
};
static struct msm_camera_sensor_info msm_camera_sensor_imx091_data = {

5
arch/arm/mach-msm/clock-8960.c
View file

@ -5398,11 +5398,16 @@ static struct clk_lookup msm_clocks_8064[] = {
CLK_LOOKUP("iface_clk", pmic_arb1_p_clk.c, ""),
CLK_LOOKUP("core_clk", pmic_ssbi2_clk.c, ""),
CLK_LOOKUP("mem_clk", rpm_msg_ram_p_clk.c, ""),
#if defined(CONFIG_MACH_LGE)
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-000d"),
CLK_LOOKUP("cam_clk", cam2_clk.c, "4-006e"),
#else /* QCT Original */
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-001a"),
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-0034"),
CLK_LOOKUP("cam_clk", cam0_clk.c, "4-0020"),
CLK_LOOKUP("cam_clk", cam1_clk.c, "4-0048"),
CLK_LOOKUP("cam_clk", cam1_clk.c, "4-006c"),
#endif
CLK_LOOKUP("csi_src_clk", csi0_src_clk.c, "msm_csid.0"),
CLK_LOOKUP("csi_src_clk", csi1_src_clk.c, "msm_csid.1"),
CLK_LOOKUP("csi_src_clk", csi2_src_clk.c, "msm_csid.2"),

20
arch/arm/mach-msm/devices-8064.c
View file

@ -2948,6 +2948,26 @@ struct platform_device coresight_etm3_device = {
};
struct msm_iommu_domain_name apq8064_iommu_ctx_names[] = {
/* Camera */
{
.name = "vpe_src",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vpe_dst",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_imgwr",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_misc",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "ijpeg_src",

20
arch/arm/mach-msm/devices-8930.c
View file

@ -1096,6 +1096,26 @@ void __init msm8930_add_vidc_device(void)
}
struct msm_iommu_domain_name msm8930_iommu_ctx_names[] = {
/* Camera */
{
.name = "vpe_src",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vpe_dst",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_imgwr",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_misc",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "ijpeg_src",

20
arch/arm/mach-msm/devices-8960.c
View file

@ -4089,6 +4089,26 @@ struct platform_device msm8960_device_cache_erp = {
};
struct msm_iommu_domain_name msm8960_iommu_ctx_names[] = {
/* Camera */
{
.name = "vpe_src",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vpe_dst",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_imgwr",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "vfe_misc",
.domain = CAMERA_DOMAIN,
},
/* Camera */
{
.name = "ijpeg_src",

55
arch/arm/mach-msm/include/mach/board.h Executable file → Normal file
View file

@ -64,6 +64,18 @@ struct msm_camera_device_platform_data {
uint8_t is_vpe;
struct msm_bus_scale_pdata *cam_bus_scale_table;
};
enum msm_camera_csi_data_format {
CSI_8BIT,
CSI_10BIT,
CSI_12BIT,
};
struct msm_camera_csi_params {
enum msm_camera_csi_data_format data_format;
uint8_t lane_cnt;
uint8_t lane_assign;
uint8_t settle_cnt;
uint8_t dpcm_scheme;
};
#ifdef CONFIG_SENSORS_MT9T013
struct msm_camera_legacy_device_platform_data {
@ -168,6 +180,21 @@ enum msm_sensor_type {
YUV_SENSOR,
};
enum camera_vreg_type {
REG_LDO,
REG_VS,
REG_GPIO,
REG_MAX
};
struct camera_vreg_t {
const char *reg_name;
enum camera_vreg_type type;
int min_voltage;
int max_voltage;
int op_mode;
};
struct msm_gpio_set_tbl {
unsigned gpio;
unsigned long flags;
@ -177,7 +204,6 @@ struct msm_gpio_set_tbl {
struct msm_camera_csi_lane_params {
uint16_t csi_lane_assign;
uint16_t csi_lane_mask;
uint8_t csi_phy_sel;
};
struct msm_camera_gpio_conf {
@ -208,13 +234,6 @@ struct msm_camera_i2c_conf {
enum msm_camera_i2c_mux_mode i2c_mux_mode;
};
enum msm_camera_vreg_name_t {
CAM_VDIG,
CAM_VIO,
CAM_VANA,
CAM_VAF,
};
struct msm_camera_sensor_platform_info {
int mount_angle;
int sensor_reset;
@ -249,9 +268,6 @@ struct msm_actuator_info {
struct msm_eeprom_info {
struct i2c_board_info const *board_info;
int bus_id;
int eeprom_reg_addr;
int eeprom_read_length;
int eeprom_i2c_slave_addr;
};
struct msm_camera_sensor_info {
@ -269,6 +285,7 @@ struct msm_camera_sensor_info {
uint8_t num_resources;
struct msm_camera_sensor_flash_data *flash_data;
int csi_if;
struct msm_camera_csi_params csi_params;
struct msm_camera_sensor_strobe_flash_data *strobe_flash_data;
char *eeprom_data;
enum msm_camera_type camera_type;
@ -391,13 +408,23 @@ struct msm_panel_common_pdata {
struct msm_bus_scale_pdata *mdp_bus_scale_table;
#endif
int mdp_rev;
void *power_on_set_1;
void *power_on_set_2;
void *power_on_set_3;
ssize_t power_on_set_size_1;
ssize_t power_on_set_size_2;
ssize_t power_on_set_size_3;
void *power_off_set_1;
void *power_off_set_2;
ssize_t power_off_set_size_1;
ssize_t power_off_set_size_2;
u32 ov0_wb_size; /* overlay0 writeback size */
u32 ov1_wb_size; /* overlay1 writeback size */
u32 mem_hid;
char cont_splash_enabled;
u32 splash_screen_addr;
u32 splash_screen_size;
char mdp_iommu_split_domain;
void (*bl_pwm_disable)(void);
int (*bl_on_status)(void);
};
@ -475,6 +502,7 @@ struct msm_fb_platform_data {
int (*allow_set_offset)(void);
char prim_panel_name[PANEL_NAME_MAX_LEN];
char ext_panel_name[PANEL_NAME_MAX_LEN];
int (*update_lcdc_lut)(void);
};
struct msm_hdmi_platform_data {
@ -505,7 +533,6 @@ struct msm_mhl_platform_data {
uint32_t gpio_mhl_power;
/* GPIO no. for hdmi-mhl mux */
uint32_t gpio_hdmi_mhl_mux;
bool mhl_enabled;
};
struct msm_i2c_platform_data {

58
arch/arm/mach-msm/include/mach/camera.h Executable file → Normal file
View file

@ -24,10 +24,9 @@
#include <mach/board.h>
#include <media/msm_camera.h>
#include <linux/msm_ion.h>
#include <linux/ion.h>
#include <mach/iommu_domains.h>
#define CONFIG_MSM_CAMERA_DEBUG
#ifdef CONFIG_MSM_CAMERA_DEBUG
#define CDBG(fmt, args...) pr_debug(fmt, ##args)
#else
@ -95,7 +94,6 @@ enum vfe_resp_msg {
VFE_MSG_OUTPUT_SECONDARY,
VFE_MSG_OUTPUT_TERTIARY1,
VFE_MSG_OUTPUT_TERTIARY2,
VFE_MSG_OUTPUT_TERTIARY3,
};
enum vpe_resp_msg {
@ -128,6 +126,30 @@ struct msm_vpe_phy_info {
uint32_t frame_id;
};
struct msm_camera_csid_lut_params {
uint8_t num_cid;
struct msm_camera_csid_vc_cfg *vc_cfg;
};
struct msm_camera_csid_params {
uint8_t lane_cnt;
uint16_t lane_assign;
uint8_t phy_sel;
struct msm_camera_csid_lut_params lut_params;
};
struct msm_camera_csiphy_params {
uint8_t lane_cnt;
uint8_t settle_cnt;
uint16_t lane_mask;
uint8_t combo_mode;
};
struct msm_camera_csi2_params {
struct msm_camera_csid_params csid_params;
struct msm_camera_csiphy_params csiphy_params;
};
#ifndef CONFIG_MSM_CAMERA_V4L2
#define VFE31_OUTPUT_MODE_PT (0x1 << 0)
#define VFE31_OUTPUT_MODE_S (0x1 << 1)
@ -309,6 +331,21 @@ struct msm_camera_cci_gpio_cfg {
uint16_t i2c_queue;
};
enum msm_camera_i2c_reg_addr_type {
MSM_CAMERA_I2C_BYTE_ADDR = 1,
MSM_CAMERA_I2C_WORD_ADDR,
};
enum msm_camera_i2c_data_type {
MSM_CAMERA_I2C_BYTE_DATA = 1,
MSM_CAMERA_I2C_WORD_DATA,
MSM_CAMERA_I2C_SET_BYTE_MASK,
MSM_CAMERA_I2C_UNSET_BYTE_MASK,
MSM_CAMERA_I2C_SET_WORD_MASK,
MSM_CAMERA_I2C_UNSET_WORD_MASK,
MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
};
enum msm_camera_i2c_cmd_type {
MSM_CAMERA_I2C_CMD_WRITE,
MSM_CAMERA_I2C_CMD_POLL,
@ -368,7 +405,6 @@ struct msm_queue_cmd {
atomic_t on_heap;
struct timespec ts;
uint32_t error_code;
uint32_t trans_code;
};
struct msm_device_queue {
@ -633,10 +669,14 @@ enum msm_bus_perf_setting {
S_STEREO_CAPTURE,
S_DEFAULT,
S_LIVESHOT,
S_DUAL,
S_EXIT
};
struct msm_cam_clk_info {
const char *clk_name;
long clk_rate;
};
int msm_camio_enable(struct platform_device *dev);
int msm_camio_vpe_clk_enable(uint32_t);
int msm_camio_vpe_clk_disable(void);
@ -692,16 +732,12 @@ int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
int msm_cam_core_reset(void);
int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int config);
int num_vreg, struct regulator **reg_ptr, int config);
int msm_camera_enable_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int enable);
int num_vreg, struct regulator **reg_ptr, int enable);
int msm_camera_config_gpio_table
(struct msm_camera_sensor_info *sinfo, int gpio_en);
int msm_camera_request_gpio_table
(struct msm_camera_sensor_info *sinfo, int gpio_en);
void msm_camera_bus_scale_cfg(uint32_t bus_perf_client,
enum msm_bus_perf_setting perf_setting);
#endif

63
drivers/media/video/msm/Kconfig Executable file → Normal file
View file

@ -123,6 +123,53 @@ config MT9P012_KM
---help---
MICRON 5M Bayer Sensor KM modules with Autofocus
config IMX111
bool "Sensor IMX111 (Sony 8MP)"
depends on MSM_CAMERA
select SEKONIX_LENS_ACT
default n
---help---
Sony 8M Bayer Sensor modules with Autofocus
config IMX111_ACT
bool "Actuator imx111 (BAYER 8M)"
depends on MSM_CAMERA
select MSM_ACTUATOR
default n
---help---
Actuator for SONY 8 MP Bayer Sensor
config SEKONIX_LENS_ACT
bool "Actuator SEKONIX LENS"
depends on MSM_CAMERA
select MSM_ACTUATOR
default n
---help---
Actuator for Sekonix Lens
config IMX091
bool "Sensor IMX091 (Sony 13MP)"
depends on MSM_CAMERA
select IMX091_ACT
default n
---help---
Sony 13M Bayer Sensor modules with Autofocus
config IMX091_ACT
bool "Actuator imx091 (BAYER 13M)"
depends on MSM_CAMERA
select MSM_ACTUATOR
default n
---help---
Actuator for SONY 13MP Bayer Sensor
config IMX119
bool "Sensor IMX119 1.3MP MIPI (Bayer 1.3M)"
depends on MSM_CAMERA
default n
---help---
SONY 1.3M BAYER MIPI Sensor without Autofocus
config MT9E013
bool "Sensor mt9e013 module (BAYER 8M)"
depends on MSM_CAMERA && (ARCH_MSM7X30 || ARCH_MSM8X60 || ARCH_MSM7X27A)
@ -130,6 +177,13 @@ config MT9E013
---help---
Aptina 8M Bayer Sensor modules with Autofocus
config MSM_CAMERA_FLASH_LM3559
bool "Qualcomm MSM camera lm3559 flash support"
depends on MSM_CAMERA
default n
---help---
Enable support for LED flash for msm camera.
config IMX074_ACT
bool "Actuator IMX074 (BAYER 13.5M)"
depends on MSM_CAMERA
@ -254,15 +308,6 @@ config MSM_MERCURY
---help---
Enable support for Mercury Jpeg Engine
config MSM_JPEG
tristate "Qualcomm MSM Jpeg Encoder Engine support"
depends on MSM_CAMERA && ARCH_MSM8974
---help---
Enable support for Jpeg Encoder/Decoder
Engine for 8974.
This module serves as the common driver
for the JPEG 1.0 encoder and decoder.
config MSM_VPE
tristate "Qualcomm MSM Video Pre-processing Engine support"
depends on MSM_CAMERA && (ARCH_MSM7X30 || ARCH_MSM8X60)

3
drivers/media/video/msm/Makefile Executable file → Normal file
View file

@ -20,8 +20,9 @@ else
obj-$(CONFIG_MSM_CAMERA) += msm_camera.o
endif
obj-$(CONFIG_MSM_CAMERA) += vfe/
obj-$(CONFIG_MSM_CAMERA) += msm_axi_qos.o gemini/ mercury/ jpeg_10/
obj-$(CONFIG_MSM_CAMERA) += msm_axi_qos.o gemini/ mercury/
obj-$(CONFIG_MSM_CAMERA_FLASH) += flash.o
obj-$(CONFIG_MSM_CAMERA_FLASH_LM3559) += flash_lm3559.o
ifeq ($(CONFIG_MSM_CAMERA_V4L2),y)
obj-$(CONFIG_ARCH_MSM8X60) += msm_vpe.o
obj-$(CONFIG_ARCH_MSM7X30) += msm_vpe.o msm_axi_qos.o

0
drivers/media/video/msm/actuators/Makefile Executable file → Normal file
View file

309
drivers/media/video/msm/actuators/msm_actuator.c Executable file → Normal file
View file

@ -13,6 +13,22 @@
#include <linux/module.h>
#include "msm_actuator.h"
#ifdef CONFIG_SEKONIX_LENS_ACT
#define CHECK_ACT_WRITE_COUNT
#define ACT_STOP_POS 10
#define ACT_MIN_MOVE_RANGE 200
#define ACT_POSTURE_MARGIN 100
extern uint8_t imx111_afcalib_data[4];
#else
/* modification qct's af calibration routines */
#define ACTUATOR_EEPROM_SADDR (0x50 >> 1)
#define ACTUATOR_START_ADDR 0x06
#define ACTUATOR_MACRO_ADDR 0x08
#define ACTUATOR_MARGIN 30
#define ACTUATOR_MIN_MOVE_RANGE 200 // TBD
#endif
static struct msm_actuator_ctrl_t msm_actuator_t;
static struct msm_actuator msm_vcm_actuator_table;
static struct msm_actuator msm_piezo_actuator_table;
@ -155,6 +171,25 @@ static int32_t msm_actuator_write_focus(
damping_code_step = damping_params->damping_step;
wait_time = damping_params->damping_delay;
#ifdef CONFIG_SEKONIX_LENS_ACT
CDBG("damping_code_step = %d\n",damping_code_step);
CDBG("wait_time = %d\n",wait_time);
CDBG("curr_lens_pos = %d\n",curr_lens_pos);
CDBG("sign_direction = %d\n",sign_direction);
CDBG("code_boundary = %d\n",code_boundary);
CDBG("damping_params->hw_params = %d\n",damping_params->hw_params);
if (damping_code_step ==0) {
CDBG("[ERROR][%s] damping_code_step = %d ---> 255\n",
__func__,damping_code_step);
damping_code_step = 255;
}
if (wait_time ==0) {
CDBG("[ERROR][%s] wait_time = %d ---> 4500\n",
__func__,damping_code_step);
wait_time = 4500;
}
#endif
/* Write code based on damping_code_step in a loop */
for (next_lens_pos =
curr_lens_pos + (sign_direction * damping_code_step);
@ -225,12 +260,15 @@ static int32_t msm_actuator_move_focus(
int16_t dest_step_pos = move_params->dest_step_pos;
uint16_t curr_lens_pos = 0;
int dir = move_params->dir;
#ifdef CONFIG_MSM_CAMERA_DEBUG
int32_t num_steps = move_params->num_steps;
CDBG("%s called, dir %d, num_steps %d\n",
__func__,
dir,
num_steps);
#endif
#ifdef CHECK_ACT_WRITE_COUNT
int count_actuator_write = 0;
CDBG("%s: a_ctrl->curr_region_index = %d\n",
__func__,a_ctrl->curr_region_index);
#endif
CDBG("%s called, dir %d, num_steps %d\n",__func__,dir,num_steps);
if (dest_step_pos == a_ctrl->curr_step_pos)
return rc;
@ -250,6 +288,8 @@ static int32_t msm_actuator_move_focus(
target_step_pos = dest_step_pos;
target_lens_pos =
a_ctrl->step_position_table[target_step_pos];
if (curr_lens_pos == target_lens_pos)
return rc;
rc = a_ctrl->func_tbl->
actuator_write_focus(
a_ctrl,
@ -266,10 +306,17 @@ static int32_t msm_actuator_move_focus(
}
curr_lens_pos = target_lens_pos;
#ifdef CHECK_ACT_WRITE_COUNT
count_actuator_write ++;
CDBG("%s count_actuator_write = %d\n",__func__,count_actuator_write);
#endif
} else {
target_step_pos = step_boundary;
target_lens_pos =
a_ctrl->step_position_table[target_step_pos];
if (curr_lens_pos == target_lens_pos)
return rc;
rc = a_ctrl->func_tbl->
actuator_write_focus(
a_ctrl,
@ -287,6 +334,18 @@ static int32_t msm_actuator_move_focus(
curr_lens_pos = target_lens_pos;
a_ctrl->curr_region_index += sign_dir;
#ifdef CHECK_ACT_WRITE_COUNT
if (a_ctrl->curr_region_index >= 2) {
CDBG("[ERROR][%s] a_ctrl->curr_region_index = %d ---> 1\n",__func__,a_ctrl->curr_region_index);
a_ctrl->curr_region_index = 1;
}
if (a_ctrl->curr_region_index < 0) {
CDBG("[ERROR][%s] a_ctrl->curr_region_index = %d ---> 0\n",__func__,a_ctrl->curr_region_index);
a_ctrl->curr_region_index = 0;
}
count_actuator_write ++;
CDBG("%s count_actuator_write = %d\n",__func__,count_actuator_write);
#endif
}
a_ctrl->curr_step_pos = target_step_pos;
}
@ -304,7 +363,7 @@ static int32_t msm_actuator_move_focus(
return rc;
}
static int32_t msm_actuator_init_step_table(struct msm_actuator_ctrl_t *a_ctrl,
static int32_t msm_actuator_init_default_step_table(struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_set_info_t *set_info)
{
int16_t code_per_step = 0;
@ -319,8 +378,10 @@ static int32_t msm_actuator_init_step_table(struct msm_actuator_ctrl_t *a_ctrl,
for (; data_size > 0; data_size--)
max_code_size *= 2;
kfree(a_ctrl->step_position_table);
a_ctrl->step_position_table = NULL;
if(a_ctrl->step_position_table){
kfree(a_ctrl->step_position_table);
a_ctrl->step_position_table = NULL;
}
/* Fill step position table */
a_ctrl->step_position_table =
@ -363,6 +424,202 @@ static int32_t msm_actuator_init_step_table(struct msm_actuator_ctrl_t *a_ctrl,
return rc;
}
#ifdef CONFIG_SEKONIX_LENS_ACT
int32_t msm_actuator_init_step_table_use_eeprom(struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_set_info_t *set_info)
{
int32_t rc = 0;
int16_t cur_code = 0;
int16_t step_index = 0;
uint32_t max_code_size = 1;
uint16_t data_size = set_info->actuator_params.data_size;
uint16_t act_start = 0, act_macro = 0, move_range = 0;
for (; data_size > 0; data_size--)
max_code_size *= 2;
if(a_ctrl->step_position_table){
kfree(a_ctrl->step_position_table);
a_ctrl->step_position_table = NULL;
}
CDBG("%s called\n", __func__);
// set act_start, act_macro
act_start = (uint16_t)(imx111_afcalib_data[1] << 8) |
imx111_afcalib_data[0];
act_macro = ((uint16_t)(imx111_afcalib_data[3] << 8) |
imx111_afcalib_data[2])+20;
/* Fill step position table */
a_ctrl->step_position_table =
kmalloc(sizeof(uint16_t) *
(set_info->af_tuning_params.total_steps + 1), GFP_KERNEL);
if (a_ctrl->step_position_table == NULL)
return -EFAULT;
cur_code = set_info->af_tuning_params.initial_code;
a_ctrl->step_position_table[step_index++] = cur_code;
// start code - by calibration data
if ( act_start > ACT_POSTURE_MARGIN )
a_ctrl->step_position_table[1] = act_start - ACT_POSTURE_MARGIN;
else
a_ctrl->step_position_table[1] = act_start ;
move_range = act_macro - a_ctrl->step_position_table[1];
if (move_range < ACT_MIN_MOVE_RANGE)
goto act_cal_fail;
for (step_index = 2;step_index < set_info->af_tuning_params.total_steps;step_index++) {
a_ctrl->step_position_table[step_index]
= ((step_index - 1) * move_range + ((set_info->af_tuning_params.total_steps - 1) >> 1))
/ (set_info->af_tuning_params.total_steps - 1) + a_ctrl->step_position_table[1];
}
for (step_index = 0; step_index < a_ctrl->total_steps; step_index++)
CDBG("step_position_table[%d]= %d\n",step_index,
a_ctrl->step_position_table[step_index]);
return rc;
act_cal_fail:
pr_err("%s: calibration to default value not using eeprom data\n", __func__);
rc = msm_actuator_init_default_step_table(a_ctrl, set_info);
return rc;
}
#else
/* add AF calibration parameters */
int32_t msm_actuator_i2c_read_b_eeprom(struct msm_camera_i2c_client *dev_client,
unsigned char saddr, unsigned char *rxdata)
{
int32_t rc = 0;
struct i2c_msg msgs[] = {
{
.addr = saddr << 1,
.flags = 0,
.len = 1,
.buf = rxdata,
},
{
.addr = saddr << 1,
.flags = I2C_M_RD,
.len = 1,
.buf = rxdata,
},
};
rc = i2c_transfer(dev_client->client->adapter, msgs, 2);
if (rc < 0)
CDBG("msm_actuator_i2c_read_b_eeprom failed 0x%x\n", saddr);
return rc;
}
static int32_t msm_actuator_init_step_table(struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_set_info_t *set_info)
{
int32_t rc = 0;
int16_t cur_code = 0;
int16_t step_index = 0;
uint32_t max_code_size = 1;
uint16_t data_size = set_info->actuator_params.data_size;
uint16_t act_start = 0, act_macro = 0, move_range = 0;
unsigned char buf;
CDBG("%s called\n", __func__);
// read from eeprom
buf = ACTUATOR_START_ADDR;
rc = msm_actuator_i2c_read_b_eeprom(&a_ctrl->i2c_client,
ACTUATOR_EEPROM_SADDR, &buf);
if (rc < 0)
goto act_cal_fail;
act_start = (buf << 8) & 0xFF00;
buf = ACTUATOR_START_ADDR + 1;
rc = msm_actuator_i2c_read_b_eeprom(&a_ctrl->i2c_client,
ACTUATOR_EEPROM_SADDR, &buf);
if (rc < 0)
goto act_cal_fail;
act_start |= buf & 0xFF;
CDBG("%s: act_start = 0x%4x\n", __func__, act_start);
buf = ACTUATOR_MACRO_ADDR;
rc = msm_actuator_i2c_read_b_eeprom(&a_ctrl->i2c_client,
ACTUATOR_EEPROM_SADDR, &buf);
if (rc < 0)
goto act_cal_fail;
act_macro = (buf << 8) & 0xFF00;
buf = ACTUATOR_MACRO_ADDR + 1;
rc = msm_actuator_i2c_read_b_eeprom(&a_ctrl->i2c_client,
ACTUATOR_EEPROM_SADDR, &buf);
if (rc < 0)
goto act_cal_fail;
act_macro |= buf & 0xFF;
CDBG("%s: act_macro = 0x%4x\n", __func__, act_macro);
for (; data_size > 0; data_size--)
max_code_size *= 2;
if(a_ctrl->step_position_table){
kfree(a_ctrl->step_position_table);
a_ctrl->step_position_table = NULL;
}
/* Fill step position table */
a_ctrl->step_position_table =
kmalloc(sizeof(uint16_t) *
(set_info->af_tuning_params.total_steps + 1), GFP_KERNEL);
if (a_ctrl->step_position_table == NULL)
return -EFAULT;
//intial code
cur_code = set_info->af_tuning_params.initial_code;
a_ctrl->step_position_table[0] = a_ctrl->initial_code;
// start code - by calibration data
if (act_start > ACTUATOR_MARGIN)
a_ctrl->step_position_table[1] = act_start - ACTUATOR_MARGIN;
else
a_ctrl->step_position_table[1] = act_start;
move_range = act_macro - a_ctrl->step_position_table[1];
CDBG("%s: move_range = %d\n", __func__, move_range);
if (move_range < ACTUATOR_MIN_MOVE_RANGE)
goto act_cal_fail;
for (step_index = 2;step_index < set_info->af_tuning_params.total_steps;step_index++) {
a_ctrl->step_position_table[step_index]
= ((step_index - 1) * move_range + ((set_info->af_tuning_params.total_steps - 1) >> 1))
/ (set_info->af_tuning_params.total_steps - 1) + a_ctrl->step_position_table[1];
}
a_ctrl->curr_step_pos = 0;
a_ctrl->curr_region_index = 0;
return rc;
act_cal_fail:
pr_err("%s: act_cal_fail, call default_step_table\n", __func__);
rc = msm_actuator_init_default_step_table(a_ctrl, set_info);
return rc;
}
#endif
static int32_t msm_actuator_set_default_focus(
struct msm_actuator_ctrl_t *a_ctrl,
struct msm_actuator_move_params_t *move_params)
@ -370,14 +627,28 @@ static int32_t msm_actuator_set_default_focus(
int32_t rc = 0;
CDBG("%s called\n", __func__);
if (a_ctrl->curr_step_pos != 0)
if (a_ctrl->curr_step_pos != 0) {
rc = a_ctrl->func_tbl->actuator_move_focus(a_ctrl, move_params);
}
return rc;
}
static int32_t msm_actuator_power_down(struct msm_actuator_ctrl_t *a_ctrl)
{
int32_t rc = 0;
#ifdef CONFIG_SEKONIX_LENS_ACT
int cur_pos = a_ctrl->curr_step_pos;
struct msm_actuator_move_params_t *move_params = NULL;
if(cur_pos > ACT_STOP_POS) {
move_params.sign_dir = MOVE_FAR;
move_params.dest_step_pos = ACT_STOP_POS;
rc = a_ctrl->func_tbl->actuator_move_focus(
a_ctrl, &move_params);
msleep(300);
}
#endif
if (a_ctrl->vcm_enable) {
rc = gpio_direction_output(a_ctrl->vcm_pwd, 0);
if (!rc)
@ -448,6 +719,7 @@ static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
a_ctrl->reg_tbl_size *
sizeof(struct msm_actuator_reg_params_t))) {
kfree(a_ctrl->i2c_reg_tbl);
a_ctrl->i2c_reg_tbl = NULL;
return -EFAULT;
}
@ -458,6 +730,7 @@ static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
GFP_KERNEL);
if (init_settings == NULL) {
kfree(a_ctrl->i2c_reg_tbl);
a_ctrl->i2c_reg_tbl = NULL;
pr_err("%s Error allocating memory for init_settings\n",
__func__);
return -EFAULT;
@ -468,6 +741,7 @@ static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
sizeof(struct reg_settings_t))) {
kfree(init_settings);
kfree(a_ctrl->i2c_reg_tbl);
a_ctrl->i2c_reg_tbl = NULL;
pr_err("%s Error copying init_settings\n",
__func__);
return -EFAULT;
@ -479,6 +753,7 @@ static int32_t msm_actuator_init(struct msm_actuator_ctrl_t *a_ctrl,
kfree(init_settings);
if (rc < 0) {
kfree(a_ctrl->i2c_reg_tbl);
a_ctrl->i2c_reg_tbl = NULL;
pr_err("%s Error actuator_init_focus\n",
__func__);
return -EFAULT;
@ -665,12 +940,16 @@ static struct msm_actuator_ctrl_t msm_actuator_t = {
static struct msm_actuator msm_vcm_actuator_table = {
.act_type = ACTUATOR_VCM,
.func_tbl = {
.actuator_init_step_table = msm_actuator_init_step_table,
.actuator_move_focus = msm_actuator_move_focus,
.actuator_write_focus = msm_actuator_write_focus,
.actuator_set_default_focus = msm_actuator_set_default_focus,
.actuator_init_focus = msm_actuator_init_focus,
.actuator_parse_i2c_params = msm_actuator_parse_i2c_params,
#ifdef CONFIG_SEKONIX_LENS_ACT
.actuator_init_step_table = msm_actuator_init_step_table_use_eeprom,
#else
.actuator_init_step_table = msm_actuator_init_step_table,
#endif
.actuator_move_focus = msm_actuator_move_focus,
.actuator_write_focus = msm_actuator_write_focus,
.actuator_set_default_focus = msm_actuator_set_default_focus,
.actuator_init_focus = msm_actuator_init_focus,
.actuator_parse_i2c_params = msm_actuator_parse_i2c_params,
},
};

7
drivers/media/video/msm/actuators/msm_actuator.h Executable file → Normal file
View file

@ -91,7 +91,14 @@ struct msm_actuator_ctrl_t {
uint16_t i2c_tbl_index;
};
#ifdef CONFIG_MSM_ACTUATOR
struct msm_actuator_ctrl_t *get_actrl(struct v4l2_subdev *sd);
#else
static inline struct msm_actuator_ctrl_t *get_actrl(struct v4l2_subdev *sd)
{
return NULL;
}
#endif
#define VIDIOC_MSM_ACTUATOR_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 11, void __user *)

0
drivers/media/video/msm/cci/Makefile Executable file → Normal file
View file

1
drivers/media/video/msm/cci/msm_cam_cci_hwreg.h Executable file → Normal file
View file

@ -26,7 +26,6 @@
#define CCI_I2C_M0_SDA_CTL_2_ADDR 0x0000010c
#define CCI_I2C_M0_READ_DATA_ADDR 0x00000118
#define CCI_I2C_M0_MISC_CTL_ADDR 0x00000110
#define CCI_I2C_M0_READ_BUF_LEVEL_ADDR 0x0000011C
#define CCI_HALT_REQ_ADDR 0x00000034
#define CCI_M0_HALT_REQ_RMSK 0x1
#define CCI_M1_HALT_REQ_RMSK 0x01

69
drivers/media/video/msm/cci/msm_cci.c Executable file → Normal file
View file

@ -24,10 +24,11 @@
#include "msm_cam_cci_hwreg.h"
#define V4L2_IDENT_CCI 50005
#define CCI_I2C_QUEUE_0_SIZE 64
#define CCI_I2C_QUEUE_0_SIZE 2
#define CCI_I2C_QUEUE_1_SIZE 16
#define CCI_TIMEOUT msecs_to_jiffies(100)
#undef CDBG
#define CDBG pr_debug
static void msm_cci_set_clk_param(struct cci_device *cci_dev)
{
@ -126,9 +127,8 @@ static int32_t msm_cci_validate_queue(struct cci_device *cci_dev,
msm_camera_io_w(reg_val, cci_dev->base + CCI_QUEUE_START_ADDR);
CDBG("%s line %d wait_for_completion_interruptible\n",
__func__, __LINE__);
wait_for_completion_interruptible_timeout(&cci_dev->
cci_master_info[master].reset_complete, CCI_TIMEOUT);
wait_for_completion_interruptible(&cci_dev->
cci_master_info[master].reset_complete);
rc = cci_dev->cci_master_info[master].status;
if (rc < 0)
pr_err("%s failed rc %d\n", __func__, rc);
@ -221,7 +221,7 @@ static int32_t msm_cci_i2c_read(struct v4l2_subdev *sd,
{
uint32_t rc = 0;
uint32_t val = 0;
int32_t read_words = 0, exp_words = 0;
int32_t read_bytes = 0;
int32_t index = 0, first_byte = 0;
uint32_t i = 0;
enum cci_i2c_master_t master;
@ -234,9 +234,6 @@ static int32_t msm_cci_i2c_read(struct v4l2_subdev *sd,
read_cfg = &c_ctrl->cfg.cci_i2c_read_cfg;
mutex_lock(&cci_dev->cci_master_info[master].mutex);
CDBG("%s master %d, queue %d\n", __func__, master, queue);
CDBG("%s set param sid 0x%x retries %d id_map %d\n", __func__,
c_ctrl->cci_info->sid, c_ctrl->cci_info->retries,
c_ctrl->cci_info->id_map);
val = CCI_I2C_SET_PARAM_CMD | c_ctrl->cci_info->sid << 4 |
c_ctrl->cci_info->retries << 16 |
c_ctrl->cci_info->id_map << 18;
@ -288,18 +285,11 @@ static int32_t msm_cci_i2c_read(struct v4l2_subdev *sd,
val = 1 << ((master * 2) + queue);
msm_camera_io_w(val, cci_dev->base + CCI_QUEUE_START_ADDR);
wait_for_completion_interruptible_timeout(&cci_dev->
cci_master_info[master].reset_complete, CCI_TIMEOUT);
read_words = msm_camera_io_r(cci_dev->base +
CCI_I2C_M0_READ_BUF_LEVEL_ADDR + master * 0x100);
exp_words = ((read_cfg->num_byte / 4) + 1);
if (read_words != exp_words) {
pr_err("%s:%d read_words = %d, exp words = %d\n", __func__,
__LINE__, read_words, exp_words);
memset(read_cfg->data, 0, read_cfg->num_byte);
goto ERROR;
}
wait_for_completion_interruptible(&cci_dev->
cci_master_info[master].reset_complete);
read_bytes = (read_cfg->num_byte / 4) + 1;
index = 0;
CDBG("%s index %d num_type %d\n", __func__, index,
read_cfg->num_byte);
@ -321,7 +311,7 @@ static int32_t msm_cci_i2c_read(struct v4l2_subdev *sd,
index++;
}
}
} while (--read_words > 0);
} while (--read_bytes > 0);
ERROR:
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
return rc;
@ -338,9 +328,6 @@ static int32_t msm_cci_i2c_write(struct v4l2_subdev *sd,
cci_dev = v4l2_get_subdevdata(sd);
master = c_ctrl->cci_info->cci_i2c_master;
CDBG("%s master %d, queue %d\n", __func__, master, queue);
CDBG("%s set param sid 0x%x retries %d id_map %d\n", __func__,
c_ctrl->cci_info->sid, c_ctrl->cci_info->retries,
c_ctrl->cci_info->id_map);
mutex_lock(&cci_dev->cci_master_info[master].mutex);
val = CCI_I2C_SET_PARAM_CMD | c_ctrl->cci_info->sid << 4 |
c_ctrl->cci_info->retries << 16 |
@ -379,7 +366,7 @@ static int32_t msm_cci_i2c_write(struct v4l2_subdev *sd,
val = msm_camera_io_r(cci_dev->base + CCI_I2C_M0_Q0_CUR_WORD_CNT_ADDR +
master * 0x200 + queue * 0x100);
CDBG("%s:%d cur word count %d\n", __func__, __LINE__, val);
CDBG("%s line %d size of queue %d\n", __func__, __LINE__, val);
CDBG("%s:%d CCI_I2C_M0_Q0_EXEC_WORD_CNT_ADDR\n", __func__, __LINE__);
msm_camera_io_w(val, cci_dev->base + CCI_I2C_M0_Q0_EXEC_WORD_CNT_ADDR +
master * 0x200 + queue * 0x100);
@ -391,9 +378,8 @@ static int32_t msm_cci_i2c_write(struct v4l2_subdev *sd,
CDBG("%s line %d wait_for_completion_interruptible\n",
__func__, __LINE__);
wait_for_completion_interruptible_timeout(&cci_dev->
cci_master_info[master].reset_complete, CCI_TIMEOUT);
wait_for_completion_interruptible(&cci_dev->
cci_master_info[master].reset_complete);
ERROR:
mutex_unlock(&cci_dev->cci_master_info[master].mutex);
return rc;
@ -409,10 +395,7 @@ static int msm_cci_subdev_g_chip_ident(struct v4l2_subdev *sd,
}
static struct msm_cam_clk_info cci_clk_info[] = {
{"camss_top_ahb_clk", -1},
{"cci_src_clk", 19200000},
{"cci_ahb_clk", -1},
{"cci_clk", -1},
{"cci_clk_src", 19200000},
};
static int32_t msm_cci_init(struct v4l2_subdev *sd)
@ -428,7 +411,7 @@ static int32_t msm_cci_init(struct v4l2_subdev *sd)
rc = msm_cam_clk_enable(&cci_dev->pdev->dev, cci_clk_info,
cci_dev->cci_clk, ARRAY_SIZE(cci_clk_info), 1);
if (rc < 0) {
CDBG("%s: clk enable failed\n", __func__);
CDBG("%s: regulator enable failed\n", __func__);
goto clk_enable_failed;
}
@ -438,9 +421,8 @@ static int32_t msm_cci_init(struct v4l2_subdev *sd)
cci_dev->cci_master_info[MASTER_0].reset_pending = TRUE;
msm_camera_io_w(0xFFFFFFFF, cci_dev->base + CCI_RESET_CMD_ADDR);
msm_camera_io_w(0x1, cci_dev->base + CCI_RESET_CMD_ADDR);
wait_for_completion_interruptible_timeout(
&cci_dev->cci_master_info[MASTER_0].reset_complete,
CCI_TIMEOUT);
wait_for_completion_interruptible(&cci_dev->cci_master_info[MASTER_0].
reset_complete);
msm_cci_set_clk_param(cci_dev);
msm_camera_io_w(0xFFFFFFFF, cci_dev->base + CCI_IRQ_MASK_0_ADDR);
msm_camera_io_w(0xFFFFFFFF, cci_dev->base + CCI_IRQ_CLEAR_0_ADDR);
@ -553,12 +535,6 @@ static irqreturn_t msm_cci_irq(int irq_num, void *data)
cci_dev->cci_master_info[MASTER_1].reset_pending = TRUE;
msm_camera_io_w(CCI_M1_RESET_RMSK,
cci_dev->base + CCI_RESET_CMD_ADDR);
} else {
pr_err("%s unhandled irq 0x%x\n", __func__, irq);
cci_dev->cci_master_info[MASTER_0].status = 0;
complete(&cci_dev->cci_master_info[MASTER_0].reset_complete);
cci_dev->cci_master_info[MASTER_1].status = 0;
complete(&cci_dev->cci_master_info[MASTER_1].reset_complete);
}
return IRQ_HANDLED;
}
@ -710,11 +686,14 @@ static int __devinit msm_cci_probe(struct platform_device *pdev)
goto cci_release_mem;
}
CDBG("%s line %d cci irq start %d end %d\n", __func__,
__LINE__,
new_cci_dev->irq->start,
new_cci_dev->irq->end);
new_cci_dev->pdev = pdev;
msm_cci_initialize_cci_params(new_cci_dev);
rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
if (rc)
pr_err("%s: failed to add child nodes, rc=%d\n", __func__, rc);
CDBG("%s line %d\n", __func__, __LINE__);
return 0;

0
drivers/media/video/msm/cci/msm_cci.h Executable file → Normal file
View file

0
drivers/media/video/msm/cpp/Makefile Executable file → Normal file
View file

0
drivers/media/video/msm/cpp/msm_cpp.c Executable file → Normal file
View file

0
drivers/media/video/msm/cpp/msm_cpp.h Executable file → Normal file
View file

2
drivers/media/video/msm/csi/Makefile Executable file → Normal file
View file

@ -1,5 +1,5 @@
GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
ccflags-y += -Idrivers/media/video/msm -Idrivers/media/video/msm/server
ccflags-y += -Idrivers/media/video/msm
ifeq ($(CONFIG_MSM_CSI20_HEADER),y)
ccflags-y += -Idrivers/media/video/msm/csi/include/csi2.0
else ifeq ($(CONFIG_MSM_CSI30_HEADER),y)

3
drivers/media/video/msm/csi/include/csi2.0/msm_csid_hwreg.h Executable file → Normal file
View file

@ -46,7 +46,6 @@
#define CSID_RST_DONE_IRQ_BITSHIFT 11
#define CSID_RST_STB_ALL 0x7FFF
#define CSID_DL_INPUT_SEL_SHIFT 0x2
#define CSID_PHY_SEL_SHIFT 17
#define CSID_VERSION 0x02000011
#define CSID_PHY_SEL_SHIFT 0x17
#endif

2
drivers/media/video/msm/csi/include/csi2.0/msm_csiphy_hwreg.h Executable file → Normal file
View file

@ -28,7 +28,6 @@
#define MIPI_CSIPHY_LNCK_MISC1_ADDR 0x128
#define MIPI_CSIPHY_GLBL_RESET_ADDR 0x140
#define MIPI_CSIPHY_GLBL_PWR_CFG_ADDR 0x144
#define MIPI_CSIPHY_GLBL_IRQ_CMD_ADDR 0x164
#define MIPI_CSIPHY_INTERRUPT_STATUS0_ADDR 0x180
#define MIPI_CSIPHY_INTERRUPT_MASK0_ADDR 0x1A0
#define MIPI_CSIPHY_INTERRUPT_MASK_VAL 0x6F
@ -38,6 +37,5 @@
#define MIPI_CSIPHY_MODE_CONFIG_SHIFT 0x4
#define MIPI_CSIPHY_GLBL_T_INIT_CFG0_ADDR 0x1E0
#define MIPI_CSIPHY_T_WAKEUP_CFG0_ADDR 0x1E8
#define CSIPHY_VERSION 0x0
#endif

19
drivers/media/video/msm/csi/include/csi2.0/msm_ispif_hwreg.h Executable file → Normal file
View file

@ -64,25 +64,16 @@
#define MISC_LOGIC_RST_STB 1
#define STROBED_RST_EN 0
#define ISPIF_RST_CMD_MASK 0xFE0F1FFF
#define ISPIF_RST_CMD_1_MASK 0xFC0F1FF9
#define PIX_INTF_0_OVERFLOW_IRQ 12
#define RAW_INTF_0_OVERFLOW_IRQ 25
#define RAW_INTF_1_OVERFLOW_IRQ 25
#define RAW_INTF_2_OVERFLOW_IRQ 12
#define RESET_DONE_IRQ 27
#define ISPIF_IRQ_STATUS_MASK 0x0A493249
#define ISPIF_IRQ_STATUS_1_MASK 0x02493249
#define ISPIF_IRQ_STATUS_2_MASK 0x00001249
#define ISPIF_IRQ_STATUS_PIX_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_RDI0_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_RDI1_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_RDI2_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_SOF_MASK 0x492249
#define ISPIF_IRQ_STATUS_MASK 0xA493249
#define ISPIF_IRQ_1_STATUS_MASK 0xA493249
#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_PIX_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_SOF_MASK 0x492249
#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
#endif

3
drivers/media/video/msm/csi/include/csi3.0/msm_csid_hwreg.h Executable file → Normal file
View file

@ -46,7 +46,6 @@
#define CSID_RST_DONE_IRQ_BITSHIFT 11
#define CSID_RST_STB_ALL 0x7FFF
#define CSID_DL_INPUT_SEL_SHIFT 0x4
#define CSID_PHY_SEL_SHIFT 17
#define CSID_VERSION 0x30000000
#define CSID_PHY_SEL_SHIFT 0x17
#endif

6
drivers/media/video/msm/csi/include/csi3.0/msm_csiphy_hwreg.h Executable file → Normal file
View file

@ -27,17 +27,15 @@
#define MIPI_CSIPHY_LNCK_MISC1_ADDR 0x128
#define MIPI_CSIPHY_GLBL_RESET_ADDR 0x140
#define MIPI_CSIPHY_GLBL_PWR_CFG_ADDR 0x144
#define MIPI_CSIPHY_GLBL_IRQ_CMD_ADDR 0x164
#define MIPI_CSIPHY_HW_VERSION_ADDR 0x188
#define MIPI_CSIPHY_INTERRUPT_STATUS0_ADDR 0x18C
#define MIPI_CSIPHY_INTERRUPT_MASK0_ADDR 0x1AC
#define MIPI_CSIPHY_INTERRUPT_MASK_VAL 0x3F
#define MIPI_CSIPHY_INTERRUPT_MASK_ADDR 0x1AC
#define MIPI_CSIPHY_INTERRUPT_MASK_ADDR 0x1B0
#define MIPI_CSIPHY_INTERRUPT_CLEAR0_ADDR 0x1CC
#define MIPI_CSIPHY_INTERRUPT_CLEAR_ADDR 0x1CC
#define MIPI_CSIPHY_INTERRUPT_CLEAR_ADDR 0x1D0
#define MIPI_CSIPHY_MODE_CONFIG_SHIFT 0x4
#define MIPI_CSIPHY_GLBL_T_INIT_CFG0_ADDR 0x1EC
#define MIPI_CSIPHY_T_WAKEUP_CFG0_ADDR 0x1F4
#define CSIPHY_VERSION 0x10
#endif

20
drivers/media/video/msm/csi/include/csi3.0/msm_ispif_hwreg.h Executable file → Normal file
View file

@ -78,25 +78,17 @@
#define MISC_LOGIC_RST_STB 1
#define STROBED_RST_EN 0
#define ISPIF_RST_CMD_MASK 0xFE0F1FFF
#define ISPIF_RST_CMD_1_MASK 0xFC0F1FF9
#define PIX_INTF_0_OVERFLOW_IRQ 12
#define RAW_INTF_0_OVERFLOW_IRQ 25
#define RAW_INTF_1_OVERFLOW_IRQ 25
#define RAW_INTF_2_OVERFLOW_IRQ 12
#define RESET_DONE_IRQ 27
#define ISPIF_IRQ_STATUS_MASK 0x0A493249
#define ISPIF_IRQ_STATUS_1_MASK 0x02493249
#define ISPIF_IRQ_STATUS_2_MASK 0x00001249
#define ISPIF_IRQ_STATUS_PIX_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_RDI0_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_RDI1_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_RDI2_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_SOF_MASK 0x492249
#define ISPIF_IRQ_STATUS_MASK 0xA493249
#define ISPIF_IRQ_1_STATUS_MASK 0xA493249
#define ISPIF_IRQ_STATUS_RDI_SOF_MASK 0x492000
#define ISPIF_IRQ_STATUS_PIX_SOF_MASK 0x249
#define ISPIF_IRQ_STATUS_SOF_MASK 0x492249
#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x1
#endif

0
drivers/media/video/msm/csi/msm_csi2_register.c Executable file → Normal file
View file

0
drivers/media/video/msm/csi/msm_csi_register.h Executable file → Normal file
View file

44
drivers/media/video/msm/csi/msm_csic.c Executable file → Normal file
View file

@ -137,17 +137,18 @@
#define MIPI_PWR_CNTL_EN 0x07
#define MIPI_PWR_CNTL_DIS 0x0
static int msm_csic_config(struct v4l2_subdev *sd,
struct msm_camera_csi_params *csic_params)
static int msm_csic_config(struct csic_cfg_params *cfg_params)
{
int rc = 0;
uint32_t val = 0;
struct csic_device *csic_dev;
struct msm_camera_csi_params *csic_params;
void __iomem *csicbase;
int i;
csic_dev = v4l2_get_subdevdata(sd);
csic_dev = v4l2_get_subdevdata(cfg_params->subdev);
csicbase = csic_dev->base;
csic_params = cfg_params->parms;
/* Enable error correction for DATA lane. Applies to all data lanes */
msm_camera_io_w(0x4, csicbase + MIPI_PHY_CONTROL);
@ -258,7 +259,7 @@ static struct msm_cam_clk_info csic_7x_clk_info[] = {
{"csi_pclk", -1},
};
static int msm_csic_init(struct v4l2_subdev *sd)
static int msm_csic_init(struct v4l2_subdev *sd, uint32_t *csic_version)
{
int rc = 0;
struct csic_device *csic_dev;
@ -354,40 +355,17 @@ static int msm_csic_release(struct v4l2_subdev *sd)
return 0;
}
static long msm_csic_cmd(struct v4l2_subdev *sd, void *arg)
{
long rc = 0;
struct csic_cfg_data cdata;
struct msm_camera_csi_params csic_params;
if (copy_from_user(&cdata,
(void *)arg,
sizeof(struct csic_cfg_data)))
return -EFAULT;
CDBG("%s cfgtype = %d\n", __func__, cdata.cfgtype);
switch (cdata.cfgtype) {
case CSIC_INIT:
rc = msm_csic_init(sd);
break;
case CSIC_CFG:
if (copy_from_user(&csic_params,
(void *)cdata.csic_params,
sizeof(struct msm_camera_csi_params)))
return -EFAULT;
rc = msm_csic_config(sd, &csic_params);
break;
default:
rc = -EINVAL;
break;
}
return rc;
}
static long msm_csic_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
struct csic_cfg_params cfg_params;
switch (cmd) {
case VIDIOC_MSM_CSIC_CFG:
return msm_csic_cmd(sd, arg);
cfg_params.subdev = sd;
cfg_params.parms = arg;
return msm_csic_config((struct csic_cfg_params *)&cfg_params);
case VIDIOC_MSM_CSIC_INIT:
return msm_csic_init(sd, (uint32_t *)arg);
case VIDIOC_MSM_CSIC_RELEASE:
return msm_csic_release(sd);
default:

15
drivers/media/video/msm/csi/msm_csic.h Executable file → Normal file
View file

@ -33,10 +33,19 @@ struct csic_device {
struct clk *csic_clk[5];
};
#define VIDIOC_MSM_CSIC_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csic_cfg_data*)
struct csic_cfg_params {
struct v4l2_subdev *subdev;
void *parms;
};
#define VIDIOC_MSM_CSIC_RELEASE \
#define VIDIOC_MSM_CSIC_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csic_cfg_params)
#define VIDIOC_MSM_CSIC_INIT \
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct v4l2_subdev*)
#define VIDIOC_MSM_CSIC_RELEASE \
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_subdev*)
#endif

0
drivers/media/video/msm/csi/msm_csic_register.c Executable file → Normal file
View file

402
drivers/media/video/msm/csi/msm_csid.c Executable file → Normal file
View file

@ -11,6 +11,8 @@
*/
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <mach/board.h>
@ -19,17 +21,11 @@
#include "msm_csid.h"
#include "msm_csid_hwreg.h"
#include "msm.h"
#include "msm_cam_server.h"
#define V4L2_IDENT_CSID 50002
#define CSID_VERSION_V2 0x02000011
#define CSID_VERSION_V3 0x30000000
#define DBG_CSID 0
#define TRUE 1
#define FALSE 0
static int msm_csid_cid_lut(
struct msm_camera_csid_lut_params *csid_lut_params,
void __iomem *csidbase)
@ -37,17 +33,7 @@ static int msm_csid_cid_lut(
int rc = 0, i = 0;
uint32_t val = 0;
if (!csid_lut_params) {
pr_err("%s:%d csid_lut_params NULL\n", __func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < csid_lut_params->num_cid && i < 16; i++) {
CDBG("%s lut params num_cid = %d, cid = %d, dt = %x, df = %d\n",
__func__,
csid_lut_params->num_cid,
csid_lut_params->vc_cfg[i].cid,
csid_lut_params->vc_cfg[i].dt,
csid_lut_params->vc_cfg[i].decode_format);
if (csid_lut_params->vc_cfg[i].dt < 0x12 ||
csid_lut_params->vc_cfg[i].dt > 0x37) {
CDBG("%s: unsupported data type 0x%x\n",
@ -61,7 +47,6 @@ static int msm_csid_cid_lut(
((csid_lut_params->vc_cfg[i].cid % 4) * 8));
msm_camera_io_w(val, csidbase + CSID_CID_LUT_VC_0_ADDR +
(csid_lut_params->vc_cfg[i].cid >> 2) * 4);
val = (csid_lut_params->vc_cfg[i].decode_format << 4) | 0x3;
msm_camera_io_w(val, csidbase + CSID_CID_n_CFG_ADDR +
(csid_lut_params->vc_cfg[i].cid * 4));
@ -83,24 +68,19 @@ static void msm_csid_set_debug_reg(void __iomem *csidbase,
struct msm_camera_csid_params *csid_params) {}
#endif
static int msm_csid_config(struct csid_device *csid_dev,
struct msm_camera_csid_params *csid_params)
static int msm_csid_config(struct csid_cfg_params *cfg_params)
{
int rc = 0;
uint32_t val = 0;
struct csid_device *csid_dev;
struct msm_camera_csid_params *csid_params;
void __iomem *csidbase;
csid_dev = v4l2_get_subdevdata(cfg_params->subdev);
csidbase = csid_dev->base;
if (!csidbase || !csid_params) {
pr_err("%s:%d csidbase %p, csid params %p\n", __func__,
__LINE__, csidbase, csid_params);
return -EINVAL;
}
if (csidbase == NULL)
return -ENOMEM;
csid_params = cfg_params->parms;
CDBG("%s csid_params, lane_cnt = %d, lane_assign = %x, phy sel = %d\n",
__func__,
csid_params->lane_cnt,
csid_params->lane_assign,
csid_params->phy_sel);
val = csid_params->lane_cnt - 1;
val |= csid_params->lane_assign << CSID_DL_INPUT_SEL_SHIFT;
if (csid_dev->hw_version < 0x30000000) {
@ -118,6 +98,7 @@ static int msm_csid_config(struct csid_device *csid_dev,
return rc;
msm_csid_set_debug_reg(csidbase, csid_params);
return rc;
}
@ -125,10 +106,6 @@ static irqreturn_t msm_csid_irq(int irq_num, void *data)
{
uint32_t irq;
struct csid_device *csid_dev = data;
if (!csid_dev||!csid_dev->base) {
pr_err("%s:%d csid_dev NULL\n", __func__, __LINE__);
return IRQ_HANDLED;
}
irq = msm_camera_io_r(csid_dev->base + CSID_IRQ_STATUS_ADDR);
CDBG("%s CSID%d_IRQ_STATUS_ADDR = 0x%x\n",
__func__, csid_dev->pdev->id, irq);
@ -138,16 +115,6 @@ static irqreturn_t msm_csid_irq(int irq_num, void *data)
return IRQ_HANDLED;
}
int msm_csid_irq_routine(struct v4l2_subdev *sd, u32 status, bool *handled)
{
struct csid_device *csid_dev = v4l2_get_subdevdata(sd);
irqreturn_t ret;
CDBG("%s E\n", __func__);
ret = msm_csid_irq(csid_dev->irq->start, csid_dev);
*handled = TRUE;
return 0;
}
static void msm_csid_reset(struct csid_device *csid_dev)
{
msm_camera_io_w(CSID_RST_STB_ALL, csid_dev->base + CSID_RST_CMD_ADDR);
@ -164,150 +131,53 @@ static int msm_csid_subdev_g_chip_ident(struct v4l2_subdev *sd,
return 0;
}
static struct msm_cam_clk_info csid_8960_clk_info[] = {
static struct msm_cam_clk_info csid_clk_info[] = {
{"csi_src_clk", 177780000},
{"csi_clk", -1},
{"csi_phy_clk", -1},
{"csi_pclk", -1},
};
static struct msm_cam_clk_info csid0_8974_clk_info[] = {
{"csi0_ahb_clk", -1},
{"csi0_src_clk", 200000000},
{"csi0_clk", -1},
{"csi0_phy_clk", -1},
{"csi0_pix_clk", -1},
{"csi0_rdi_clk", -1},
};
static struct msm_cam_clk_info csid1_8974_clk_info[] = {
{"csi1_ahb_clk", -1},
{"csi1_src_clk", 200000000},
{"csi1_clk", -1},
{"csi1_phy_clk", -1},
{"csi1_pix_clk", -1},
{"csi1_rdi_clk", -1},
};
static struct msm_cam_clk_info csid2_8974_clk_info[] = {
{"csi2_ahb_clk", -1},
{"csi2_src_clk", 200000000},
{"csi2_clk", -1},
{"csi2_phy_clk", -1},
{"csi2_pix_clk", -1},
{"csi2_rdi_clk", -1},
};
static struct msm_cam_clk_info csid3_8974_clk_info[] = {
{"csi3_ahb_clk", -1},
{"csi3_src_clk", 200000000},
{"csi3_clk", -1},
{"csi3_phy_clk", -1},
{"csi3_pix_clk", -1},
{"csi3_rdi_clk", -1},
};
static struct msm_cam_clk_setting csid_8974_clk_info[] = {
{&csid0_8974_clk_info[0], ARRAY_SIZE(csid0_8974_clk_info)},
{&csid1_8974_clk_info[0], ARRAY_SIZE(csid1_8974_clk_info)},
{&csid2_8974_clk_info[0], ARRAY_SIZE(csid2_8974_clk_info)},
{&csid3_8974_clk_info[0], ARRAY_SIZE(csid3_8974_clk_info)},
};
static struct camera_vreg_t csid_8960_vreg_info[] = {
static struct camera_vreg_t csid_vreg_info[] = {
{"mipi_csi_vdd", REG_LDO, 1200000, 1200000, 20000},
};
static struct camera_vreg_t csid_8974_vreg_info[] = {
{"mipi_csi_vdd", REG_LDO, 1800000, 1800000, 12000},
};
static int msm_csid_init(struct csid_device *csid_dev, uint32_t *csid_version)
static int msm_csid_init(struct v4l2_subdev *sd, uint32_t *csid_version)
{
int rc = 0;
uint8_t core_id = 0;
if (!csid_version) {
pr_err("%s:%d csid_version NULL\n", __func__, __LINE__);
rc = -EINVAL;
return rc;
}
if (csid_dev->csid_state == CSID_POWER_UP) {
pr_err("%s: csid invalid state %d\n", __func__,
csid_dev->csid_state);
rc = -EINVAL;
struct csid_device *csid_dev;
csid_dev = v4l2_get_subdevdata(sd);
if (csid_dev == NULL) {
rc = -ENOMEM;
return rc;
}
csid_dev->base = ioremap(csid_dev->mem->start,
resource_size(csid_dev->mem));
if (!csid_dev->base) {
pr_err("%s csid_dev->base NULL\n", __func__);
rc = -ENOMEM;
return rc;
}
if (CSID_VERSION <= CSID_VERSION_V2) {
rc = msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator on failed\n", __func__);
goto vreg_config_failed;
}
rc = msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator on failed\n", __func__);
goto vreg_config_failed;
}
rc = msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator enable failed\n", __func__);
goto vreg_enable_failed;
}
rc = msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator enable failed\n", __func__);
goto vreg_enable_failed;
}
rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8960_clk_info, csid_dev->csid_clk,
ARRAY_SIZE(csid_8960_clk_info), 1);
if (rc < 0) {
pr_err("%s: clock enable failed\n", __func__);
goto clk_enable_failed;
}
} else if (CSID_VERSION == CSID_VERSION_V3) {
rc = msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator on failed\n", __func__);
goto vreg_config_failed;
}
rc = msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 1);
if (rc < 0) {
pr_err("%s: regulator enable failed\n", __func__);
goto vreg_enable_failed;
}
rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8974_clk_info[0].clk_info, csid_dev->csid0_clk,
csid_8974_clk_info[0].num_clk_info, 1);
if (rc < 0) {
pr_err("%s: clock enable failed\n", __func__);
goto csid0_clk_enable_failed;
}
core_id = csid_dev->pdev->id;
if (core_id) {
rc = msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8974_clk_info[core_id].clk_info,
csid_dev->csid_clk,
csid_8974_clk_info[core_id].num_clk_info, 1);
if (rc < 0) {
pr_err("%s: clock enable failed\n",
__func__);
goto clk_enable_failed;
}
}
rc = msm_cam_clk_enable(&csid_dev->pdev->dev, csid_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_clk_info), 1);
if (rc < 0) {
pr_err("%s: regulator enable failed\n", __func__);
goto clk_enable_failed;
}
csid_dev->hw_version =
@ -316,178 +186,68 @@ static int msm_csid_init(struct csid_device *csid_dev, uint32_t *csid_version)
init_completion(&csid_dev->reset_complete);
enable_irq(csid_dev->irq->start);
rc = request_irq(csid_dev->irq->start, msm_csid_irq,
IRQF_TRIGGER_RISING, "csid", csid_dev);
msm_csid_reset(csid_dev);
csid_dev->csid_state = CSID_POWER_UP;
return rc;
clk_enable_failed:
if (CSID_VERSION == CSID_VERSION_V3) {
msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8974_clk_info[0].clk_info, csid_dev->csid0_clk,
csid_8974_clk_info[0].num_clk_info, 0);
}
csid0_clk_enable_failed:
if (CSID_VERSION <= CSID_VERSION_V2) {
msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
} else if (CSID_VERSION == CSID_VERSION_V3) {
msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
}
msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
vreg_enable_failed:
if (CSID_VERSION <= CSID_VERSION_V2) {
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
} else if (CSID_VERSION == CSID_VERSION_V3) {
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
}
msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
vreg_config_failed:
iounmap(csid_dev->base);
csid_dev->base = NULL;
return rc;
}
static int msm_csid_release(struct csid_device *csid_dev)
static int msm_csid_release(struct v4l2_subdev *sd)
{
uint32_t irq;
uint8_t core_id = 0;
if (csid_dev->csid_state != CSID_POWER_UP) {
pr_err("%s: csid invalid state %d\n", __func__,
csid_dev->csid_state);
return -EINVAL;
}
struct csid_device *csid_dev;
csid_dev = v4l2_get_subdevdata(sd);
irq = msm_camera_io_r(csid_dev->base + CSID_IRQ_STATUS_ADDR);
msm_camera_io_w(irq, csid_dev->base + CSID_IRQ_CLEAR_CMD_ADDR);
msm_camera_io_w(0, csid_dev->base + CSID_IRQ_MASK_ADDR);
disable_irq(csid_dev->irq->start);
free_irq(csid_dev->irq->start, csid_dev);
if (csid_dev->hw_version <= CSID_VERSION_V2) {
msm_cam_clk_enable(&csid_dev->pdev->dev, csid_8960_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_8960_clk_info), 0);
msm_cam_clk_enable(&csid_dev->pdev->dev, csid_clk_info,
csid_dev->csid_clk, ARRAY_SIZE(csid_clk_info), 0);
msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
msm_camera_enable_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8960_vreg_info, ARRAY_SIZE(csid_8960_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
} else if (csid_dev->hw_version == CSID_VERSION_V3) {
core_id = csid_dev->pdev->id;
if (core_id)
msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8974_clk_info[core_id].clk_info,
csid_dev->csid_clk,
csid_8974_clk_info[core_id].num_clk_info, 0);
msm_cam_clk_enable(&csid_dev->pdev->dev,
csid_8974_clk_info[0].clk_info, csid_dev->csid0_clk,
csid_8974_clk_info[0].num_clk_info, 0);
msm_camera_enable_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
msm_camera_config_vreg(&csid_dev->pdev->dev,
csid_8974_vreg_info, ARRAY_SIZE(csid_8974_vreg_info),
NULL, 0, &csid_dev->csi_vdd, 0);
}
msm_camera_config_vreg(&csid_dev->pdev->dev, csid_vreg_info,
ARRAY_SIZE(csid_vreg_info), &csid_dev->csi_vdd, 0);
iounmap(csid_dev->base);
csid_dev->base = NULL;
csid_dev->csid_state = CSID_POWER_DOWN;
return 0;
}
static long msm_csid_cmd(struct csid_device *csid_dev, void *arg)
{
int rc = 0;
struct csid_cfg_data cdata;
if (!csid_dev) {
pr_err("%s:%d csid_dev NULL\n", __func__, __LINE__);
return -EINVAL;
}
if (copy_from_user(&cdata,
(void *)arg,
sizeof(struct csid_cfg_data))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
return -EFAULT;
}
CDBG("%s cfgtype = %d\n", __func__, cdata.cfgtype);
switch (cdata.cfgtype) {
case CSID_INIT:
rc = msm_csid_init(csid_dev, &cdata.cfg.csid_version);
if (copy_to_user((void *)arg,
&cdata,
sizeof(struct csid_cfg_data))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -EFAULT;
}
break;
case CSID_CFG: {
struct msm_camera_csid_params csid_params;
struct msm_camera_csid_vc_cfg *vc_cfg = NULL;
if (copy_from_user(&csid_params,
(void *)cdata.cfg.csid_params,
sizeof(struct msm_camera_csid_params))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -EFAULT;
break;
}
vc_cfg = kzalloc(csid_params.lut_params.num_cid *
sizeof(struct msm_camera_csid_vc_cfg),
GFP_KERNEL);
if (!vc_cfg) {
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -ENOMEM;
break;
}
if (copy_from_user(vc_cfg,
(void *)csid_params.lut_params.vc_cfg,
(csid_params.lut_params.num_cid *
sizeof(struct msm_camera_csid_vc_cfg)))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
kfree(vc_cfg);
rc = -EFAULT;
break;
}
csid_params.lut_params.vc_cfg = vc_cfg;
rc = msm_csid_config(csid_dev, &csid_params);
kfree(vc_cfg);
break;
}
default:
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -ENOIOCTLCMD;
break;
}
return rc;
}
static long msm_csid_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
int rc = -ENOIOCTLCMD;
struct csid_cfg_params cfg_params;
struct csid_device *csid_dev = v4l2_get_subdevdata(sd);
mutex_lock(&csid_dev->mutex);
switch (cmd) {
case VIDIOC_MSM_CSID_CFG:
rc = msm_csid_cmd(csid_dev, arg);
cfg_params.subdev = sd;
cfg_params.parms = arg;
rc = msm_csid_config((struct csid_cfg_params *)&cfg_params);
break;
case VIDIOC_MSM_CSID_INIT:
rc = msm_csid_init(sd, (uint32_t *)arg);
break;
case VIDIOC_MSM_CSID_RELEASE:
rc = msm_csid_release(csid_dev);
rc = msm_csid_release(sd);
break;
default:
pr_err("%s: command not found\n", __func__);
@ -501,7 +261,6 @@ static const struct v4l2_subdev_internal_ops msm_csid_internal_ops;
static struct v4l2_subdev_core_ops msm_csid_subdev_core_ops = {
.g_chip_ident = &msm_csid_subdev_g_chip_ident,
.ioctl = &msm_csid_subdev_ioctl,
.interrupt_service_routine = msm_csid_irq_routine,
};
static const struct v4l2_subdev_ops msm_csid_subdev_ops = {
@ -512,10 +271,9 @@ static int __devinit csid_probe(struct platform_device *pdev)
{
struct csid_device *new_csid_dev;
struct msm_cam_subdev_info sd_info;
struct intr_table_entry irq_req;
int rc = 0;
CDBG("%s:%d called\n", __func__, __LINE__);
CDBG("%s: device id = %d\n", __func__, pdev->id);
new_csid_dev = kzalloc(sizeof(struct csid_device), GFP_KERNEL);
if (!new_csid_dev) {
pr_err("%s: no enough memory\n", __func__);
@ -535,7 +293,6 @@ static int __devinit csid_probe(struct platform_device *pdev)
of_property_read_u32((&pdev->dev)->of_node,
"cell-index", &pdev->id);
CDBG("%s device id %d\n", __func__, pdev->id);
new_csid_dev->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "csid");
if (!new_csid_dev->mem) {
@ -570,51 +327,12 @@ static int __devinit csid_probe(struct platform_device *pdev)
new_csid_dev->subdev.entity.name = pdev->name;
new_csid_dev->subdev.entity.revision =
new_csid_dev->subdev.devnode->num;
/* Request for this device irq from the camera server. If the
* IRQ Router is present on this target, the interrupt will be
* handled by the camera server and the interrupt service
* routine called. If the request_irq call returns ENXIO, then
* the IRQ Router hardware is not present on this target. We
* have to request for the irq ourselves and register the
* appropriate interrupt handler. */
irq_req.cam_hw_idx = MSM_CAM_HW_CSI0 + pdev->id;
irq_req.dev_name = "csid";
irq_req.irq_idx = CAMERA_SS_IRQ_2 + pdev->id;
irq_req.irq_num = new_csid_dev->irq->start;
irq_req.is_composite = 0;
irq_req.irq_trigger_type = IRQF_TRIGGER_RISING;
irq_req.num_hwcore = 1;
irq_req.subdev_list[0] = &new_csid_dev->subdev;
irq_req.data = (void *)new_csid_dev;
rc = msm_cam_server_request_irq(&irq_req);
if (rc == -ENXIO) {
/* IRQ Router hardware is not present on this hardware.
* Request for the IRQ and register the interrupt handler. */
rc = request_irq(new_csid_dev->irq->start, msm_csid_irq,
IRQF_TRIGGER_RISING, "csid", new_csid_dev);
if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s: irq request fail\n", __func__);
rc = -EBUSY;
goto csid_no_resource;
}
disable_irq(new_csid_dev->irq->start);
} else if (rc < 0) {
release_mem_region(new_csid_dev->mem->start,
resource_size(new_csid_dev->mem));
pr_err("%s Error registering irq ", __func__);
goto csid_no_resource;
}
new_csid_dev->csid_state = CSID_POWER_DOWN;
return 0;
csid_no_resource:
mutex_destroy(&new_csid_dev->mutex);
kfree(new_csid_dev);
return rc;
return 0;
}
static const struct of_device_id msm_csid_dt_match[] = {

25
drivers/media/video/msm/csi/msm_csid.h Executable file → Normal file
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -16,12 +16,6 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <media/v4l2-subdev.h>
#include <media/msm_camera.h>
enum msm_csid_state_t {
CSID_POWER_UP,
CSID_POWER_DOWN,
};
struct csid_device {
struct platform_device *pdev;
@ -34,16 +28,23 @@ struct csid_device {
struct mutex mutex;
struct completion reset_complete;
uint32_t hw_version;
enum msm_csid_state_t csid_state;
struct clk *csid0_clk[6];
struct clk *csid_clk[6];
struct clk *csid_clk[5];
};
struct csid_cfg_params {
struct v4l2_subdev *subdev;
void *parms;
};
#define VIDIOC_MSM_CSID_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csic_cfg_data*)
_IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csid_cfg_params)
#define VIDIOC_MSM_CSID_INIT \
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct v4l2_subdev*)
#define VIDIOC_MSM_CSID_RELEASE \
_IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct v4l2_subdev*)
_IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_subdev*)
#endif

152
drivers/media/video/msm/csi/msm_csiphy.c Executable file → Normal file
View file

@ -16,6 +16,7 @@
#include <linux/of.h>
#include <linux/module.h>
#include <mach/board.h>
#include <mach/camera.h>
#include <mach/vreg.h>
#include <media/msm_isp.h>
#include "msm_csiphy.h"
@ -26,35 +27,31 @@
#define V4L2_IDENT_CSIPHY 50003
#define CSIPHY_VERSION_V3 0x10
int msm_csiphy_lane_config(struct csiphy_device *csiphy_dev,
struct msm_camera_csiphy_params *csiphy_params)
int msm_csiphy_config(struct csiphy_cfg_params *cfg_params)
{
int rc = 0;
int j = 0;
uint32_t val = 0;
uint8_t lane_cnt = 0;
uint16_t lane_mask = 0;
struct csiphy_device *csiphy_dev;
struct msm_camera_csiphy_params *csiphy_params;
void __iomem *csiphybase;
csiphy_dev = v4l2_get_subdevdata(cfg_params->subdev);
csiphybase = csiphy_dev->base;
if (!csiphybase) {
pr_err("%s: csiphybase NULL\n", __func__);
return -EINVAL;
}
if (csiphybase == NULL)
return -ENOMEM;
csiphy_params = cfg_params->parms;
csiphy_dev->lane_mask[csiphy_dev->pdev->id] |= csiphy_params->lane_mask;
lane_mask = csiphy_dev->lane_mask[csiphy_dev->pdev->id];
lane_cnt = csiphy_params->lane_cnt;
if (csiphy_params->lane_cnt < 1 || csiphy_params->lane_cnt > 4) {
pr_err("%s: unsupported lane cnt %d\n",
CDBG("%s: unsupported lane cnt %d\n",
__func__, csiphy_params->lane_cnt);
return rc;
}
CDBG("%s csiphy_params, mask = %x, cnt = %d, settle cnt = %x\n",
__func__,
csiphy_params->lane_mask,
csiphy_params->lane_cnt,
csiphy_params->settle_cnt);
msm_camera_io_w(0x1, csiphybase + MIPI_CSIPHY_GLBL_T_INIT_CFG0_ADDR);
msm_camera_io_w(0x1, csiphybase + MIPI_CSIPHY_T_WAKEUP_CFG0_ADDR);
@ -78,7 +75,6 @@ int msm_csiphy_lane_config(struct csiphy_device *csiphy_dev,
csiphybase + MIPI_CSIPHY_GLBL_RESET_ADDR);
}
lane_mask &= 0x1f;
while (lane_mask & 0x1f) {
if (!(lane_mask & 0x1)) {
j++;
@ -96,7 +92,7 @@ int msm_csiphy_lane_config(struct csiphy_device *csiphy_dev,
j++;
lane_mask >>= 1;
}
msleep(20);
return rc;
}
@ -105,25 +101,19 @@ static irqreturn_t msm_csiphy_irq(int irq_num, void *data)
uint32_t irq;
int i;
struct csiphy_device *csiphy_dev = data;
if(!csiphy_dev || !csiphy_dev->base)
return IRQ_HANDLED;
for (i = 0; i < 8; i++) {
for (i = 0; i < 5; i++) {
irq = msm_camera_io_r(
csiphy_dev->base +
MIPI_CSIPHY_INTERRUPT_STATUS0_ADDR + 0x4*i);
msm_camera_io_w(irq,
csiphy_dev->base +
MIPI_CSIPHY_INTERRUPT_CLEAR0_ADDR + 0x4*i);
pr_err("%s MIPI_CSIPHY%d_INTERRUPT_STATUS%d = 0x%x\n",
CDBG("%s MIPI_CSIPHY%d_INTERRUPT_STATUS%d = 0x%x\n",
__func__, csiphy_dev->pdev->id, i, irq);
msm_camera_io_w(0x1, csiphy_dev->base +
MIPI_CSIPHY_GLBL_IRQ_CMD_ADDR);
msm_camera_io_w(0x0, csiphy_dev->base +
MIPI_CSIPHY_GLBL_IRQ_CMD_ADDR);
msm_camera_io_w(0x0,
csiphy_dev->base +
MIPI_CSIPHY_INTERRUPT_CLEAR0_ADDR + 0x4*i);
}
msm_camera_io_w(0x1, csiphy_dev->base + 0x164);
msm_camera_io_w(0x0, csiphy_dev->base + 0x164);
return IRQ_HANDLED;
}
@ -143,33 +133,21 @@ static int msm_csiphy_subdev_g_chip_ident(struct v4l2_subdev *sd,
return 0;
}
static struct msm_cam_clk_info csiphy_8960_clk_info[] = {
static struct msm_cam_clk_info csiphy_clk_info[] = {
{"csiphy_timer_src_clk", 177780000},
{"csiphy_timer_clk", -1},
};
static struct msm_cam_clk_info csiphy_8974_clk_info[] = {
{"ispif_ahb_clk", -1},
{"csiphy_timer_src_clk", 200000000},
{"csiphy_timer_clk", -1},
};
static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
static int msm_csiphy_init(struct v4l2_subdev *sd)
{
int rc = 0;
struct csiphy_device *csiphy_dev;
csiphy_dev = v4l2_get_subdevdata(sd);
if (csiphy_dev == NULL) {
pr_err("%s: csiphy_dev NULL\n", __func__);
rc = -ENOMEM;
return rc;
}
if (csiphy_dev->csiphy_state == CSIPHY_POWER_UP) {
pr_err("%s: csiphy invalid state %d\n", __func__,
csiphy_dev->csiphy_state);
rc = -EINVAL;
return rc;
}
if (csiphy_dev->ref_count++) {
CDBG("%s csiphy refcount = %d\n", __func__,
csiphy_dev->ref_count);
@ -179,23 +157,15 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
csiphy_dev->base = ioremap(csiphy_dev->mem->start,
resource_size(csiphy_dev->mem));
if (!csiphy_dev->base) {
pr_err("%s: csiphy_dev->base NULL\n", __func__);
csiphy_dev->ref_count--;
rc = -ENOMEM;
return rc;
}
if (CSIPHY_VERSION != CSIPHY_VERSION_V3)
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 1);
else
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 1);
rc = msm_cam_clk_enable(&csiphy_dev->pdev->dev, csiphy_clk_info,
csiphy_dev->csiphy_clk, ARRAY_SIZE(csiphy_clk_info), 1);
if (rc < 0) {
pr_err("%s: csiphy clk enable failed\n", __func__);
csiphy_dev->ref_count--;
iounmap(csiphy_dev->base);
csiphy_dev->base = NULL;
@ -210,15 +180,16 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
csiphy_dev->hw_version =
msm_camera_io_r(csiphy_dev->base + MIPI_CSIPHY_HW_VERSION_ADDR);
csiphy_dev->csiphy_state = CSIPHY_POWER_UP;
return 0;
}
static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)
static int msm_csiphy_release(struct v4l2_subdev *sd, void *arg)
{
struct csiphy_device *csiphy_dev;
int i = 0;
struct msm_camera_csi_lane_params *csi_lane_params;
uint16_t csi_lane_mask;
csiphy_dev = v4l2_get_subdevdata(sd);
csi_lane_params = (struct msm_camera_csi_lane_params *)arg;
csi_lane_mask = csi_lane_params->csi_lane_mask;
@ -227,17 +198,6 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)
return 0;
}
if (csiphy_dev->csiphy_state != CSIPHY_POWER_UP) {
pr_err("%s: csiphy invalid state %d\n", __func__,
csiphy_dev->csiphy_state);
return -EINVAL;
}
CDBG("%s csiphy_params, lane assign %x mask = %x\n",
__func__,
csi_lane_params->csi_lane_assign,
csi_lane_params->csi_lane_mask);
if (csiphy_dev->hw_version != CSIPHY_VERSION_V3) {
csiphy_dev->lane_mask[csiphy_dev->pdev->id] = 0;
for (i = 0; i < 4; i++)
@ -269,70 +229,33 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)
#if DBG_CSIPHY
disable_irq(csiphy_dev->irq->start);
#endif
if (CSIPHY_VERSION != CSIPHY_VERSION_V3)
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8960_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8960_clk_info), 0);
else
msm_cam_clk_enable(&csiphy_dev->pdev->dev,
csiphy_8974_clk_info, csiphy_dev->csiphy_clk,
ARRAY_SIZE(csiphy_8974_clk_info), 0);
msm_cam_clk_enable(&csiphy_dev->pdev->dev, csiphy_clk_info,
csiphy_dev->csiphy_clk, ARRAY_SIZE(csiphy_clk_info), 0);
iounmap(csiphy_dev->base);
csiphy_dev->base = NULL;
csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
return 0;
}
static long msm_csiphy_cmd(struct csiphy_device *csiphy_dev, void *arg)
{
int rc = 0;
struct csiphy_cfg_data cdata;
struct msm_camera_csiphy_params csiphy_params;
if (!csiphy_dev) {
pr_err("%s: csiphy_dev NULL\n", __func__);
return -EINVAL;
}
if (copy_from_user(&cdata,
(void *)arg,
sizeof(struct csiphy_cfg_data))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
return -EFAULT;
}
switch (cdata.cfgtype) {
case CSIPHY_INIT:
rc = msm_csiphy_init(csiphy_dev);
break;
case CSIPHY_CFG:
if (copy_from_user(&csiphy_params,
(void *)cdata.csiphy_params,
sizeof(struct msm_camera_csiphy_params))) {
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -EFAULT;
break;
}
rc = msm_csiphy_lane_config(csiphy_dev, &csiphy_params);
break;
default:
pr_err("%s: %d failed\n", __func__, __LINE__);
rc = -ENOIOCTLCMD;
break;
}
return rc;
}
static long msm_csiphy_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
int rc = -ENOIOCTLCMD;
struct csiphy_cfg_params cfg_params;
struct csiphy_device *csiphy_dev = v4l2_get_subdevdata(sd);
mutex_lock(&csiphy_dev->mutex);
switch (cmd) {
case VIDIOC_MSM_CSIPHY_CFG:
rc = msm_csiphy_cmd(csiphy_dev, arg);
cfg_params.subdev = sd;
cfg_params.parms = arg;
rc = msm_csiphy_config(
(struct csiphy_cfg_params *)&cfg_params);
break;
case VIDIOC_MSM_CSIPHY_INIT:
rc = msm_csiphy_init(sd);
break;
case VIDIOC_MSM_CSIPHY_RELEASE:
rc = msm_csiphy_release(csiphy_dev, arg);
rc = msm_csiphy_release(sd, arg);
break;
default:
pr_err("%s: command not found\n", __func__);
@ -358,6 +281,7 @@ static int __devinit csiphy_probe(struct platform_device *pdev)
int rc = 0;
struct msm_cam_subdev_info sd_info;
CDBG("%s: device id = %d\n", __func__, pdev->id);
new_csiphy_dev = kzalloc(sizeof(struct csiphy_device), GFP_KERNEL);
if (!new_csiphy_dev) {
pr_err("%s: no enough memory\n", __func__);
@ -377,7 +301,6 @@ static int __devinit csiphy_probe(struct platform_device *pdev)
if (pdev->dev.of_node)
of_property_read_u32((&pdev->dev)->of_node,
"cell-index", &pdev->id);
CDBG("%s: device id = %d\n", __func__, pdev->id);
new_csiphy_dev->mem = platform_get_resource_byname(pdev,
IORESOURCE_MEM, "csiphy");
@ -425,13 +348,12 @@ static int __devinit csiphy_probe(struct platform_device *pdev)
new_csiphy_dev->subdev.entity.name = pdev->name;
new_csiphy_dev->subdev.entity.revision =
new_csiphy_dev->subdev.devnode->num;
new_csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
return 0;
csiphy_no_resource:
mutex_destroy(&new_csiphy_dev->mutex);
kfree(new_csiphy_dev);
return rc;
return 0;
}
static const struct of_device_id msm_csiphy_dt_match[] = {

22
drivers/media/video/msm/csi/msm_csiphy.h Executable file → Normal file
View file

@ -1,4 +1,4 @@
/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@ -16,15 +16,9 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <media/v4l2-subdev.h>
#include <media/msm_camera.h>
#define MAX_CSIPHY 3
enum msm_csiphy_state_t {
CSIPHY_POWER_UP,
CSIPHY_POWER_DOWN,
};
struct csiphy_device {
struct platform_device *pdev;
struct v4l2_subdev subdev;
@ -34,16 +28,24 @@ struct csiphy_device {
void __iomem *base;
struct mutex mutex;
uint32_t hw_version;
enum msm_csiphy_state_t csiphy_state;
struct clk *csiphy_clk[3];
struct clk *csiphy_clk[2];
uint8_t ref_count;
uint16_t lane_mask[MAX_CSIPHY];
};
struct csiphy_cfg_params {
struct v4l2_subdev *subdev;
void *parms;
};
#define VIDIOC_MSM_CSIPHY_CFG \
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct csiphy_cfg_data*)
_IOWR('V', BASE_VIDIOC_PRIVATE + 7, void *)
#define VIDIOC_MSM_CSIPHY_INIT \
_IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct v4l2_subdev*)
#define VIDIOC_MSM_CSIPHY_RELEASE \
_IOWR('V', BASE_VIDIOC_PRIVATE + 9, void *)
#endif

325
drivers/media/video/msm/csi/msm_ispif.c Executable file → Normal file
View file

@ -36,6 +36,7 @@ static int msm_ispif_intf_reset(struct ispif_device *ispif,
{
int rc = 0;
uint32_t data = (0x1 << STROBED_RST_EN);
uint32_t data1 = (0x1 << STROBED_RST_EN);
uint16_t intfnum = 0, mask = intfmask;
while (mask != 0) {
@ -46,32 +47,49 @@ static int msm_ispif_intf_reset(struct ispif_device *ispif,
}
switch (intfnum) {
case PIX0:
data |= (0x1 << PIX_0_VFE_RST_STB) |
(0x1 << PIX_0_CSID_RST_STB);
if (vfe_intf == VFE0)
data |= (0x1 << PIX_0_VFE_RST_STB) |
(0x1 << PIX_0_CSID_RST_STB);
else
data1 |= (0x1 << PIX_0_VFE_RST_STB) |
(0x1 << PIX_0_CSID_RST_STB);
ispif->pix_sof_count = 0;
break;
case RDI0:
data |= (0x1 << RDI_0_VFE_RST_STB) |
(0x1 << RDI_0_CSID_RST_STB);
ispif->rdi0_sof_count = 0;
if (vfe_intf == VFE0)
data |= (0x1 << RDI_0_VFE_RST_STB) |
(0x1 << RDI_0_CSID_RST_STB);
else
data1 |= (0x1 << RDI_0_VFE_RST_STB) |
(0x1 << RDI_0_CSID_RST_STB);
break;
case PIX1:
data |= (0x1 << PIX_1_VFE_RST_STB) |
(0x1 << PIX_1_CSID_RST_STB);
if (vfe_intf == VFE0)
data |= (0x1 << PIX_1_VFE_RST_STB) |
(0x1 << PIX_1_CSID_RST_STB);
else
data1 |= (0x1 << PIX_1_VFE_RST_STB) |
(0x1 << PIX_1_CSID_RST_STB);
break;
case RDI1:
data |= (0x1 << RDI_1_VFE_RST_STB) |
(0x1 << RDI_1_CSID_RST_STB);
ispif->rdi1_sof_count = 0;
if (vfe_intf == VFE0)
data |= (0x1 << RDI_1_VFE_RST_STB) |
(0x1 << RDI_1_CSID_RST_STB);
else
data1 |= (0x1 << RDI_1_VFE_RST_STB) |
(0x1 << RDI_1_CSID_RST_STB);
break;
case RDI2:
data |= (0x1 << RDI_2_VFE_RST_STB) |
(0x1 << RDI_2_CSID_RST_STB);
ispif->rdi2_sof_count = 0;
if (vfe_intf == VFE0)
data |= (0x1 << RDI_2_VFE_RST_STB) |
(0x1 << RDI_2_CSID_RST_STB);
else
data1 |= (0x1 << RDI_2_VFE_RST_STB) |
(0x1 << RDI_2_CSID_RST_STB);
break;
default:
@ -81,26 +99,43 @@ static int msm_ispif_intf_reset(struct ispif_device *ispif,
mask >>= 1;
intfnum++;
} /*end while */
if (data > 0x1) {
if (vfe_intf == VFE0)
msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
else
msm_camera_io_w(data, ispif->base +
ISPIF_RST_CMD_1_ADDR);
rc = wait_for_completion_interruptible(&ispif->reset_complete);
msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
rc = wait_for_completion_interruptible(&ispif->reset_complete);
if (ispif->csid_version >= CSID_VERSION_V3 && data1 > 0x1) {
msm_camera_io_w(data1,
ispif->base + ISPIF_RST_CMD_1_ADDR);
rc = wait_for_completion_interruptible(&ispif->
reset_complete);
}
return rc;
}
static int msm_ispif_reset(struct ispif_device *ispif)
{
int rc = 0;
uint32_t data = (0x1 << STROBED_RST_EN) |
(0x1 << SW_REG_RST_STB) |
(0x1 << MISC_LOGIC_RST_STB) |
(0x1 << PIX_0_VFE_RST_STB) |
(0x1 << PIX_0_CSID_RST_STB) |
(0x1 << RDI_0_VFE_RST_STB) |
(0x1 << RDI_0_CSID_RST_STB) |
(0x1 << RDI_1_VFE_RST_STB) |
(0x1 << RDI_1_CSID_RST_STB);
if (ispif->csid_version >= CSID_VERSION_V2)
data |= (0x1 << PIX_1_VFE_RST_STB) |
(0x1 << PIX_1_CSID_RST_STB) |
(0x1 << RDI_2_VFE_RST_STB) |
(0x1 << RDI_2_CSID_RST_STB);
ispif->pix_sof_count = 0;
msm_camera_io_w(ISPIF_RST_CMD_MASK, ispif->base + ISPIF_RST_CMD_ADDR);
if (ispif->csid_version == CSID_VERSION_V3)
msm_camera_io_w(ISPIF_RST_CMD_1_MASK, ispif->base +
ISPIF_RST_CMD_1_ADDR);
msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_ADDR);
rc = wait_for_completion_interruptible(&ispif->reset_complete);
if (ispif->csid_version >= CSID_VERSION_V3) {
msm_camera_io_w(data, ispif->base + ISPIF_RST_CMD_1_ADDR);
rc = wait_for_completion_interruptible(&ispif->reset_complete);
}
return rc;
}
@ -117,55 +152,53 @@ static void msm_ispif_sel_csid_core(struct ispif_device *ispif,
uint8_t intftype, uint8_t csid, uint8_t vfe_intf)
{
int rc = 0;
uint32_t data = 0;
uint32_t data;
if (ispif->csid_version <= CSID_VERSION_V2) {
if (ispif->ispif_clk[intftype] == NULL) {
pr_err("%s: ispif NULL clk\n", __func__);
return;
}
rc = clk_set_rate(ispif->ispif_clk[intftype], csid);
if (rc < 0)
pr_err("%s: clk_set_rate failed %d\n", __func__, rc);
if (ispif->ispif_clk[intftype] == NULL) {
pr_err("%s: ispif NULL clk\n", __func__);
return;
}
rc = clk_set_rate(ispif->ispif_clk[intftype], csid);
if (rc < 0)
pr_err("%s: clk_set_rate failed %d\n", __func__, rc);
data = msm_camera_io_r(ispif->base + ISPIF_INPUT_SEL_ADDR +
(0x200 * vfe_intf));
switch (intftype) {
case PIX0:
data &= ~(0x3);
data &= ~(0xF);
data |= csid;
break;
case RDI0:
data &= ~(0x3 << 4);
data &= ~(0xF << 4);
data |= (csid << 4);
break;
case PIX1:
data &= ~(0x3 << 8);
data &= ~(0xF << 8);
data |= (csid << 8);
break;
case RDI1:
data &= ~(0x3 << 12);
data &= ~(0xF << 12);
data |= (csid << 12);
break;
case RDI2:
data &= ~(0x3 << 20);
data &= ~(0xF << 20);
data |= (csid << 20);
break;
}
if (data) {
msm_camera_io_w(data, ispif->base + ISPIF_INPUT_SEL_ADDR +
(0x200 * vfe_intf));
}
msm_camera_io_w(data, ispif->base + ISPIF_INPUT_SEL_ADDR +
(0x200 * vfe_intf));
}
static void msm_ispif_enable_intf_cids(struct ispif_device *ispif,
uint8_t intftype, uint16_t cid_mask, uint8_t vfe_intf)
{
uint32_t data = 0;
uint32_t data;
mutex_lock(&ispif->mutex);
switch (intftype) {
case PIX0:
@ -215,7 +248,7 @@ static int32_t msm_ispif_validate_intf_status(struct ispif_device *ispif,
uint8_t intftype, uint8_t vfe_intf)
{
int32_t rc = 0;
uint32_t data = 0;
uint32_t data;
mutex_lock(&ispif->mutex);
switch (intftype) {
case PIX0:
@ -242,6 +275,10 @@ static int32_t msm_ispif_validate_intf_status(struct ispif_device *ispif,
data = msm_camera_io_r(ispif->base +
ISPIF_RDI_2_STATUS_ADDR + (0x200 * vfe_intf));
break;
default:
data = 0;
rc = -EINVAL;
break;
}
if ((data & 0xf) != 0xf)
rc = -EBUSY;
@ -261,13 +298,11 @@ static int msm_ispif_config(struct ispif_device *ispif,
ispif_params = params_list->params;
CDBG("Enable interface\n");
msm_camera_io_w(0x00000000, ispif->base + ISPIF_IRQ_MASK_ADDR);
msm_camera_io_w(0x00000000, ispif->base + ISPIF_IRQ_MASK_1_ADDR);
msm_camera_io_w(0x00000000, ispif->base + ISPIF_IRQ_MASK_2_ADDR);
for (i = 0; i < params_len; i++) {
intftype = ispif_params[i].intftype;
vfe_intf = ispif_params[i].vfe_intf;
CDBG("%s intftype %x, vfe_intf %d, csid %d\n", __func__,
intftype, vfe_intf, ispif_params[i].csid);
CDBG("%s intftype %x, vfe_intf %d\n", __func__, intftype,
vfe_intf);
if ((intftype >= INTF_MAX) ||
(ispif->csid_version <= CSID_VERSION_V2 &&
vfe_intf > VFE0) ||
@ -293,14 +328,6 @@ static int msm_ispif_config(struct ispif_device *ispif,
ISPIF_IRQ_MASK_ADDR);
msm_camera_io_w(ISPIF_IRQ_STATUS_MASK, ispif->base +
ISPIF_IRQ_CLEAR_ADDR);
msm_camera_io_w(ISPIF_IRQ_STATUS_1_MASK, ispif->base +
ISPIF_IRQ_MASK_1_ADDR);
msm_camera_io_w(ISPIF_IRQ_STATUS_1_MASK, ispif->base +
ISPIF_IRQ_CLEAR_1_ADDR);
msm_camera_io_w(ISPIF_IRQ_STATUS_2_MASK, ispif->base +
ISPIF_IRQ_MASK_2_ADDR);
msm_camera_io_w(ISPIF_IRQ_STATUS_2_MASK, ispif->base +
ISPIF_IRQ_CLEAR_2_ADDR);
msm_camera_io_w(ISPIF_IRQ_GLOBAL_CLEAR_CMD, ispif->base +
ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR);
return rc;
@ -345,9 +372,10 @@ static uint32_t msm_ispif_get_cid_mask(struct ispif_device *ispif,
static void msm_ispif_intf_cmd(struct ispif_device *ispif, uint16_t intfmask,
uint8_t intf_cmd_mask, uint8_t vfe_intf)
{
uint8_t vc = 0, val = 0;
uint8_t vc = 0;
uint16_t mask = intfmask, intfnum = 0;
uint32_t cid_mask = 0;
uint32_t global_intf_cmd_mask = 0xFFFFFFFF;
uint32_t global_intf_cmd_mask1 = 0xFFFFFFFF;
while (mask != 0) {
if (!(intfmask & (0x1 << intfnum))) {
@ -361,15 +389,12 @@ static void msm_ispif_intf_cmd(struct ispif_device *ispif, uint16_t intfmask,
while (cid_mask != 0) {
if ((cid_mask & 0xf) != 0x0) {
if (intfnum != RDI2) {
val = (intf_cmd_mask>>(vc*2)) & 0x3;
ispif->global_intf_cmd_mask |=
(0x3 << ((vc * 2) +
if (intfnum != RDI2)
global_intf_cmd_mask &=
~((0x3 & ~intf_cmd_mask)
<< ((vc * 2) +
(intfnum * 8)));
ispif->global_intf_cmd_mask &=
~((0x3 & ~val) << ((vc * 2) +
(intfnum * 8)));
} else
else
global_intf_cmd_mask1 &=
~((0x3 & ~intf_cmd_mask)
<< ((vc * 2) + 8));
@ -380,7 +405,7 @@ static void msm_ispif_intf_cmd(struct ispif_device *ispif, uint16_t intfmask,
mask >>= 1;
intfnum++;
}
msm_camera_io_w(ispif->global_intf_cmd_mask,
msm_camera_io_w(global_intf_cmd_mask,
ispif->base + ISPIF_INTF_CMD_ADDR + (0x200 * vfe_intf));
if (global_intf_cmd_mask1 != 0xFFFFFFFF)
msm_camera_io_w(global_intf_cmd_mask1,
@ -392,20 +417,11 @@ static int msm_ispif_abort_intf_transfer(struct ispif_device *ispif,
uint16_t intfmask, uint8_t vfe_intf)
{
int rc = 0;
uint8_t intf_cmd_mask = 0xAA;
uint16_t intfnum = 0, mask = intfmask;
uint8_t intf_cmd_mask = 0x02;
mutex_lock(&ispif->mutex);
CDBG("%s intfmask %x intf_cmd_mask %x\n", __func__, intfmask,
intf_cmd_mask);
msm_ispif_intf_cmd(ispif, intfmask, intf_cmd_mask, vfe_intf);
while (mask != 0) {
if (intfmask & (0x1 << intfnum))
ispif->global_intf_cmd_mask |= (0xFF << (intfnum * 8));
mask >>= 1;
intfnum++;
if (intfnum == RDI2)
break;
}
mutex_unlock(&ispif->mutex);
return rc;
}
@ -413,11 +429,11 @@ static int msm_ispif_abort_intf_transfer(struct ispif_device *ispif,
static int msm_ispif_start_intf_transfer(struct ispif_device *ispif,
uint16_t intfmask, uint8_t vfe_intf)
{
uint8_t intf_cmd_mask = 0x55;
uint8_t intf_cmd_mask = 0x01;
int rc = 0;
mutex_lock(&ispif->mutex);
rc = msm_ispif_intf_reset(ispif, intfmask, vfe_intf);
CDBG("%s intfmask start after%x intf_cmd_mask %x\n", __func__, intfmask,
CDBG("%s intfmask %x intf_cmd_mask %x\n", __func__, intfmask,
intf_cmd_mask);
msm_ispif_intf_cmd(ispif, intfmask, intf_cmd_mask, vfe_intf);
mutex_unlock(&ispif->mutex);
@ -485,9 +501,6 @@ static int msm_ispif_stop_intf_transfer(struct ispif_device *ispif,
default:
break;
}
if (intfnum != RDI2)
ispif->global_intf_cmd_mask |= (0xFF <<
(intfnum * 8));
}
mask >>= 1;
intfnum++;
@ -530,24 +543,13 @@ static int msm_ispif_subdev_video_s_stream(struct v4l2_subdev *sd,
return rc;
}
static void send_rdi_sof(struct ispif_device *ispif,
enum msm_ispif_intftype interface, int count)
{
struct rdi_count_msg sof_msg;
sof_msg.rdi_interface = interface;
sof_msg.count = count;
v4l2_subdev_notify(&ispif->subdev, NOTIFY_AXI_RDI_SOF_COUNT,
(void *)&sof_msg);
}
static void ispif_do_tasklet(unsigned long data)
{
unsigned long flags;
struct ispif_isr_queue_cmd *qcmd = NULL;
struct ispif_device *ispif;
CDBG("=== ispif_do_tasklet start ===\n");
ispif = (struct ispif_device *)data;
while (atomic_read(&ispif_irq_cnt)) {
spin_lock_irqsave(&ispif_tasklet_lock, flags);
qcmd = list_first_entry(&ispif_tasklet_q,
@ -562,17 +564,28 @@ static void ispif_do_tasklet(unsigned long data)
list_del(&qcmd->list);
spin_unlock_irqrestore(&ispif_tasklet_lock,
flags);
if (qcmd->ispifInterruptStatus0 &
ISPIF_IRQ_STATUS_RDI_SOF_MASK) {
CDBG("ispif rdi irq status\n");
}
if (qcmd->ispifInterruptStatus1 &
ISPIF_IRQ_STATUS_RDI_SOF_MASK) {
CDBG("ispif rdi1 irq status\n");
}
kfree(qcmd);
}
CDBG("=== ispif_do_tasklet end ===\n");
}
DECLARE_TASKLET(ispif_tasklet, ispif_do_tasklet, 0);
static void ispif_process_irq(struct ispif_device *ispif,
struct ispif_irq_status *out)
{
unsigned long flags;
struct ispif_isr_queue_cmd *qcmd;
CDBG("ispif_process_irq\n");
qcmd = kzalloc(sizeof(struct ispif_isr_queue_cmd),
GFP_ATOMIC);
if (!qcmd) {
@ -581,37 +594,12 @@ static void ispif_process_irq(struct ispif_device *ispif,
}
qcmd->ispifInterruptStatus0 = out->ispifIrqStatus0;
qcmd->ispifInterruptStatus1 = out->ispifIrqStatus1;
qcmd->ispifInterruptStatus2 = out->ispifIrqStatus2;
if (qcmd->ispifInterruptStatus0 &
ISPIF_IRQ_STATUS_PIX_SOF_MASK) {
CDBG("%s: ispif PIX irq status\n", __func__);
ispif->pix_sof_count++;
v4l2_subdev_notify(&ispif->subdev,
NOTIFY_VFE_PIX_SOF_COUNT,
(void *)&ispif->pix_sof_count);
}
if (qcmd->ispifInterruptStatus0 &
ISPIF_IRQ_STATUS_RDI0_SOF_MASK) {
ispif->rdi0_sof_count++;
CDBG("%s: ispif RDI0 irq status, counter = %d",
__func__, ispif->rdi0_sof_count);
send_rdi_sof(ispif, RDI_0, ispif->rdi0_sof_count);
}
if (qcmd->ispifInterruptStatus1 &
ISPIF_IRQ_STATUS_RDI1_SOF_MASK) {
ispif->rdi1_sof_count++;
CDBG("%s: ispif RDI1 irq status, counter = %d",
__func__, ispif->rdi1_sof_count);
send_rdi_sof(ispif, RDI_1, ispif->rdi1_sof_count);
}
if (qcmd->ispifInterruptStatus2 &
ISPIF_IRQ_STATUS_RDI2_SOF_MASK) {
ispif->rdi2_sof_count++;
CDBG("%s: ispif RDI2 irq status, counter = %d",
__func__, ispif->rdi2_sof_count);
send_rdi_sof(ispif, RDI_2, ispif->rdi2_sof_count);
if (qcmd->ispifInterruptStatus0 & ISPIF_IRQ_STATUS_PIX_SOF_MASK) {
CDBG("%s: ispif PIX sof irq\n", __func__);
ispif->pix_sof_count++;
v4l2_subdev_notify(&ispif->subdev, NOTIFY_VFE_SOF_COUNT,
(void *)&ispif->pix_sof_count);
}
spin_lock_irqsave(&ispif_tasklet_lock, flags);
@ -619,64 +607,37 @@ static void ispif_process_irq(struct ispif_device *ispif,
atomic_add(1, &ispif_irq_cnt);
spin_unlock_irqrestore(&ispif_tasklet_lock, flags);
tasklet_schedule(&ispif->ispif_tasklet);
tasklet_schedule(&ispif_tasklet);
return;
}
static inline void msm_ispif_read_irq_status(struct ispif_irq_status *out,
void *data)
{
uint32_t status0 = 0, status1 = 0, status2 = 0;
struct ispif_device *ispif = (struct ispif_device *)data;
out->ispifIrqStatus0 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_ADDR);
out->ispifIrqStatus1 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_1_ADDR);
out->ispifIrqStatus2 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_2_ADDR);
msm_camera_io_w(out->ispifIrqStatus0,
ispif->base + ISPIF_IRQ_CLEAR_ADDR);
msm_camera_io_w(out->ispifIrqStatus1,
ispif->base + ISPIF_IRQ_CLEAR_1_ADDR);
msm_camera_io_w(out->ispifIrqStatus2,
ispif->base + ISPIF_IRQ_CLEAR_2_ADDR);
CDBG("%s: irq vfe0 Irq_status0 = 0x%x, 1 = 0x%x, 2 = 0x%x\n",
__func__, out->ispifIrqStatus0, out->ispifIrqStatus1,
out->ispifIrqStatus2);
if (out->ispifIrqStatus0 & ISPIF_IRQ_STATUS_MASK ||
out->ispifIrqStatus1 & ISPIF_IRQ_STATUS_1_MASK ||
out->ispifIrqStatus2 & ISPIF_IRQ_STATUS_2_MASK) {
CDBG("%s: irq ispif->irq: Irq_status0 = 0x%x\n", __func__,
out->ispifIrqStatus0);
if (out->ispifIrqStatus0 & ISPIF_IRQ_STATUS_MASK) {
if (out->ispifIrqStatus0 & (0x1 << RESET_DONE_IRQ))
complete(&ispif->reset_complete);
if (out->ispifIrqStatus0 & (0x1 << PIX_INTF_0_OVERFLOW_IRQ))
pr_err("%s: pix intf 0 overflow.\n", __func__);
if (out->ispifIrqStatus0 & (0x1 << RAW_INTF_0_OVERFLOW_IRQ))
pr_err("%s: rdi intf 0 overflow.\n", __func__);
if (out->ispifIrqStatus1 & (0x1 << RAW_INTF_1_OVERFLOW_IRQ))
pr_err("%s: rdi intf 1 overflow.\n", __func__);
if (out->ispifIrqStatus2 & (0x1 << RAW_INTF_2_OVERFLOW_IRQ))
pr_err("%s: rdi intf 2 overflow.\n", __func__);
if ((out->ispifIrqStatus0 & ISPIF_IRQ_STATUS_SOF_MASK) ||
(out->ispifIrqStatus1 & ISPIF_IRQ_STATUS_SOF_MASK) ||
(out->ispifIrqStatus2 & ISPIF_IRQ_STATUS_RDI2_SOF_MASK))
(out->ispifIrqStatus1 &
ISPIF_IRQ_STATUS_SOF_MASK)) {
ispif_process_irq(ispif, out);
}
if (ispif->csid_version == CSID_VERSION_V3) {
status0 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_ADDR + 0x200);
msm_camera_io_w(status0,
ispif->base + ISPIF_IRQ_CLEAR_ADDR + 0x200);
status1 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_1_ADDR + 0x200);
msm_camera_io_w(status1,
ispif->base + ISPIF_IRQ_CLEAR_1_ADDR + 0x200);
status2 = msm_camera_io_r(ispif->base +
ISPIF_IRQ_STATUS_2_ADDR + 0x200);
msm_camera_io_w(status2,
ispif->base + ISPIF_IRQ_CLEAR_2_ADDR + 0x200);
CDBG("%s: irq vfe1 Irq_status0 = 0x%x, 1 = 0x%x, 2 = 0x%x\n",
__func__, status0, status1, status2);
}
}
msm_camera_io_w(ISPIF_IRQ_GLOBAL_CLEAR_CMD, ispif->base +
ISPIF_IRQ_GLOBAL_CLEAR_CMD_ADDR);
@ -689,7 +650,7 @@ static irqreturn_t msm_io_ispif_irq(int irq_num, void *data)
return IRQ_HANDLED;
}
static struct msm_cam_clk_info ispif_8960_clk_info[] = {
static struct msm_cam_clk_info ispif_clk_info[] = {
{"csi_pix_clk", 0},
{"csi_rdi_clk", 0},
{"csi_pix1_clk", 0},
@ -702,61 +663,40 @@ static int msm_ispif_init(struct ispif_device *ispif,
{
int rc = 0;
CDBG("%s called %d\n", __func__, __LINE__);
if (ispif->ispif_state == ISPIF_POWER_UP) {
pr_err("%s: ispif invalid state %d\n", __func__,
ispif->ispif_state);
rc = -EINVAL;
return rc;
}
spin_lock_init(&ispif_tasklet_lock);
INIT_LIST_HEAD(&ispif_tasklet_q);
rc = request_irq(ispif->irq->start, msm_io_ispif_irq,
IRQF_TRIGGER_RISING, "ispif", ispif);
ispif->global_intf_cmd_mask = 0xFFFFFFFF;
init_completion(&ispif->reset_complete);
tasklet_init(&ispif->ispif_tasklet,
ispif_do_tasklet, (unsigned long)ispif);
ispif->csid_version = *csid_version;
if (ispif->csid_version < CSID_VERSION_V2) {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_8960_clk_info,
ispif->ispif_clk, 2, 1);
if (ispif->csid_version >= CSID_VERSION_V2) {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 1);
if (rc < 0)
return rc;
} else if (ispif->csid_version == CSID_VERSION_V2) {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_8960_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_8960_clk_info), 1);
} else {
rc = msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, 2, 1);
if (rc < 0)
return rc;
}
rc = msm_ispif_reset(ispif);
ispif->ispif_state = ISPIF_POWER_UP;
return rc;
}
static void msm_ispif_release(struct ispif_device *ispif)
{
if (ispif->ispif_state != ISPIF_POWER_UP) {
pr_err("%s: ispif invalid state %d\n", __func__,
ispif->ispif_state);
return;
}
CDBG("%s, free_irq\n", __func__);
free_irq(ispif->irq->start, ispif);
tasklet_kill(&ispif->ispif_tasklet);
tasklet_kill(&ispif_tasklet);
if (ispif->csid_version < CSID_VERSION_V2) {
msm_cam_clk_enable(&ispif->pdev->dev, ispif_8960_clk_info,
if (ispif->csid_version == CSID_VERSION_V2)
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_clk_info), 0);
else
msm_cam_clk_enable(&ispif->pdev->dev, ispif_clk_info,
ispif->ispif_clk, 2, 0);
} else if (ispif->csid_version == CSID_VERSION_V2) {
msm_cam_clk_enable(&ispif->pdev->dev, ispif_8960_clk_info,
ispif->ispif_clk, ARRAY_SIZE(ispif_8960_clk_info), 0);
}
ispif->ispif_state = ISPIF_POWER_DOWN;
}
static long msm_ispif_cmd(struct v4l2_subdev *sd, void *arg)
@ -893,7 +833,6 @@ static int __devinit ispif_probe(struct platform_device *pdev)
ispif->subdev.entity.group_id = ISPIF_DEV;
ispif->subdev.entity.name = pdev->name;
ispif->subdev.entity.revision = ispif->subdev.devnode->num;
ispif->ispif_state = ISPIF_POWER_DOWN;
return 0;
ispif_no_mem:

13
drivers/media/video/msm/csi/msm_ispif.h Executable file → Normal file
View file

@ -20,12 +20,6 @@
struct ispif_irq_status {
uint32_t ispifIrqStatus0;
uint32_t ispifIrqStatus1;
uint32_t ispifIrqStatus2;
};
enum msm_ispif_state_t {
ISPIF_POWER_UP,
ISPIF_POWER_DOWN,
};
struct ispif_device {
@ -41,19 +35,12 @@ struct ispif_device {
uint32_t csid_version;
struct clk *ispif_clk[5];
uint32_t pix_sof_count;
uint32_t rdi0_sof_count;
uint32_t rdi1_sof_count;
uint32_t rdi2_sof_count;
uint32_t global_intf_cmd_mask;
struct tasklet_struct ispif_tasklet;
enum msm_ispif_state_t ispif_state;
};
struct ispif_isr_queue_cmd {
struct list_head list;
uint32_t ispifInterruptStatus0;
uint32_t ispifInterruptStatus1;
uint32_t ispifInterruptStatus2;
};
#define VIDIOC_MSM_ISPIF_CFG \

0
drivers/media/video/msm/eeprom/Makefile Executable file → Normal file
View file

5
drivers/media/video/msm/eeprom/imx074_eeprom.c Executable file → Normal file
View file

@ -47,15 +47,14 @@ static struct v4l2_subdev_ops imx074_eeprom_subdev_ops = {
.core = &imx074_eeprom_subdev_core_ops,
};
static uint8_t imx074_wbcalib_data[6];
static struct msm_calib_wb imx074_wb_data;
uint8_t imx074_wbcalib_data[6];
struct msm_calib_wb imx074_wb_data;
static struct msm_camera_eeprom_info_t imx074_calib_supp_info = {
{FALSE, 0, 0, 1},
{TRUE, 6, 0, 1024},
{FALSE, 0, 0, 1},
{FALSE, 0, 0, 1},
{FALSE, 0, 0, 1},
};
static struct msm_camera_eeprom_read_t imx074_eeprom_read_tbl[] = {

9
drivers/media/video/msm/eeprom/imx091_eeprom.c Executable file → Normal file
View file

@ -47,17 +47,16 @@ static struct v4l2_subdev_ops imx091_eeprom_subdev_ops = {
.core = &imx091_eeprom_subdev_core_ops,
};
static uint8_t imx091_wbcalib_data[6];
static uint8_t imx091_afcalib_data[6];
static struct msm_calib_wb imx091_wb_data;
static struct msm_calib_af imx091_af_data;
uint8_t imx091_wbcalib_data[6];
uint8_t imx091_afcalib_data[6];
struct msm_calib_wb imx091_wb_data;
struct msm_calib_af imx091_af_data;
static struct msm_camera_eeprom_info_t imx091_calib_supp_info = {
{TRUE, 6, 1, 1},
{TRUE, 6, 0, 32768},
{FALSE, 0, 0, 1},
{FALSE, 0, 0, 1},
{FALSE, 0, 0, 1},
};
static struct msm_camera_eeprom_read_t imx091_eeprom_read_tbl[] = {

0
drivers/media/video/msm/eeprom/msm_camera_eeprom.c Executable file → Normal file
View file

0
drivers/media/video/msm/eeprom/msm_camera_eeprom.h Executable file → Normal file
View file

22
drivers/media/video/msm/flash.c Executable file → Normal file
View file

@ -26,12 +26,19 @@
struct i2c_client *sx150x_client;
struct timer_list timer_flash;
static struct msm_camera_sensor_info *sensor_data;
#if defined(CONFIG_MSM_CAMERA_FLASH_SC628A) || defined(CONFIG_MSM_CAMERA_FLASH_TPS61310)
static struct msm_camera_i2c_client i2c_client;
#endif
enum msm_cam_flash_stat{
MSM_CAM_FLASH_OFF,
MSM_CAM_FLASH_ON,
};
#ifdef CONFIG_MSM_CAMERA_FLASH_LM3559
extern int lm3559_flash_set_led_state(int state);
#endif
#ifdef CONFIG_MSM_CAMERA_FLASH_SC628A
static struct i2c_client *sc628a_client;
static const struct i2c_device_id sc628a_i2c_id[] = {
@ -68,7 +75,9 @@ static struct i2c_driver sc628a_i2c_driver = {
.name = "sc628a",
},
};
#endif
#ifdef CONFIG_MSM_CAMERA_FLASH_TPS61310
static struct i2c_client *tps61310_client;
static const struct i2c_device_id tps61310_i2c_id[] = {
@ -113,6 +122,7 @@ static struct i2c_driver tps61310_i2c_driver = {
.name = "tps61310",
},
};
#endif
static int config_flash_gpio_table(enum msm_cam_flash_stat stat,
struct msm_camera_sensor_strobe_flash_data *sfdata)
@ -283,6 +293,7 @@ int msm_camera_flash_external(
{
int rc = 0;
#ifdef CONFIG_MSM_CAMERA_FLASH_SC628A
switch (led_state) {
case MSM_CAMERA_LED_INIT:
@ -449,6 +460,8 @@ error:
rc = -EFAULT;
break;
}
#endif
return rc;
}
@ -748,9 +761,14 @@ int msm_flash_ctrl(struct msm_camera_sensor_info *sdata,
sensor_data = sdata;
switch (flash_info->flashtype) {
case LED_FLASH:
#ifdef CONFIG_MSM_CAMERA_FLASH_LM3559
rc = lm3559_flash_set_led_state(flash_info->ctrl_data.led_state);
#else
rc = msm_camera_flash_set_led_state(sdata->flash_data,
flash_info->ctrl_data.led_state);
break;
flash_info->ctrl_data.led_state);
#endif
break;
case STROBE_FLASH:
rc = msm_strobe_flash_ctrl(sdata->strobe_flash_data,
&(flash_info->ctrl_data.strobe_ctrl));

0
drivers/media/video/msm/gemini/Makefile Executable file → Normal file
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0
drivers/media/video/msm/gemini/msm_gemini_common.h Executable file → Normal file
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0
drivers/media/video/msm/gemini/msm_gemini_core.c Executable file → Normal file
View file

0
drivers/media/video/msm/gemini/msm_gemini_core.h Executable file → Normal file
View file

0
drivers/media/video/msm/gemini/msm_gemini_dev.c Executable file → Normal file
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0
drivers/media/video/msm/gemini/msm_gemini_hw.c Executable file → Normal file
View file

2
drivers/media/video/msm/gemini/msm_gemini_hw.h Executable file → Normal file
View file

@ -15,7 +15,7 @@
#include <media/msm_gemini.h>
#include "msm_gemini_hw_reg.h"
#include <linux/msm_ion.h>
#include <linux/ion.h>
#include <mach/iommu_domains.h>
struct msm_gemini_hw_buf {

0
drivers/media/video/msm/gemini/msm_gemini_hw_reg.h Executable file → Normal file
View file

0
drivers/media/video/msm/gemini/msm_gemini_platform.c Executable file → Normal file
View file

2
drivers/media/video/msm/gemini/msm_gemini_platform.h Executable file → Normal file
View file

@ -15,7 +15,7 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/msm_ion.h>
#include <linux/ion.h>
#include <linux/iommu.h>
void msm_gemini_platform_p2v(struct file *file,
struct ion_handle **ionhandle);

0
drivers/media/video/msm/gemini/msm_gemini_sync.c Executable file → Normal file
View file

0
drivers/media/video/msm/gemini/msm_gemini_sync.h Executable file → Normal file
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0
drivers/media/video/msm/imx072.c Executable file → Normal file
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0
drivers/media/video/msm/imx072.h Executable file → Normal file
View file

0
drivers/media/video/msm/imx072_reg.c Executable file → Normal file
View file

0
drivers/media/video/msm/imx074.c Executable file → Normal file
View file

0
drivers/media/video/msm/imx074.h Executable file → Normal file
View file

0
drivers/media/video/msm/imx074_reg.c Executable file → Normal file
View file

0
drivers/media/video/msm/io/Makefile Executable file → Normal file
View file

35
drivers/media/video/msm/io/msm_camera_i2c.c Executable file → Normal file
View file

@ -84,7 +84,6 @@ int32_t msm_camera_i2c_write(struct msm_camera_i2c_client *client,
cci_ctrl.cci_info = client->cci_client;
cci_ctrl.cfg.cci_i2c_write_cfg.reg_conf_tbl = &reg_conf_tbl;
cci_ctrl.cfg.cci_i2c_write_cfg.data_type = data_type;
cci_ctrl.cfg.cci_i2c_write_cfg.addr_type = client->addr_type;
cci_ctrl.cfg.cci_i2c_write_cfg.size = 1;
rc = v4l2_subdev_call(client->cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);
@ -337,39 +336,6 @@ int32_t msm_camera_i2c_write_table_w_microdelay(
return rc;
}
int32_t msm_camera_i2c_write_bayer_table(
struct msm_camera_i2c_client *client,
struct msm_camera_i2c_reg_setting *write_setting)
{
int i;
int32_t rc = -EFAULT;
struct msm_camera_i2c_reg_array *reg_setting;
if (!client || !write_setting)
return rc;
reg_setting = write_setting->reg_setting;
client->addr_type = write_setting->addr_type;
if ((write_setting->addr_type != MSM_CAMERA_I2C_BYTE_ADDR
&& write_setting->addr_type != MSM_CAMERA_I2C_WORD_ADDR)
|| (write_setting->data_type != MSM_CAMERA_I2C_BYTE_DATA
&& write_setting->data_type != MSM_CAMERA_I2C_WORD_DATA))
return rc;
for (i = 0; i < write_setting->size; i++) {
rc = msm_camera_i2c_write(client, reg_setting->reg_addr,
reg_setting->reg_data, write_setting->data_type);
if (rc < 0)
break;
reg_setting++;
}
if (write_setting->delay > 20)
msleep(write_setting->delay);
else if (write_setting->delay)
usleep_range(write_setting->delay * 1000, (write_setting->delay
* 1000) + 1000);
return rc;
}
int32_t msm_camera_i2c_write_tbl(struct msm_camera_i2c_client *client,
struct msm_camera_i2c_reg_conf *reg_conf_tbl, uint16_t size,
enum msm_camera_i2c_data_type data_type)
@ -382,7 +348,6 @@ int32_t msm_camera_i2c_write_tbl(struct msm_camera_i2c_client *client,
cci_ctrl.cci_info = client->cci_client;
cci_ctrl.cfg.cci_i2c_write_cfg.reg_conf_tbl = reg_conf_tbl;
cci_ctrl.cfg.cci_i2c_write_cfg.data_type = data_type;
cci_ctrl.cfg.cci_i2c_write_cfg.addr_type = client->addr_type;
cci_ctrl.cfg.cci_i2c_write_cfg.size = size;
rc = v4l2_subdev_call(client->cci_client->cci_subdev,
core, ioctl, VIDIOC_MSM_CCI_CFG, &cci_ctrl);

5
drivers/media/video/msm/io/msm_camera_i2c.h Executable file → Normal file
View file

@ -17,7 +17,6 @@
#include <linux/delay.h>
#include <mach/camera.h>
#include <media/v4l2-subdev.h>
#include <media/msm_camera.h>
#define CONFIG_MSM_CAMERA_I2C_DBG 0
@ -93,10 +92,6 @@ int32_t msm_camera_i2c_write_table_w_microdelay(
struct msm_camera_i2c_reg_tbl *reg_tbl, uint16_t size,
enum msm_camera_i2c_data_type data_type);
int32_t msm_camera_i2c_write_bayer_table(
struct msm_camera_i2c_client *client,
struct msm_camera_i2c_reg_setting *write_setting);
int32_t msm_camera_i2c_write_tbl(struct msm_camera_i2c_client *client,
struct msm_camera_i2c_reg_conf *reg_conf_tbl, uint16_t size,
enum msm_camera_i2c_data_type data_type);

2
drivers/media/video/msm/io/msm_camera_i2c_mux.c Executable file → Normal file
View file

@ -160,7 +160,7 @@ static int __devinit i2c_mux_probe(struct platform_device *pdev)
i2c_mux_no_resource:
mutex_destroy(&mux_device->mutex);
kfree(mux_device);
return rc;
return 0;
}
static struct platform_driver i2c_mux_driver = {

0
drivers/media/video/msm/io/msm_camera_i2c_mux.h Executable file → Normal file
View file

182
drivers/media/video/msm/io/msm_camera_io_util.c Executable file → Normal file
View file

@ -20,7 +20,6 @@
#include <mach/gpiomux.h>
#define BUFF_SIZE_128 128
static int gpio_ref_count;
void msm_camera_io_w(u32 data, void __iomem *addr)
{
@ -134,12 +133,6 @@ int msm_cam_clk_enable(struct device *dev, struct msm_cam_clk_info *clk_info,
clk_info[i].clk_name);
goto cam_clk_enable_err;
}
if (clk_info[i].delay > 20) {
msleep(clk_info[i].delay);
} else if (clk_info[i].delay) {
usleep_range(clk_info[i].delay * 1000,
(clk_info[i].delay * 1000) + 1000);
}
}
} else {
for (i = num_clk - 1; i >= 0; i--) {
@ -170,41 +163,26 @@ cam_clk_get_err:
}
int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int config)
int num_vreg, struct regulator **reg_ptr, int config)
{
int i = 0, j = 0;
int i = 0;
int rc = 0;
struct camera_vreg_t *curr_vreg;
if (num_vreg_seq > num_vreg) {
pr_err("%s:%d vreg sequence invalid\n", __func__, __LINE__);
return -EINVAL;
}
if (!num_vreg_seq)
num_vreg_seq = num_vreg;
if (config) {
for (i = 0; i < num_vreg_seq; i++) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
curr_vreg = &cam_vreg[j];
reg_ptr[j] = regulator_get(dev,
for (i = 0; i < num_vreg; i++) {
curr_vreg = &cam_vreg[i];
reg_ptr[i] = regulator_get(dev,
curr_vreg->reg_name);
if (IS_ERR(reg_ptr[j])) {
if (IS_ERR(reg_ptr[i])) {
pr_err("%s: %s get failed\n",
__func__,
curr_vreg->reg_name);
reg_ptr[j] = NULL;
reg_ptr[i] = NULL;
goto vreg_get_fail;
}
if (curr_vreg->type == REG_LDO) {
rc = regulator_set_voltage(
reg_ptr[j],
reg_ptr[i],
curr_vreg->min_voltage,
curr_vreg->max_voltage);
if (rc < 0) {
@ -215,7 +193,7 @@ int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
}
if (curr_vreg->op_mode >= 0) {
rc = regulator_set_optimum_mode(
reg_ptr[j],
reg_ptr[i],
curr_vreg->op_mode);
if (rc < 0) {
pr_err(
@ -228,26 +206,20 @@ int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
}
}
} else {
for (i = num_vreg_seq-1; i >= 0; i--) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
curr_vreg = &cam_vreg[j];
if (reg_ptr[j]) {
for (i = num_vreg-1; i >= 0; i--) {
curr_vreg = &cam_vreg[i];
if (reg_ptr[i]) {
if (curr_vreg->type == REG_LDO) {
if (curr_vreg->op_mode >= 0) {
regulator_set_optimum_mode(
reg_ptr[j], 0);
reg_ptr[i], 0);
}
regulator_set_voltage(
reg_ptr[j], 0, curr_vreg->
reg_ptr[i], 0, curr_vreg->
max_voltage);
}
regulator_put(reg_ptr[j]);
reg_ptr[j] = NULL;
regulator_put(reg_ptr[i]);
reg_ptr[i] = NULL;
}
}
}
@ -255,100 +227,52 @@ int msm_camera_config_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
vreg_unconfig:
if (curr_vreg->type == REG_LDO)
regulator_set_optimum_mode(reg_ptr[j], 0);
regulator_set_optimum_mode(reg_ptr[i], 0);
vreg_set_opt_mode_fail:
if (curr_vreg->type == REG_LDO)
regulator_set_voltage(reg_ptr[j], 0,
regulator_set_voltage(reg_ptr[i], 0,
curr_vreg->max_voltage);
vreg_set_voltage_fail:
regulator_put(reg_ptr[j]);
reg_ptr[j] = NULL;
regulator_put(reg_ptr[i]);
reg_ptr[i] = NULL;
vreg_get_fail:
for (i--; i >= 0; i--) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
curr_vreg = &cam_vreg[j];
curr_vreg = &cam_vreg[i];
goto vreg_unconfig;
}
return -ENODEV;
}
int msm_camera_enable_vreg(struct device *dev, struct camera_vreg_t *cam_vreg,
int num_vreg, enum msm_camera_vreg_name_t *vreg_seq,
int num_vreg_seq, struct regulator **reg_ptr, int enable)
int num_vreg, struct regulator **reg_ptr, int enable)
{
int i = 0, j = 0, rc = 0;
if (num_vreg_seq > num_vreg) {
pr_err("%s:%d vreg sequence invalid\n", __func__, __LINE__);
return -EINVAL;
}
if (!num_vreg_seq)
num_vreg_seq = num_vreg;
int i = 0, rc = 0;
if (enable) {
for (i = 0; i < num_vreg_seq; i++) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
if (IS_ERR(reg_ptr[j])) {
for (i = 0; i < num_vreg; i++) {
if (IS_ERR(reg_ptr[i])) {
pr_err("%s: %s null regulator\n",
__func__, cam_vreg[j].reg_name);
__func__, cam_vreg[i].reg_name);
goto disable_vreg;
}
rc = regulator_enable(reg_ptr[j]);
rc = regulator_enable(reg_ptr[i]);
if (rc < 0) {
pr_err("%s: %s enable failed\n",
__func__, cam_vreg[j].reg_name);
__func__, cam_vreg[i].reg_name);
goto disable_vreg;
}
if (cam_vreg[j].delay > 20)
msleep(cam_vreg[j].delay);
else if (cam_vreg[j].delay)
usleep_range(cam_vreg[j].delay * 1000,
(cam_vreg[j].delay * 1000) + 1000);
}
} else {
for (i = num_vreg_seq-1; i >= 0; i--) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
regulator_disable(reg_ptr[j]);
if (cam_vreg[j].delay > 20)
msleep(cam_vreg[j].delay);
else if (cam_vreg[j].delay)
usleep_range(cam_vreg[j].delay * 1000,
(cam_vreg[j].delay * 1000) + 1000);
}
for (i = num_vreg-1; i >= 0; i--)
regulator_disable(reg_ptr[i]);
}
return rc;
disable_vreg:
for (i--; i >= 0; i--) {
if (vreg_seq) {
j = vreg_seq[i];
if (j >= num_vreg)
continue;
} else
j = i;
regulator_disable(reg_ptr[j]);
if (cam_vreg[j].delay > 20)
msleep(cam_vreg[j].delay);
else if (cam_vreg[j].delay)
usleep_range(cam_vreg[j].delay * 1000,
(cam_vreg[j].delay * 1000) + 1000);
regulator_disable(reg_ptr[i]);
goto disable_vreg;
}
return rc;
}
@ -395,7 +319,7 @@ int msm_camera_request_gpio_table(struct msm_camera_sensor_info *sinfo,
config_gpio_table(gpio_conf);
if (gpio_en) {
if (!gpio_conf->gpio_no_mux && !gpio_ref_count) {
if (!gpio_conf->gpio_no_mux) {
if (gpio_conf->cam_gpiomux_conf_tbl != NULL) {
msm_gpiomux_install(
(struct msm_gpiomux_config *)
@ -410,7 +334,6 @@ int msm_camera_request_gpio_table(struct msm_camera_sensor_info *sinfo,
return rc;
}
}
gpio_ref_count++;
if (gpio_conf->cam_gpio_req_tbl_size) {
rc = gpio_request_array(gpio_conf->cam_gpio_req_tbl,
gpio_conf->cam_gpio_req_tbl_size);
@ -423,10 +346,9 @@ int msm_camera_request_gpio_table(struct msm_camera_sensor_info *sinfo,
}
}
} else {
gpio_ref_count--;
gpio_free_array(gpio_conf->cam_gpio_req_tbl,
gpio_conf->cam_gpio_req_tbl_size);
if (!gpio_conf->gpio_no_mux && !gpio_ref_count)
if (!gpio_conf->gpio_no_mux)
gpio_free_array(gpio_conf->cam_gpio_common_tbl,
gpio_conf->cam_gpio_common_tbl_size);
}
@ -458,39 +380,3 @@ int msm_camera_config_gpio_table(struct msm_camera_sensor_info *sinfo,
}
return rc;
}
void msm_camera_bus_scale_cfg(uint32_t bus_perf_client,
enum msm_bus_perf_setting perf_setting)
{
int rc = 0;
if (!bus_perf_client) {
pr_err("%s: Bus Client NOT Registered!!!\n", __func__);
return;
}
switch (perf_setting) {
case S_EXIT:
rc = msm_bus_scale_client_update_request(bus_perf_client, 1);
msm_bus_scale_unregister_client(bus_perf_client);
break;
case S_PREVIEW:
rc = msm_bus_scale_client_update_request(bus_perf_client, 1);
break;
case S_VIDEO:
rc = msm_bus_scale_client_update_request(bus_perf_client, 2);
break;
case S_CAPTURE:
rc = msm_bus_scale_client_update_request(bus_perf_client, 3);
break;
case S_ZSL:
rc = msm_bus_scale_client_update_request(bus_perf_client, 4);
break;
case S_LIVESHOT:
rc = msm_bus_scale_client_update_request(bus_perf_client, 5);
break;
case S_DEFAULT:
break;
default:
pr_warning("%s: INVALID CASE\n", __func__);
}
}

0
drivers/media/video/msm/io/msm_io7x.c Executable file → Normal file
View file

0
drivers/media/video/msm/io/msm_io8x.c Executable file → Normal file
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0
drivers/media/video/msm/io/msm_io_7x27a.c Executable file → Normal file
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0
drivers/media/video/msm/io/msm_io_7x27a_v4l2.c Executable file → Normal file
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8
drivers/media/video/msm/io/msm_io_8960.c Executable file → Normal file
View file

@ -95,14 +95,6 @@ void msm_camio_bus_scale_cfg(struct msm_bus_scale_pdata *cam_bus_scale_table,
} else
CDBG("%s: Bus Client NOT Registered!!!\n", __func__);
break;
case S_DUAL:
if (bus_perf_client) {
rc = msm_bus_scale_client_update_request(
bus_perf_client, 6);
CDBG("%s: S_DUAL rc = %d\n", __func__, rc);
} else
CDBG("%s: Bus Client NOT Registered!!!\n", __func__);
break;
case S_DEFAULT:
break;
default:

0
drivers/media/video/msm/io/msm_io_8x60.c Executable file → Normal file
View file

0
drivers/media/video/msm/io/msm_io_vfe31.c Executable file → Normal file
View file

0
drivers/media/video/msm/io/msm_io_vfe31_v4l2.c Executable file → Normal file
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3
drivers/media/video/msm/jpeg_10/Makefile
View file

@ -1,3 +0,0 @@
GCC_VERSION := $(shell $(CONFIG_SHELL) $(PWD)/scripts/gcc-version.sh $(CROSS_COMPILE)gcc)
ccflags-y += -Idrivers/media/video/msm
obj-$(CONFIG_MSM_JPEG) += msm_jpeg_dev.o msm_jpeg_sync.o msm_jpeg_core.o msm_jpeg_hw.o msm_jpeg_platform.o

38
drivers/media/video/msm/jpeg_10/msm_jpeg_common.h
View file

@ -1,38 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_COMMON_H
#define MSM_JPEG_COMMON_H
#ifdef MSM_JPEG_DEBUG
#define JPEG_DBG(fmt, args...) printk(fmt, ##args)
#else
#define JPEG_DBG(fmt, args...) do { } while (0)
#endif
#define JPEG_PR_ERR pr_err
enum JPEG_MODE {
JPEG_MODE_DISABLE,
JPEG_MODE_OFFLINE,
JPEG_MODE_REALTIME,
JPEG_MODE_REALTIME_ROTATION
};
enum JPEG_ROTATION {
JPEG_ROTATION_0,
JPEG_ROTATION_90,
JPEG_ROTATION_180,
JPEG_ROTATION_270
};
#endif /* MSM_JPEG_COMMON_H */

223
drivers/media/video/msm/jpeg_10/msm_jpeg_core.c
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@ -1,223 +0,0 @@
/* Copyright (c) 2012,The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/sched.h>
#include "msm_jpeg_hw.h"
#include "msm_jpeg_core.h"
#include "msm_jpeg_platform.h"
#include "msm_jpeg_common.h"
static struct msm_jpeg_hw_pingpong fe_pingpong_buf;
static struct msm_jpeg_hw_pingpong we_pingpong_buf;
static int we_pingpong_index;
static int reset_done_ack;
static spinlock_t reset_lock;
static wait_queue_head_t reset_wait;
int msm_jpeg_core_reset(uint8_t op_mode, void *base, int size)
{
unsigned long flags;
int rc = 0;
int tm = 500; /*500ms*/
memset(&fe_pingpong_buf, 0, sizeof(fe_pingpong_buf));
fe_pingpong_buf.is_fe = 1;
we_pingpong_index = 0;
memset(&we_pingpong_buf, 0, sizeof(we_pingpong_buf));
spin_lock_irqsave(&reset_lock, flags);
reset_done_ack = 0;
msm_jpeg_hw_reset(base, size);
spin_unlock_irqrestore(&reset_lock, flags);
rc = wait_event_interruptible_timeout(
reset_wait,
reset_done_ack,
msecs_to_jiffies(tm));
if (!reset_done_ack) {
JPEG_DBG("%s: reset ACK failed %d", __func__, rc);
return -EBUSY;
}
JPEG_DBG("%s: reset_done_ack rc %d", __func__, rc);
spin_lock_irqsave(&reset_lock, flags);
reset_done_ack = 0;
spin_unlock_irqrestore(&reset_lock, flags);
return 0;
}
void msm_jpeg_core_release(int release_buf, int domain_num)
{
int i = 0;
for (i = 0; i < 2; i++) {
if (we_pingpong_buf.buf_status[i] && release_buf)
msm_jpeg_platform_p2v(we_pingpong_buf.buf[i].file,
&we_pingpong_buf.buf[i].handle, domain_num);
we_pingpong_buf.buf_status[i] = 0;
}
}
void msm_jpeg_core_init(void)
{
init_waitqueue_head(&reset_wait);
spin_lock_init(&reset_lock);
}
int msm_jpeg_core_fe_start(void)
{
msm_jpeg_hw_fe_start();
return 0;
}
/* fetch engine */
int msm_jpeg_core_fe_buf_update(struct msm_jpeg_core_buf *buf)
{
JPEG_DBG("%s:%d] 0x%08x %d 0x%08x %d\n", __func__, __LINE__,
(int) buf->y_buffer_addr, buf->y_len,
(int) buf->cbcr_buffer_addr, buf->cbcr_len);
return msm_jpeg_hw_pingpong_update(&fe_pingpong_buf, buf);
}
void *msm_jpeg_core_fe_pingpong_irq(int jpeg_irq_status, void *context)
{
return msm_jpeg_hw_pingpong_irq(&fe_pingpong_buf);
}
/* write engine */
int msm_jpeg_core_we_buf_update(struct msm_jpeg_core_buf *buf)
{
JPEG_DBG("%s:%d] 0x%08x 0x%08x %d\n", __func__, __LINE__,
(int) buf->y_buffer_addr, (int) buf->cbcr_buffer_addr,
buf->y_len);
we_pingpong_buf.buf[0] = *buf;
we_pingpong_buf.buf_status[0] = 1;
msm_jpeg_hw_we_buffer_update(
&we_pingpong_buf.buf[0], 0);
return 0;
}
int msm_jpeg_core_we_buf_reset(struct msm_jpeg_hw_buf *buf)
{
int i = 0;
for (i = 0; i < 2; i++) {
if (we_pingpong_buf.buf[i].y_buffer_addr
== buf->y_buffer_addr)
we_pingpong_buf.buf_status[i] = 0;
}
return 0;
}
void *msm_jpeg_core_we_pingpong_irq(int jpeg_irq_status, void *context)
{
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return msm_jpeg_hw_pingpong_irq(&we_pingpong_buf);
}
void *msm_jpeg_core_framedone_irq(int jpeg_irq_status, void *context)
{
struct msm_jpeg_hw_buf *buf_p;
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
buf_p = msm_jpeg_hw_pingpong_active_buffer(&we_pingpong_buf);
if (buf_p) {
buf_p->framedone_len = msm_jpeg_hw_encode_output_size();
JPEG_DBG("%s:%d] framedone_len %d\n", __func__, __LINE__,
buf_p->framedone_len);
}
return buf_p;
}
void *msm_jpeg_core_reset_ack_irq(int jpeg_irq_status, void *context)
{
/* @todo return the status back to msm_jpeg_core_reset */
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return NULL;
}
void *msm_jpeg_core_err_irq(int jpeg_irq_status, void *context)
{
JPEG_PR_ERR("%s:%d]\n", __func__, jpeg_irq_status);
return NULL;
}
static int (*msm_jpeg_irq_handler) (int, void *, void *);
irqreturn_t msm_jpeg_core_irq(int irq_num, void *context)
{
void *data = NULL;
unsigned long flags;
int jpeg_irq_status;
JPEG_DBG("%s:%d] irq_num = %d\n", __func__, __LINE__, irq_num);
jpeg_irq_status = msm_jpeg_hw_irq_get_status();
JPEG_DBG("%s:%d] jpeg_irq_status = %0x\n", __func__, __LINE__,
jpeg_irq_status);
/*For reset and framedone IRQs, clear all bits*/
if (jpeg_irq_status & 0x10000000) {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
JPEG_IRQ_CLEAR_ALL);
} else if (jpeg_irq_status & 0x1) {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
JPEG_IRQ_CLEAR_ALL);
} else {
msm_jpeg_hw_irq_clear(JPEG_IRQ_CLEAR_BMSK,
jpeg_irq_status);
}
if (msm_jpeg_hw_irq_is_frame_done(jpeg_irq_status)) {
data = msm_jpeg_core_framedone_irq(jpeg_irq_status,
context);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(
MSM_JPEG_HW_MASK_COMP_FRAMEDONE,
context, data);
}
if (msm_jpeg_hw_irq_is_reset_ack(jpeg_irq_status)) {
data = msm_jpeg_core_reset_ack_irq(jpeg_irq_status,
context);
spin_lock_irqsave(&reset_lock, flags);
reset_done_ack = 1;
spin_unlock_irqrestore(&reset_lock, flags);
wake_up(&reset_wait);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(
MSM_JPEG_HW_MASK_COMP_RESET_ACK,
context, data);
}
/* Unexpected/unintended HW interrupt */
if (msm_jpeg_hw_irq_is_err(jpeg_irq_status)) {
data = msm_jpeg_core_err_irq(jpeg_irq_status, context);
if (msm_jpeg_irq_handler)
msm_jpeg_irq_handler(MSM_JPEG_HW_MASK_COMP_ERR,
context, data);
}
return IRQ_HANDLED;
}
void msm_jpeg_core_irq_install(int (*irq_handler) (int, void *, void *))
{
msm_jpeg_irq_handler = irq_handler;
}
void msm_jpeg_core_irq_remove(void)
{
msm_jpeg_irq_handler = NULL;
}

35
drivers/media/video/msm/jpeg_10/msm_jpeg_core.h
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@ -1,35 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_CORE_H
#define MSM_JPEG_CORE_H
#include <linux/interrupt.h>
#include "msm_jpeg_hw.h"
#define msm_jpeg_core_buf msm_jpeg_hw_buf
irqreturn_t msm_jpeg_core_irq(int irq_num, void *context);
void msm_jpeg_core_irq_install(int (*irq_handler) (int, void *, void *));
void msm_jpeg_core_irq_remove(void);
int msm_jpeg_core_fe_buf_update(struct msm_jpeg_core_buf *buf);
int msm_jpeg_core_we_buf_update(struct msm_jpeg_core_buf *buf);
int msm_jpeg_core_we_buf_reset(struct msm_jpeg_hw_buf *buf);
int msm_jpeg_core_reset(uint8_t op_mode, void *base, int size);
int msm_jpeg_core_fe_start(void);
void msm_jpeg_core_release(int, int);
void msm_jpeg_core_init(void);
#endif /* MSM_JPEG_CORE_H */

299
drivers/media/video/msm/jpeg_10/msm_jpeg_dev.c
View file

@ -1,299 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <mach/board.h>
#include <linux/of.h>
#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/uaccess.h>
#include <media/msm_jpeg.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#include "msm.h"
#include "msm_jpeg_sync.h"
#include "msm_jpeg_common.h"
#define MSM_JPEG_NAME "jpeg"
#define MSM_JPEGE1_NAME "jpege1"
#define MSM_JPEGD_NAME "jpegd"
static int msm_jpeg_open(struct inode *inode, struct file *filp)
{
int rc = 0;
struct msm_jpeg_device *pgmn_dev = container_of(inode->i_cdev,
struct msm_jpeg_device, cdev);
filp->private_data = pgmn_dev;
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
rc = __msm_jpeg_open(pgmn_dev);
JPEG_DBG(KERN_INFO "%s:%d] %s open_count = %d\n", __func__, __LINE__,
filp->f_path.dentry->d_name.name, pgmn_dev->open_count);
return rc;
}
static int msm_jpeg_release(struct inode *inode, struct file *filp)
{
int rc;
struct msm_jpeg_device *pgmn_dev = filp->private_data;
JPEG_DBG(KERN_INFO "%s:%d]\n", __func__, __LINE__);
rc = __msm_jpeg_release(pgmn_dev);
JPEG_DBG(KERN_INFO "%s:%d] %s open_count = %d\n", __func__, __LINE__,
filp->f_path.dentry->d_name.name, pgmn_dev->open_count);
return rc;
}
static long msm_jpeg_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg)
{
int rc;
struct msm_jpeg_device *pgmn_dev = filp->private_data;
JPEG_DBG("%s:%d] cmd=%d pgmn_dev=0x%x arg=0x%x\n", __func__,
__LINE__, _IOC_NR(cmd), (uint32_t)pgmn_dev, (uint32_t)arg);
rc = __msm_jpeg_ioctl(pgmn_dev, cmd, arg);
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return rc;
}
static const struct file_operations msm_jpeg_fops = {
.owner = THIS_MODULE,
.open = msm_jpeg_open,
.release = msm_jpeg_release,
.unlocked_ioctl = msm_jpeg_ioctl,
};
int msm_jpeg_subdev_init(struct v4l2_subdev *jpeg_sd)
{
int rc;
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *)jpeg_sd->host_priv;
JPEG_DBG("%s:%d: jpeg_sd=0x%x pgmn_dev=0x%x\n",
__func__, __LINE__, (uint32_t)jpeg_sd, (uint32_t)pgmn_dev);
rc = __msm_jpeg_open(pgmn_dev);
JPEG_DBG("%s:%d: rc=%d\n",
__func__, __LINE__, rc);
return rc;
}
static long msm_jpeg_subdev_ioctl(struct v4l2_subdev *sd,
unsigned int cmd, void *arg)
{
long rc;
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *)sd->host_priv;
JPEG_DBG("%s: cmd=%d\n", __func__, cmd);
JPEG_DBG("%s: pgmn_dev 0x%x", __func__, (uint32_t)pgmn_dev);
JPEG_DBG("%s: Calling __msm_jpeg_ioctl\n", __func__);
rc = __msm_jpeg_ioctl(pgmn_dev, cmd, (unsigned long)arg);
pr_debug("%s: X\n", __func__);
return rc;
}
void msm_jpeg_subdev_release(struct v4l2_subdev *jpeg_sd)
{
int rc;
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *)jpeg_sd->host_priv;
JPEG_DBG("%s:pgmn_dev=0x%x", __func__, (uint32_t)pgmn_dev);
rc = __msm_jpeg_release(pgmn_dev);
JPEG_DBG("%s:rc=%d", __func__, rc);
}
static const struct v4l2_subdev_core_ops msm_jpeg_subdev_core_ops = {
.ioctl = msm_jpeg_subdev_ioctl,
};
static const struct v4l2_subdev_ops msm_jpeg_subdev_ops = {
.core = &msm_jpeg_subdev_core_ops,
};
static int msm_jpeg_init_dev(struct platform_device *pdev)
{
int rc = -1;
struct device *dev;
struct msm_jpeg_device *msm_jpeg_device_p;
char devname[10];
msm_jpeg_device_p = kzalloc(sizeof(struct msm_jpeg_device), GFP_ATOMIC);
if (!msm_jpeg_device_p) {
JPEG_PR_ERR("%s: no mem\n", __func__);
return -EFAULT;
}
msm_jpeg_device_p->pdev = pdev;
if (pdev->dev.of_node)
of_property_read_u32((&pdev->dev)->of_node, "cell-index",
&pdev->id);
snprintf(devname, sizeof(devname), "%s%d", MSM_JPEG_NAME, pdev->id);
rc = __msm_jpeg_init(msm_jpeg_device_p);
if (rc < -1) {
JPEG_PR_ERR("%s: initialization failed\n", __func__);
goto fail;
}
v4l2_subdev_init(&msm_jpeg_device_p->subdev, &msm_jpeg_subdev_ops);
v4l2_set_subdev_hostdata(&msm_jpeg_device_p->subdev, msm_jpeg_device_p);
JPEG_DBG("%s: msm_jpeg_device_p 0x%x", __func__,
(uint32_t)msm_jpeg_device_p);
rc = alloc_chrdev_region(&msm_jpeg_device_p->msm_jpeg_devno, 0, 1,
devname);
if (rc < 0) {
JPEG_PR_ERR("%s: failed to allocate chrdev\n", __func__);
goto fail_1;
}
if (!msm_jpeg_device_p->msm_jpeg_class) {
msm_jpeg_device_p->msm_jpeg_class =
class_create(THIS_MODULE, devname);
if (IS_ERR(msm_jpeg_device_p->msm_jpeg_class)) {
rc = PTR_ERR(msm_jpeg_device_p->msm_jpeg_class);
JPEG_PR_ERR("%s: create device class failed\n",
__func__);
goto fail_2;
}
}
dev = device_create(msm_jpeg_device_p->msm_jpeg_class, NULL,
MKDEV(MAJOR(msm_jpeg_device_p->msm_jpeg_devno),
MINOR(msm_jpeg_device_p->msm_jpeg_devno)), NULL,
"%s%d", MSM_JPEG_NAME, pdev->id);
if (IS_ERR(dev)) {
JPEG_PR_ERR("%s: error creating device\n", __func__);
rc = -ENODEV;
goto fail_3;
}
cdev_init(&msm_jpeg_device_p->cdev, &msm_jpeg_fops);
msm_jpeg_device_p->cdev.owner = THIS_MODULE;
msm_jpeg_device_p->cdev.ops =
(const struct file_operations *) &msm_jpeg_fops;
rc = cdev_add(&msm_jpeg_device_p->cdev,
msm_jpeg_device_p->msm_jpeg_devno, 1);
if (rc < 0) {
JPEG_PR_ERR("%s: error adding cdev\n", __func__);
rc = -ENODEV;
goto fail_4;
}
platform_set_drvdata(pdev, &msm_jpeg_device_p);
JPEG_DBG("%s %s%d: success\n", __func__, MSM_JPEG_NAME, pdev->id);
return rc;
fail_4:
device_destroy(msm_jpeg_device_p->msm_jpeg_class,
msm_jpeg_device_p->msm_jpeg_devno);
fail_3:
class_destroy(msm_jpeg_device_p->msm_jpeg_class);
fail_2:
unregister_chrdev_region(msm_jpeg_device_p->msm_jpeg_devno, 1);
fail_1:
__msm_jpeg_exit(msm_jpeg_device_p);
fail:
kfree(msm_jpeg_device_p);
return rc;
}
static void msm_jpeg_exit(struct msm_jpeg_device *msm_jpeg_device_p)
{
cdev_del(&msm_jpeg_device_p->cdev);
device_destroy(msm_jpeg_device_p->msm_jpeg_class,
msm_jpeg_device_p->msm_jpeg_devno);
class_destroy(msm_jpeg_device_p->msm_jpeg_class);
unregister_chrdev_region(msm_jpeg_device_p->msm_jpeg_devno, 1);
__msm_jpeg_exit(msm_jpeg_device_p);
}
static int __msm_jpeg_probe(struct platform_device *pdev)
{
return msm_jpeg_init_dev(pdev);
}
static int __msm_jpeg_remove(struct platform_device *pdev)
{
struct msm_jpeg_device *msm_jpegd_device_p;
msm_jpegd_device_p = platform_get_drvdata(pdev);
if (msm_jpegd_device_p)
msm_jpeg_exit(msm_jpegd_device_p);
return 0;
}
static const struct of_device_id msm_jpeg_dt_match[] = {
{.compatible = "qcom,jpeg"},
};
MODULE_DEVICE_TABLE(of, msm_jpeg_dt_match);
static struct platform_driver msm_jpeg_driver = {
.probe = __msm_jpeg_probe,
.remove = __msm_jpeg_remove,
.driver = {
.name = MSM_JPEG_DRV_NAME,
.owner = THIS_MODULE,
.of_match_table = msm_jpeg_dt_match,
},
};
static int __init msm_jpeg_driver_init(void)
{
int rc;
rc = platform_driver_register(&msm_jpeg_driver);
return rc;
}
static void __exit msm_jpeg_driver_exit(void)
{
platform_driver_unregister(&msm_jpeg_driver);
}
MODULE_DESCRIPTION("msm jpeg jpeg driver");
module_init(msm_jpeg_driver_init);
module_exit(msm_jpeg_driver_exit);

380
drivers/media/video/msm/jpeg_10/msm_jpeg_hw.c
View file

@ -1,380 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/delay.h>
#include "msm_jpeg_hw.h"
#include "msm_jpeg_common.h"
#include <linux/io.h>
static void *jpeg_region_base;
static uint32_t jpeg_region_size;
int msm_jpeg_hw_pingpong_update(struct msm_jpeg_hw_pingpong *pingpong_hw,
struct msm_jpeg_hw_buf *buf)
{
int buf_free_index = -1;
if (!pingpong_hw->buf_status[0]) {
buf_free_index = 0;
} else if (!pingpong_hw->buf_status[1]) {
buf_free_index = 1;
} else {
JPEG_PR_ERR("%s:%d: pingpong buffer busy\n",
__func__, __LINE__);
return -EBUSY;
}
pingpong_hw->buf[buf_free_index] = *buf;
pingpong_hw->buf_status[buf_free_index] = 1;
if (pingpong_hw->is_fe) {
/* it is fe */
msm_jpeg_hw_fe_buffer_update(
&pingpong_hw->buf[buf_free_index], buf_free_index);
} else {
/* it is we */
msm_jpeg_hw_we_buffer_update(
&pingpong_hw->buf[buf_free_index], buf_free_index);
}
return 0;
}
void *msm_jpeg_hw_pingpong_irq(struct msm_jpeg_hw_pingpong *pingpong_hw)
{
struct msm_jpeg_hw_buf *buf_p = NULL;
if (pingpong_hw->buf_status[pingpong_hw->buf_active_index]) {
buf_p = &pingpong_hw->buf[pingpong_hw->buf_active_index];
pingpong_hw->buf_status[pingpong_hw->buf_active_index] = 0;
}
pingpong_hw->buf_active_index = !pingpong_hw->buf_active_index;
return (void *) buf_p;
}
void *msm_jpeg_hw_pingpong_active_buffer(
struct msm_jpeg_hw_pingpong *pingpong_hw)
{
struct msm_jpeg_hw_buf *buf_p = NULL;
if (pingpong_hw->buf_status[pingpong_hw->buf_active_index])
buf_p = &pingpong_hw->buf[pingpong_hw->buf_active_index];
return (void *) buf_p;
}
struct msm_jpeg_hw_cmd hw_cmd_irq_get_status[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_READ, 1, JPEG_IRQ_STATUS_ADDR,
JPEG_IRQ_STATUS_BMSK, {0} },
};
int msm_jpeg_hw_irq_get_status(void)
{
uint32_t n_irq_status = 0;
rmb();
n_irq_status = msm_jpeg_hw_read(&hw_cmd_irq_get_status[0]);
rmb();
return n_irq_status;
}
struct msm_jpeg_hw_cmd hw_cmd_encode_output_size[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_READ, 1,
JPEG_ENCODE_OUTPUT_SIZE_STATUS_ADDR,
JPEG_ENCODE_OUTPUT_SIZE_STATUS_BMSK, {0} } ,
};
long msm_jpeg_hw_encode_output_size(void)
{
uint32_t encode_output_size = 0;
encode_output_size = msm_jpeg_hw_read(&hw_cmd_encode_output_size[0]);
return encode_output_size;
}
struct msm_jpeg_hw_cmd hw_cmd_irq_clear[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_CLEAR_ADDR,
JPEG_IRQ_CLEAR_BMSK, {JPEG_IRQ_CLEAR_ALL} },
};
void msm_jpeg_hw_irq_clear(uint32_t mask, uint32_t data)
{
JPEG_DBG("%s:%d] mask %0x data %0x", __func__, __LINE__, mask, data);
hw_cmd_irq_clear[0].mask = mask;
hw_cmd_irq_clear[0].data = data;
msm_jpeg_hw_write(&hw_cmd_irq_clear[0]);
}
struct msm_jpeg_hw_cmd hw_cmd_fe_ping_update[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_MASK_ADDR,
JPEG_IRQ_MASK_BMSK, {JPEG_IRQ_ALLSOURCES_ENABLE} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_CMD_ADDR,
JPEG_CMD_BMSK, {JPEG_CMD_CLEAR_WRITE_PLN_QUEUES} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN0_RD_OFFSET_ADDR,
JPEG_PLN0_RD_OFFSET_BMSK, {0} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN0_RD_PNTR_ADDR,
JPEG_PLN0_RD_PNTR_BMSK, {0} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN1_RD_OFFSET_ADDR,
JPEG_PLN1_RD_OFFSET_BMSK, {0} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN1_RD_PNTR_ADDR,
JPEG_PLN1_RD_PNTR_BMSK, {0} },
};
void msm_jpeg_hw_fe_buffer_update(struct msm_jpeg_hw_buf *p_input,
uint8_t pingpong_index)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
if (pingpong_index == 0) {
hw_cmd_p = &hw_cmd_fe_ping_update[0];
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
hw_cmd_p->data = p_input->y_buffer_addr;
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
hw_cmd_p->data = p_input->cbcr_buffer_addr;
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
}
return;
}
struct msm_jpeg_hw_cmd hw_cmd_fe_start[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_CMD_ADDR,
JPEG_CMD_BMSK, {JPEG_OFFLINE_CMD_START} },
};
void msm_jpeg_hw_fe_start(void)
{
msm_jpeg_hw_write(&hw_cmd_fe_start[0]);
return;
}
struct msm_jpeg_hw_cmd hw_cmd_we_ping_update[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_PLN0_WR_PNTR_ADDR,
JPEG_PLN0_WR_PNTR_BMSK, {0} },
};
void msm_jpeg_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input,
uint8_t pingpong_index)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
if (pingpong_index == 0) {
hw_cmd_p = &hw_cmd_we_ping_update[0];
hw_cmd_p->data = p_input->y_buffer_addr;
JPEG_PR_ERR("%s Output buffer address is %x\n", __func__,
p_input->y_buffer_addr);
msm_jpeg_hw_write(hw_cmd_p++);
}
return;
}
struct msm_jpeg_hw_cmd hw_cmd_reset[] = {
/* type, repeat n times, offset, mask, data or pdata */
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_MASK_ADDR,
JPEG_IRQ_MASK_BMSK, {JPEG_IRQ_DISABLE_ALL} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_CLEAR_ADDR,
JPEG_IRQ_MASK_BMSK, {JPEG_IRQ_CLEAR_ALL} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_IRQ_MASK_ADDR,
JPEG_IRQ_MASK_BMSK, {JPEG_IRQ_ALLSOURCES_ENABLE} },
{MSM_JPEG_HW_CMD_TYPE_WRITE, 1, JPEG_RESET_CMD_ADDR,
JPEG_RESET_CMD_RMSK, {JPEG_RESET_DEFAULT} },
};
void msm_jpeg_hw_init(void *base, int size)
{
jpeg_region_base = base;
jpeg_region_size = size;
}
void msm_jpeg_hw_reset(void *base, int size)
{
struct msm_jpeg_hw_cmd *hw_cmd_p;
hw_cmd_p = &hw_cmd_reset[0];
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p++);
wmb();
msm_jpeg_hw_write(hw_cmd_p);
wmb();
return;
}
uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *hw_cmd_p)
{
uint32_t *paddr;
uint32_t data;
paddr = jpeg_region_base + hw_cmd_p->offset;
data = readl_relaxed(paddr);
data &= hw_cmd_p->mask;
return data;
}
void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p)
{
uint32_t *paddr;
uint32_t old_data, new_data;
paddr = jpeg_region_base + hw_cmd_p->offset;
if (hw_cmd_p->mask == 0xffffffff) {
old_data = 0;
} else {
old_data = readl_relaxed(paddr);
old_data &= ~hw_cmd_p->mask;
}
new_data = hw_cmd_p->data & hw_cmd_p->mask;
new_data |= old_data;
writel_relaxed(new_data, paddr);
}
int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us)
{
int tm = hw_cmd_p->n;
uint32_t data;
uint32_t wait_data = hw_cmd_p->data & hw_cmd_p->mask;
data = msm_jpeg_hw_read(hw_cmd_p);
if (data != wait_data) {
while (tm) {
udelay(m_us);
data = msm_jpeg_hw_read(hw_cmd_p);
if (data == wait_data)
break;
tm--;
}
}
hw_cmd_p->data = data;
return tm;
}
void msm_jpeg_hw_delay(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us)
{
int tm = hw_cmd_p->n;
while (tm) {
udelay(m_us);
tm--;
}
}
int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_cmds)
{
int is_copy_to_user = -1;
uint32_t data;
while (m_cmds--) {
if (hw_cmd_p->offset > jpeg_region_size) {
JPEG_PR_ERR("%s:%d] %d exceed hw region %d\n", __func__,
__LINE__, hw_cmd_p->offset, jpeg_region_size);
return -EFAULT;
}
switch (hw_cmd_p->type) {
case MSM_JPEG_HW_CMD_TYPE_READ:
hw_cmd_p->data = msm_jpeg_hw_read(hw_cmd_p);
is_copy_to_user = 1;
break;
case MSM_JPEG_HW_CMD_TYPE_WRITE:
msm_jpeg_hw_write(hw_cmd_p);
break;
case MSM_JPEG_HW_CMD_TYPE_WRITE_OR:
data = msm_jpeg_hw_read(hw_cmd_p);
hw_cmd_p->data = (hw_cmd_p->data & hw_cmd_p->mask) |
data;
msm_jpeg_hw_write(hw_cmd_p);
break;
case MSM_JPEG_HW_CMD_TYPE_UWAIT:
msm_jpeg_hw_wait(hw_cmd_p, 1);
break;
case MSM_JPEG_HW_CMD_TYPE_MWAIT:
msm_jpeg_hw_wait(hw_cmd_p, 1000);
break;
case MSM_JPEG_HW_CMD_TYPE_UDELAY:
msm_jpeg_hw_delay(hw_cmd_p, 1);
break;
case MSM_JPEG_HW_CMD_TYPE_MDELAY:
msm_jpeg_hw_delay(hw_cmd_p, 1000);
break;
default:
JPEG_PR_ERR("wrong hw command type\n");
break;
}
hw_cmd_p++;
}
return is_copy_to_user;
}
void msm_jpeg_io_dump(int size)
{
char line_str[128], *p_str;
void __iomem *addr = jpeg_region_base;
int i;
u32 *p = (u32 *) addr;
u32 data;
JPEG_PR_ERR("%s: %p %d reg_size %d\n", __func__, addr, size,
jpeg_region_size);
line_str[0] = '\0';
p_str = line_str;
for (i = 0; i < size/4; i++) {
if (i % 4 == 0) {
snprintf(p_str, 12, "%08x: ", (u32) p);
p_str += 10;
}
data = readl_relaxed(p++);
snprintf(p_str, 12, "%08x ", data);
p_str += 9;
if ((i + 1) % 4 == 0) {
JPEG_PR_ERR("%s\n", line_str);
line_str[0] = '\0';
p_str = line_str;
}
}
if (line_str[0] != '\0')
JPEG_PR_ERR("%s\n", line_str);
}

101
drivers/media/video/msm/jpeg_10/msm_jpeg_hw.h
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@ -1,101 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_HW_H
#define MSM_JPEG_HW_H
#include <media/msm_jpeg.h>
#include "msm_jpeg_hw_reg.h"
#include <linux/ion.h>
#include <mach/iommu_domains.h>
struct msm_jpeg_hw_buf {
struct msm_jpeg_buf vbuf;
struct file *file;
uint32_t framedone_len;
uint32_t y_buffer_addr;
uint32_t y_len;
uint32_t cbcr_buffer_addr;
uint32_t cbcr_len;
uint32_t num_of_mcu_rows;
struct ion_handle *handle;
};
struct msm_jpeg_hw_pingpong {
uint8_t is_fe; /* 1: fe; 0: we */
struct msm_jpeg_hw_buf buf[2];
int buf_status[2];
int buf_active_index;
};
int msm_jpeg_hw_pingpong_update(struct msm_jpeg_hw_pingpong *pingpong_hw,
struct msm_jpeg_hw_buf *buf);
void *msm_jpeg_hw_pingpong_irq(struct msm_jpeg_hw_pingpong *pingpong_hw);
void *msm_jpeg_hw_pingpong_active_buffer(struct msm_jpeg_hw_pingpong
*pingpong_hw);
void msm_jpeg_hw_irq_clear(uint32_t, uint32_t);
int msm_jpeg_hw_irq_get_status(void);
long msm_jpeg_hw_encode_output_size(void);
#define MSM_JPEG_HW_MASK_COMP_FRAMEDONE \
MSM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK
#define MSM_JPEG_HW_MASK_COMP_FE \
MSM_JPEG_HW_IRQ_STATUS_FE_RD_DONE_MASK
#define MSM_JPEG_HW_MASK_COMP_WE \
(MSM_JPEG_HW_IRQ_STATUS_WE_Y_PINGPONG_MASK | \
MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_PINGPONG_MASK)
#define MSM_JPEG_HW_MASK_COMP_RESET_ACK \
MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK
#define MSM_JPEG_HW_MASK_COMP_ERR \
(MSM_JPEG_HW_IRQ_STATUS_FE_RTOVF_MASK | \
MSM_JPEG_HW_IRQ_STATUS_FE_VFE_OVERFLOW_MASK | \
MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_MASK | \
MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_MASK | \
MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_MASK | \
MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_MASK | \
MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK | \
MSM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK)
#define msm_jpeg_hw_irq_is_frame_done(jpeg_irq_status) \
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_FRAMEDONE)
#define msm_jpeg_hw_irq_is_fe_pingpong(jpeg_irq_status) \
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_FE)
#define msm_jpeg_hw_irq_is_we_pingpong(jpeg_irq_status) \
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_WE)
#define msm_jpeg_hw_irq_is_reset_ack(jpeg_irq_status) \
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_RESET_ACK)
#define msm_jpeg_hw_irq_is_err(jpeg_irq_status) \
(jpeg_irq_status & MSM_JPEG_HW_MASK_COMP_ERR)
void msm_jpeg_hw_fe_buffer_update(struct msm_jpeg_hw_buf *p_input,
uint8_t pingpong_index);
void msm_jpeg_hw_we_buffer_update(struct msm_jpeg_hw_buf *p_input,
uint8_t pingpong_index);
void msm_jpeg_hw_we_buffer_cfg(uint8_t is_realtime);
void msm_jpeg_hw_fe_start(void);
void msm_jpeg_hw_clk_cfg(void);
void msm_jpeg_hw_reset(void *base, int size);
void msm_jpeg_hw_irq_cfg(void);
void msm_jpeg_hw_init(void *base, int size);
uint32_t msm_jpeg_hw_read(struct msm_jpeg_hw_cmd *hw_cmd_p);
void msm_jpeg_hw_write(struct msm_jpeg_hw_cmd *hw_cmd_p);
int msm_jpeg_hw_wait(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us);
void msm_jpeg_hw_delay(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_us);
int msm_jpeg_hw_exec_cmds(struct msm_jpeg_hw_cmd *hw_cmd_p, int m_cmds);
void msm_jpeg_hw_region_dump(int size);
void msm_jpeg_io_dump(int size);
#endif /* MSM_JPEG_HW_H */

121
drivers/media/video/msm/jpeg_10/msm_jpeg_hw_reg.h
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@ -1,121 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_HW_REG_H
#define MSM_JPEG_HW_REG_H
#define JPEG_REG_BASE 0
#define MSM_JPEG_HW_IRQ_MASK_ADDR 0x00000018
#define MSM_JPEG_HW_IRQ_MASK_RMSK 0xFFFFFFFF
#define MSM_JPEG_HW_IRQ_ENABLE 0xFFFFFFFF
#define MSM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK 0x00000001
#define MSM_JPEG_HW_IRQ_STATUS_FRAMEDONE_SHIFT 0x00000000
#define MSM_JPEG_HW_IRQ_STATUS_FE_RD_DONE_MASK 0x00000010
#define MSM_JPEG_HW_IRQ_STATUS_FE_RD_DONE_SHIFT 0x00000001
#define MSM_JPEG_HW_IRQ_STATUS_FE_RTOVF_MASK 0x00000004
#define MSM_JPEG_HW_IRQ_STATUS_FE_RTOVF_SHIFT 0x00000002
#define MSM_JPEG_HW_IRQ_STATUS_FE_VFE_OVERFLOW_MASK 0x00000008
#define MSM_JPEG_HW_IRQ_STATUS_FE_VFE_OVERFLOW_SHIFT 0x00000003
#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_PINGPONG_MASK 0x00000010
#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_PINGPONG_SHIFT 0x00000004
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_PINGPONG_MASK 0x00000020
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_PINGPONG_SHIFT 0x00000005
#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_MASK 0x00000040
#define MSM_JPEG_HW_IRQ_STATUS_WE_Y_BUFFER_OVERFLOW_SHIFT 0x00000006
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_MASK 0x00000080
#define MSM_JPEG_HW_IRQ_STATUS_WE_CBCR_BUFFER_OVERFLOW_SHIFT 0x00000007
#define MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_MASK 0x00000100
#define MSM_JPEG_HW_IRQ_STATUS_WE_CH0_DATAFIFO_OVERFLOW_SHIFT 0x00000008
#define MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_MASK 0x00000200
#define MSM_JPEG_HW_IRQ_STATUS_WE_CH1_DATAFIFO_OVERFLOW_SHIFT 0x00000009
#define MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK 0x10000000
#define MSM_JPEG_HW_IRQ_STATUS_RESET_ACK_SHIFT 0x0000000a
#define MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK 0x00000800
#define MSM_JPEG_HW_IRQ_STATUS_BUS_ERROR_SHIFT 0x0000000b
#define MSM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK 0x00001000
#define MSM_JPEG_HW_IRQ_STATUS_VIOLATION_SHIFT 0x0000000c
#define JPEG_OFFLINE_CMD_START 0x00000001
#define JPEG_RESET_DEFAULT 0x00000003 /* cfff? */
#define JPEG_IRQ_DISABLE_ALL 0x00000000
#define JPEG_IRQ_CLEAR_ALL 0xFFFFFFFF
#define JPEG_PLN0_RD_PNTR_ADDR (JPEG_REG_BASE + 0x00000038)
#define JPEG_PLN0_RD_PNTR_BMSK 0xFFFFFFFF
#define JPEG_PLN0_RD_OFFSET_ADDR 0x0000003C
#define JPEG_PLN0_RD_OFFSET_BMSK 0x1FFFFFFF
#define JPEG_PLN1_RD_PNTR_ADDR (JPEG_REG_BASE + 0x00000044)
#define JPEG_PLN1_RD_PNTR_BMSK 0xFFFFFFFF
#define JPEG_PLN1_RD_OFFSET_ADDR 0x00000048
#define JPEG_PLN1_RD_OFFSET_BMSK 0x1FFFFFFF
#define JPEG_CMD_ADDR (JPEG_REG_BASE + 0x00000010)
#define JPEG_CMD_BMSK 0x00000FFF
#define JPEG_CMD_CLEAR_WRITE_PLN_QUEUES 0x700
#define JPEG_PLN0_WR_PNTR_ADDR (JPEG_REG_BASE + 0x000000cc)
#define JPEG_PLN0_WR_PNTR_BMSK 0xFFFFFFFF
#define JPEG_PLN1_WR_PNTR_ADDR (JPEG_REG_BASE + 0x000000D0)
#define JPEG_PLN1_WR_PNTR_BMSK 0xFFFFFFFF
#define JPEG_IRQ_MASK_ADDR (JPEG_REG_BASE + 0x00000018)
#define JPEG_IRQ_MASK_BMSK 0xFFFFFFFF
#define JPEG_IRQ_ALLSOURCES_ENABLE 0xFFFFFFFF
#define JPEG_IRQ_CLEAR_ADDR (JPEG_REG_BASE + 0x0000001c)
#define JPEG_IRQ_CLEAR_BMSK 0xFFFFFFFF
#define JPEG_RESET_CMD_ADDR (JPEG_REG_BASE + 0x00000008)
#define JPEG_RESET_CMD_RMSK 0xFFFFFFFF
#define JPEG_IRQ_STATUS_ADDR (JPEG_REG_BASE + 0x00000020)
#define JPEG_IRQ_STATUS_BMSK 0xFFFFFFFF
#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_ADDR (JPEG_REG_BASE + 0x00000180)
#define JPEG_ENCODE_OUTPUT_SIZE_STATUS_BMSK 0x1FFFFFFF
#define VBIF_BASE_ADDRESS 0xFDA60000
#define VBIF_REGION_SIZE 0xC30
#define JPEG_VBIF_CLKON 0x4
#define JPEG_VBIF_IN_RD_LIM_CONF0 0xB0
#define JPEG_VBIF_IN_RD_LIM_CONF1 0xB4
#define JPEG_VBIF_IN_RD_LIM_CONF2 0xB8
#define JPEG_VBIF_IN_WR_LIM_CONF0 0xC0
#define JPEG_VBIF_IN_WR_LIM_CONF1 0xC4
#define JPEG_VBIF_IN_WR_LIM_CONF2 0xC8
#define JPEG_VBIF_OUT_RD_LIM_CONF0 0xD0
#define JPEG_VBIF_OUT_WR_LIM_CONF0 0xD4
#define JPEG_VBIF_DDR_OUT_MAX_BURST 0xD8
#define JPEG_VBIF_OCMEM_OUT_MAX_BURST 0xDC
#endif /* MSM_JPEG_HW_REG_H */

288
drivers/media/video/msm/jpeg_10/msm_jpeg_platform.c
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@ -1,288 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/pm_qos.h>
#include <linux/clk.h>
#include <mach/clk.h>
#include <linux/io.h>
#include <linux/android_pmem.h>
#include <mach/camera.h>
#include <mach/iommu_domains.h>
#include "msm_jpeg_platform.h"
#include "msm_jpeg_sync.h"
#include "msm_jpeg_common.h"
#include "msm_jpeg_hw.h"
/* AXI rate in KHz */
struct ion_client *jpeg_client;
static void *jpeg_vbif;
void msm_jpeg_platform_p2v(struct file *file,
struct ion_handle **ionhandle, int domain_num)
{
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
ion_unmap_iommu(jpeg_client, *ionhandle, domain_num, 0);
ion_free(jpeg_client, *ionhandle);
*ionhandle = NULL;
#elif CONFIG_ANDROID_PMEM
put_pmem_file(file);
#endif
}
uint32_t msm_jpeg_platform_v2p(int fd, uint32_t len, struct file **file_p,
struct ion_handle **ionhandle, int domain_num)
{
unsigned long paddr;
unsigned long size;
int rc;
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
*ionhandle = ion_import_dma_buf(jpeg_client, fd);
if (IS_ERR_OR_NULL(*ionhandle))
return 0;
rc = ion_map_iommu(jpeg_client, *ionhandle, domain_num, 0,
SZ_4K, 0, &paddr, (unsigned long *)&size, UNCACHED, 0);
JPEG_DBG("%s:%d] addr 0x%x size %ld", __func__, __LINE__,
(uint32_t)paddr, size);
#elif CONFIG_ANDROID_PMEM
unsigned long kvstart;
rc = get_pmem_file(fd, &paddr, &kvstart, &size, file_p);
#else
rc = 0;
paddr = 0;
size = 0;
#endif
if (rc < 0) {
JPEG_PR_ERR("%s: get_pmem_file fd %d error %d\n", __func__, fd,
rc);
goto error1;
}
/* validate user input */
if (len > size) {
JPEG_PR_ERR("%s: invalid offset + len\n", __func__);
goto error1;
}
return paddr;
error1:
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
ion_free(jpeg_client, *ionhandle);
#endif
return 0;
}
static struct msm_cam_clk_info jpeg_8x_clk_info[] = {
{"core_clk", 228570000},
{"iface_clk", -1},
{"bus_clk0", -1},
{"alt_bus_clk", -1},
{"camss_top_ahb_clk", -1},
};
static void set_vbif_params(void *jpeg_vbif_base)
{
writel_relaxed(0x1,
jpeg_vbif_base + JPEG_VBIF_CLKON);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_RD_LIM_CONF0);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_RD_LIM_CONF1);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_RD_LIM_CONF2);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_WR_LIM_CONF0);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_WR_LIM_CONF1);
writel_relaxed(0x10101010,
jpeg_vbif_base + JPEG_VBIF_IN_WR_LIM_CONF2);
writel_relaxed(0x00001010,
jpeg_vbif_base + JPEG_VBIF_OUT_RD_LIM_CONF0);
writel_relaxed(0x00001010,
jpeg_vbif_base + JPEG_VBIF_OUT_WR_LIM_CONF0);
writel_relaxed(0x00000707,
jpeg_vbif_base + JPEG_VBIF_DDR_OUT_MAX_BURST);
writel_relaxed(0x00000707,
jpeg_vbif_base + JPEG_VBIF_OCMEM_OUT_MAX_BURST);
}
int msm_jpeg_platform_init(struct platform_device *pdev,
struct resource **mem,
void **base,
int *irq,
irqreturn_t (*handler) (int, void *),
void *context)
{
int rc = -1;
int i = 0;
int jpeg_irq;
struct resource *jpeg_mem, *jpeg_io, *jpeg_irq_res;
void *jpeg_base;
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *) context;
jpeg_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!jpeg_mem) {
JPEG_PR_ERR("%s: no mem resource?\n", __func__);
return -ENODEV;
}
jpeg_irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!jpeg_irq_res) {
JPEG_PR_ERR("no irq resource?\n");
return -ENODEV;
}
jpeg_irq = jpeg_irq_res->start;
JPEG_DBG("%s base address: 0x%x, jpeg irq number: %d\n", __func__,
jpeg_mem->start, jpeg_irq);
jpeg_io = request_mem_region(jpeg_mem->start,
resource_size(jpeg_mem), pdev->name);
if (!jpeg_io) {
JPEG_PR_ERR("%s: region already claimed\n", __func__);
return -EBUSY;
}
jpeg_base = ioremap(jpeg_mem->start, resource_size(jpeg_mem));
if (!jpeg_base) {
rc = -ENOMEM;
JPEG_PR_ERR("%s: ioremap failed\n", __func__);
goto fail1;
}
jpeg_vbif = ioremap(VBIF_BASE_ADDRESS, VBIF_REGION_SIZE);
if (!jpeg_vbif) {
rc = -ENOMEM;
JPEG_PR_ERR("%s:%d] ioremap failed\n", __func__, __LINE__);
goto fail1;
}
JPEG_DBG("%s:%d] jpeg_vbif 0x%x", __func__, __LINE__,
(uint32_t)jpeg_vbif);
pgmn_dev->jpeg_fs = regulator_get(&pgmn_dev->pdev->dev, "vdd");
rc = regulator_enable(pgmn_dev->jpeg_fs);
if (rc) {
JPEG_PR_ERR("%s:%d]jpeg regulator get failed\n",
__func__, __LINE__); }
pgmn_dev->hw_version = JPEG_8974;
rc = msm_cam_clk_enable(&pgmn_dev->pdev->dev, jpeg_8x_clk_info,
pgmn_dev->jpeg_clk, ARRAY_SIZE(jpeg_8x_clk_info), 1);
if (rc < 0) {
JPEG_PR_ERR("%s: clk failed rc = %d\n", __func__, rc);
goto fail2;
}
#ifdef CONFIG_MSM_IOMMU
for (i = 0; i < pgmn_dev->iommu_cnt; i++) {
rc = iommu_attach_device(pgmn_dev->domain,
pgmn_dev->iommu_ctx_arr[i]);
if (rc < 0) {
rc = -ENODEV;
JPEG_PR_ERR("%s: Device attach failed\n", __func__);
goto fail;
}
JPEG_DBG("%s:%d] dom 0x%x ctx 0x%x", __func__, __LINE__,
(uint32_t)pgmn_dev->domain,
(uint32_t)pgmn_dev->iommu_ctx_arr[i]);
}
#endif
set_vbif_params(jpeg_vbif);
msm_jpeg_hw_init(jpeg_base, resource_size(jpeg_mem));
rc = request_irq(jpeg_irq, handler, IRQF_TRIGGER_RISING, "jpeg",
context);
if (rc) {
JPEG_PR_ERR("%s: request_irq failed, %d\n", __func__,
jpeg_irq);
goto fail3;
}
*mem = jpeg_mem;
*base = jpeg_base;
*irq = jpeg_irq;
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
jpeg_client = msm_ion_client_create(-1, "camera/jpeg");
#endif
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
fail3:
msm_cam_clk_enable(&pgmn_dev->pdev->dev, jpeg_8x_clk_info,
pgmn_dev->jpeg_clk, ARRAY_SIZE(jpeg_8x_clk_info), 0);
regulator_put(pgmn_dev->jpeg_fs);
regulator_disable(pgmn_dev->jpeg_fs);
pgmn_dev->jpeg_fs = NULL;
fail2:
iounmap(jpeg_base);
fail1:
#ifdef CONFIG_MSM_IOMMU
for (i = 0; i < pgmn_dev->iommu_cnt; i++) {
JPEG_PR_ERR("%s:%d] dom 0x%x ctx 0x%x", __func__, __LINE__,
(uint32_t)pgmn_dev->domain,
(uint32_t)pgmn_dev->iommu_ctx_arr[i]);
iommu_detach_device(pgmn_dev->domain,
pgmn_dev->iommu_ctx_arr[i]);
}
#endif
fail:
release_mem_region(jpeg_mem->start, resource_size(jpeg_mem));
JPEG_DBG("%s:%d] fail\n", __func__, __LINE__);
return rc;
}
int msm_jpeg_platform_release(struct resource *mem, void *base, int irq,
void *context)
{
int result = 0;
int i = 0;
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *) context;
free_irq(irq, context);
#ifdef CONFIG_MSM_IOMMU
for (i = 0; i < pgmn_dev->iommu_cnt; i++) {
iommu_detach_device(pgmn_dev->domain,
pgmn_dev->iommu_ctx_arr[i]);
JPEG_DBG("%s:%d]", __func__, __LINE__);
}
#endif
msm_cam_clk_enable(&pgmn_dev->pdev->dev, jpeg_8x_clk_info,
pgmn_dev->jpeg_clk, ARRAY_SIZE(jpeg_8x_clk_info), 0);
JPEG_DBG("%s:%d] clock disbale done", __func__, __LINE__);
if (pgmn_dev->jpeg_fs) {
regulator_put(pgmn_dev->jpeg_fs);
regulator_disable(pgmn_dev->jpeg_fs);
pgmn_dev->jpeg_fs = NULL;
}
iounmap(jpeg_vbif);
iounmap(base);
release_mem_region(mem->start, resource_size(mem));
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
ion_client_destroy(jpeg_client);
#endif
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
return result;
}

40
drivers/media/video/msm/jpeg_10/msm_jpeg_platform.h
View file

@ -1,40 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_PLATFORM_H
#define MSM_JPEG_PLATFORM_H
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/ion.h>
#include <linux/iommu.h>
#include <mach/iommu.h>
void msm_jpeg_platform_p2v(struct file *file,
struct ion_handle **ionhandle, int domain_num);
uint32_t msm_jpeg_platform_v2p(int fd, uint32_t len, struct file **file,
struct ion_handle **ionhandle, int domain_num);
int msm_jpeg_platform_clk_enable(void);
int msm_jpeg_platform_clk_disable(void);
int msm_jpeg_platform_init(struct platform_device *pdev,
struct resource **mem,
void **base,
int *irq,
irqreturn_t (*handler) (int, void *),
void *context);
int msm_jpeg_platform_release(struct resource *mem, void *base, int irq,
void *context);
#endif /* MSM_JPEG_PLATFORM_H */

897
drivers/media/video/msm/jpeg_10/msm_jpeg_sync.c
View file

@ -1,897 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/list.h>
#include <linux/uaccess.h>
#include <linux/slab.h>
#include <media/msm_jpeg.h>
#include "msm_jpeg_sync.h"
#include "msm_jpeg_core.h"
#include "msm_jpeg_platform.h"
#include "msm_jpeg_common.h"
static int release_buf;
inline void msm_jpeg_q_init(char const *name, struct msm_jpeg_q *q_p)
{
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, name);
q_p->name = name;
spin_lock_init(&q_p->lck);
INIT_LIST_HEAD(&q_p->q);
init_waitqueue_head(&q_p->wait);
q_p->unblck = 0;
}
inline void *msm_jpeg_q_out(struct msm_jpeg_q *q_p)
{
unsigned long flags;
struct msm_jpeg_q_entry *q_entry_p = NULL;
void *data = NULL;
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
spin_lock_irqsave(&q_p->lck, flags);
if (!list_empty(&q_p->q)) {
q_entry_p = list_first_entry(&q_p->q, struct msm_jpeg_q_entry,
list);
list_del_init(&q_entry_p->list);
}
spin_unlock_irqrestore(&q_p->lck, flags);
if (q_entry_p) {
data = q_entry_p->data;
kfree(q_entry_p);
} else {
JPEG_DBG("%s:%d] %s no entry\n", __func__, __LINE__,
q_p->name);
}
return data;
}
inline int msm_jpeg_q_in(struct msm_jpeg_q *q_p, void *data)
{
unsigned long flags;
struct msm_jpeg_q_entry *q_entry_p;
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
q_entry_p = kmalloc(sizeof(struct msm_jpeg_q_entry), GFP_ATOMIC);
if (!q_entry_p) {
JPEG_PR_ERR("%s: no mem\n", __func__);
return -EFAULT;
}
q_entry_p->data = data;
spin_lock_irqsave(&q_p->lck, flags);
list_add_tail(&q_entry_p->list, &q_p->q);
spin_unlock_irqrestore(&q_p->lck, flags);
return 0;
}
inline int msm_jpeg_q_in_buf(struct msm_jpeg_q *q_p,
struct msm_jpeg_core_buf *buf)
{
struct msm_jpeg_core_buf *buf_p;
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
buf_p = kmalloc(sizeof(struct msm_jpeg_core_buf), GFP_ATOMIC);
if (!buf_p) {
JPEG_PR_ERR("%s: no mem\n", __func__);
return -EFAULT;
}
memcpy(buf_p, buf, sizeof(struct msm_jpeg_core_buf));
msm_jpeg_q_in(q_p, buf_p);
return 0;
}
inline int msm_jpeg_q_wait(struct msm_jpeg_q *q_p)
{
int tm = MAX_SCHEDULE_TIMEOUT; /* 500ms */
int rc;
JPEG_DBG("%s:%d] %s wait\n", __func__, __LINE__, q_p->name);
rc = wait_event_interruptible_timeout(q_p->wait,
(!list_empty_careful(&q_p->q) || q_p->unblck),
msecs_to_jiffies(tm));
JPEG_DBG("%s:%d] %s wait done\n", __func__, __LINE__, q_p->name);
if (list_empty_careful(&q_p->q)) {
if (rc == 0) {
rc = -ETIMEDOUT;
JPEG_PR_ERR("%s:%d] %s timeout\n", __func__, __LINE__,
q_p->name);
} else if (q_p->unblck) {
JPEG_DBG("%s:%d] %s unblock is true\n", __func__,
__LINE__, q_p->name);
q_p->unblck = 0;
rc = -ECANCELED;
} else if (rc < 0) {
JPEG_PR_ERR("%s:%d] %s rc %d\n", __func__, __LINE__,
q_p->name, rc);
}
}
return rc;
}
inline int msm_jpeg_q_wakeup(struct msm_jpeg_q *q_p)
{
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
wake_up(&q_p->wait);
return 0;
}
inline int msm_jpeg_q_unblock(struct msm_jpeg_q *q_p)
{
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
q_p->unblck = 1;
wake_up(&q_p->wait);
return 0;
}
inline void msm_jpeg_outbuf_q_cleanup(struct msm_jpeg_q *q_p,
int domain_num)
{
struct msm_jpeg_core_buf *buf_p;
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
do {
buf_p = msm_jpeg_q_out(q_p);
if (buf_p) {
msm_jpeg_platform_p2v(buf_p->file,
&buf_p->handle, domain_num);
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
kfree(buf_p);
}
} while (buf_p);
q_p->unblck = 0;
}
inline void msm_jpeg_q_cleanup(struct msm_jpeg_q *q_p)
{
void *data;
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
do {
data = msm_jpeg_q_out(q_p);
if (data) {
JPEG_DBG("%s:%d] %s\n", __func__, __LINE__, q_p->name);
kfree(data);
}
} while (data);
q_p->unblck = 0;
}
/*************** event queue ****************/
int msm_jpeg_framedone_irq(struct msm_jpeg_device *pgmn_dev,
struct msm_jpeg_core_buf *buf_in)
{
int rc = 0;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (buf_in) {
buf_in->vbuf.framedone_len = buf_in->framedone_len;
buf_in->vbuf.type = MSM_JPEG_EVT_SESSION_DONE;
JPEG_DBG("%s:%d] 0x%08x %d framedone_len %d\n",
__func__, __LINE__,
(int) buf_in->y_buffer_addr, buf_in->y_len,
buf_in->vbuf.framedone_len);
rc = msm_jpeg_q_in_buf(&pgmn_dev->evt_q, buf_in);
} else {
JPEG_PR_ERR("%s:%d] no output return buffer\n",
__func__, __LINE__);
rc = -1;
}
if (buf_in)
rc = msm_jpeg_q_wakeup(&pgmn_dev->evt_q);
return rc;
}
int msm_jpeg_evt_get(struct msm_jpeg_device *pgmn_dev,
void __user *to)
{
struct msm_jpeg_core_buf *buf_p;
struct msm_jpeg_ctrl_cmd ctrl_cmd;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_wait(&pgmn_dev->evt_q);
buf_p = msm_jpeg_q_out(&pgmn_dev->evt_q);
if (!buf_p) {
JPEG_DBG("%s:%d] no buffer\n", __func__, __LINE__);
return -EAGAIN;
}
ctrl_cmd.type = buf_p->vbuf.type;
kfree(buf_p);
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) ctrl_cmd.value, ctrl_cmd.len);
if (copy_to_user(to, &ctrl_cmd, sizeof(ctrl_cmd))) {
JPEG_PR_ERR("%s:%d]\n", __func__, __LINE__);
return -EFAULT;
}
return 0;
}
int msm_jpeg_evt_get_unblock(struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_unblock(&pgmn_dev->evt_q);
return 0;
}
void msm_jpeg_reset_ack_irq(struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
}
void msm_jpeg_err_irq(struct msm_jpeg_device *pgmn_dev,
int event)
{
int rc = 0;
struct msm_jpeg_core_buf buf;
JPEG_PR_ERR("%s:%d] error: %d\n", __func__, __LINE__, event);
buf.vbuf.type = MSM_JPEG_EVT_ERR;
rc = msm_jpeg_q_in_buf(&pgmn_dev->evt_q, &buf);
if (!rc)
rc = msm_jpeg_q_wakeup(&pgmn_dev->evt_q);
if (!rc)
JPEG_PR_ERR("%s:%d] err err\n", __func__, __LINE__);
return;
}
/*************** output queue ****************/
int msm_jpeg_we_pingpong_irq(struct msm_jpeg_device *pgmn_dev,
struct msm_jpeg_core_buf *buf_in)
{
int rc = 0;
struct msm_jpeg_core_buf *buf_out;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (buf_in) {
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_in->y_buffer_addr, buf_in->y_len);
rc = msm_jpeg_q_in_buf(&pgmn_dev->output_rtn_q, buf_in);
} else {
JPEG_DBG("%s:%d] no output return buffer\n", __func__,
__LINE__);
rc = -1;
return rc;
}
buf_out = msm_jpeg_q_out(&pgmn_dev->output_buf_q);
if (buf_out) {
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_out->y_buffer_addr, buf_out->y_len);
rc = msm_jpeg_core_we_buf_update(buf_out);
kfree(buf_out);
} else {
msm_jpeg_core_we_buf_reset(buf_in);
JPEG_DBG("%s:%d] no output buffer\n", __func__, __LINE__);
rc = -2;
}
if (buf_in)
rc = msm_jpeg_q_wakeup(&pgmn_dev->output_rtn_q);
return rc;
}
int msm_jpeg_output_get(struct msm_jpeg_device *pgmn_dev, void __user *to)
{
struct msm_jpeg_core_buf *buf_p;
struct msm_jpeg_buf buf_cmd;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_wait(&pgmn_dev->output_rtn_q);
buf_p = msm_jpeg_q_out(&pgmn_dev->output_rtn_q);
if (!buf_p) {
JPEG_DBG("%s:%d] no output buffer return\n",
__func__, __LINE__);
return -EAGAIN;
}
buf_cmd = buf_p->vbuf;
msm_jpeg_platform_p2v(buf_p->file, &buf_p->handle,
pgmn_dev->domain_num);
kfree(buf_p);
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_cmd.vaddr, buf_cmd.y_len);
if (copy_to_user(to, &buf_cmd, sizeof(buf_cmd))) {
JPEG_PR_ERR("%s:%d]", __func__, __LINE__);
return -EFAULT;
}
return 0;
}
int msm_jpeg_output_get_unblock(struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_unblock(&pgmn_dev->output_rtn_q);
return 0;
}
int msm_jpeg_output_buf_enqueue(struct msm_jpeg_device *pgmn_dev,
void __user *arg)
{
struct msm_jpeg_buf buf_cmd;
struct msm_jpeg_core_buf *buf_p;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_jpeg_buf))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
buf_p = kmalloc(sizeof(struct msm_jpeg_core_buf), GFP_ATOMIC);
if (!buf_p) {
JPEG_PR_ERR("%s:%d] no mem\n", __func__, __LINE__);
return -EFAULT;
}
JPEG_DBG("%s:%d] vaddr = 0x%08x y_len = %d\n, fd = %d",
__func__, __LINE__, (int) buf_cmd.vaddr, buf_cmd.y_len,
buf_cmd.fd);
buf_p->y_buffer_addr = msm_jpeg_platform_v2p(buf_cmd.fd,
buf_cmd.y_len, &buf_p->file, &buf_p->handle,
pgmn_dev->domain_num);
if (!buf_p->y_buffer_addr) {
JPEG_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
kfree(buf_p);
return -EFAULT;
}
JPEG_DBG("%s:%d]After v2p y_address =0x%08x, handle = %p\n",
__func__, __LINE__, buf_p->y_buffer_addr, buf_p->handle);
buf_p->y_len = buf_cmd.y_len;
buf_p->vbuf = buf_cmd;
msm_jpeg_q_in(&pgmn_dev->output_buf_q, buf_p);
return 0;
}
/*************** input queue ****************/
int msm_jpeg_fe_pingpong_irq(struct msm_jpeg_device *pgmn_dev,
struct msm_jpeg_core_buf *buf_in)
{
struct msm_jpeg_core_buf *buf_out;
int rc = 0;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (buf_in) {
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_in->y_buffer_addr, buf_in->y_len);
rc = msm_jpeg_q_in_buf(&pgmn_dev->input_rtn_q, buf_in);
} else {
JPEG_DBG("%s:%d] no input return buffer\n", __func__,
__LINE__);
rc = -EFAULT;
}
buf_out = msm_jpeg_q_out(&pgmn_dev->input_buf_q);
if (buf_out) {
rc = msm_jpeg_core_fe_buf_update(buf_out);
kfree(buf_out);
msm_jpeg_core_fe_start();
} else {
JPEG_DBG("%s:%d] no input buffer\n", __func__, __LINE__);
rc = -EFAULT;
}
if (buf_in)
rc = msm_jpeg_q_wakeup(&pgmn_dev->input_rtn_q);
return rc;
}
int msm_jpeg_input_get(struct msm_jpeg_device *pgmn_dev, void __user *to)
{
struct msm_jpeg_core_buf *buf_p;
struct msm_jpeg_buf buf_cmd;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_wait(&pgmn_dev->input_rtn_q);
buf_p = msm_jpeg_q_out(&pgmn_dev->input_rtn_q);
if (!buf_p) {
JPEG_DBG("%s:%d] no input buffer return\n",
__func__, __LINE__);
return -EAGAIN;
}
buf_cmd = buf_p->vbuf;
msm_jpeg_platform_p2v(buf_p->file, &buf_p->handle,
pgmn_dev->domain_num);
kfree(buf_p);
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_cmd.vaddr, buf_cmd.y_len);
if (copy_to_user(to, &buf_cmd, sizeof(buf_cmd))) {
JPEG_PR_ERR("%s:%d]\n", __func__, __LINE__);
return -EFAULT;
}
return 0;
}
int msm_jpeg_input_get_unblock(struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_q_unblock(&pgmn_dev->input_rtn_q);
return 0;
}
int msm_jpeg_input_buf_enqueue(struct msm_jpeg_device *pgmn_dev,
void __user *arg)
{
struct msm_jpeg_core_buf *buf_p;
struct msm_jpeg_buf buf_cmd;
if (copy_from_user(&buf_cmd, arg, sizeof(struct msm_jpeg_buf))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
buf_p = kmalloc(sizeof(struct msm_jpeg_core_buf), GFP_ATOMIC);
if (!buf_p) {
JPEG_PR_ERR("%s:%d] no mem\n", __func__, __LINE__);
return -EFAULT;
}
JPEG_DBG("%s:%d] 0x%08x %d\n", __func__, __LINE__,
(int) buf_cmd.vaddr, buf_cmd.y_len);
buf_p->y_buffer_addr = msm_jpeg_platform_v2p(buf_cmd.fd,
buf_cmd.y_len + buf_cmd.cbcr_len, &buf_p->file,
&buf_p->handle, pgmn_dev->domain_num) + buf_cmd.offset
+ buf_cmd.y_off;
buf_p->y_len = buf_cmd.y_len;
buf_p->cbcr_buffer_addr = buf_p->y_buffer_addr + buf_cmd.y_len
+ buf_cmd.cbcr_off;
buf_p->cbcr_len = buf_cmd.cbcr_len;
buf_p->num_of_mcu_rows = buf_cmd.num_of_mcu_rows;
JPEG_DBG("%s: y_addr=%x, y_len=%x, cbcr_addr=%x, cbcr_len=%x, fd =%d\n",
__func__, buf_p->y_buffer_addr, buf_p->y_len,
buf_p->cbcr_buffer_addr, buf_p->cbcr_len, buf_cmd.fd);
if (!buf_p->y_buffer_addr || !buf_p->cbcr_buffer_addr) {
JPEG_PR_ERR("%s:%d] v2p wrong\n", __func__, __LINE__);
kfree(buf_p);
return -EFAULT;
}
buf_p->vbuf = buf_cmd;
msm_jpeg_q_in(&pgmn_dev->input_buf_q, buf_p);
return 0;
}
int msm_jpeg_irq(int event, void *context, void *data)
{
struct msm_jpeg_device *pgmn_dev =
(struct msm_jpeg_device *) context;
switch (event) {
case MSM_JPEG_EVT_SESSION_DONE:
msm_jpeg_framedone_irq(pgmn_dev, data);
msm_jpeg_we_pingpong_irq(pgmn_dev, data);
break;
case MSM_JPEG_HW_MASK_COMP_FE:
msm_jpeg_fe_pingpong_irq(pgmn_dev, data);
break;
case MSM_JPEG_HW_MASK_COMP_WE:
msm_jpeg_we_pingpong_irq(pgmn_dev, data);
break;
case MSM_JPEG_HW_MASK_COMP_RESET_ACK:
msm_jpeg_reset_ack_irq(pgmn_dev);
break;
case MSM_JPEG_HW_MASK_COMP_ERR:
default:
msm_jpeg_err_irq(pgmn_dev, event);
break;
}
return 0;
}
int __msm_jpeg_open(struct msm_jpeg_device *pgmn_dev)
{
int rc;
mutex_lock(&pgmn_dev->lock);
if (pgmn_dev->open_count) {
/* only open once */
JPEG_PR_ERR("%s:%d] busy\n", __func__, __LINE__);
mutex_unlock(&pgmn_dev->lock);
return -EBUSY;
}
pgmn_dev->open_count++;
mutex_unlock(&pgmn_dev->lock);
msm_jpeg_core_irq_install(msm_jpeg_irq);
rc = msm_jpeg_platform_init(pgmn_dev->pdev,
&pgmn_dev->mem, &pgmn_dev->base,
&pgmn_dev->irq, msm_jpeg_core_irq, pgmn_dev);
if (rc) {
JPEG_PR_ERR("%s:%d] platform_init fail %d\n", __func__,
__LINE__, rc);
return rc;
}
JPEG_DBG("%s:%d] platform resources - mem %p, base %p, irq %d\n",
__func__, __LINE__,
pgmn_dev->mem, pgmn_dev->base, pgmn_dev->irq);
msm_jpeg_q_cleanup(&pgmn_dev->evt_q);
msm_jpeg_q_cleanup(&pgmn_dev->output_rtn_q);
msm_jpeg_outbuf_q_cleanup(&pgmn_dev->output_buf_q,
pgmn_dev->domain_num); msm_jpeg_q_cleanup(&pgmn_dev->input_rtn_q);
msm_jpeg_q_cleanup(&pgmn_dev->input_buf_q);
msm_jpeg_core_init();
JPEG_DBG("%s:%d] success\n", __func__, __LINE__);
return rc;
}
int __msm_jpeg_release(struct msm_jpeg_device *pgmn_dev)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
mutex_lock(&pgmn_dev->lock);
if (!pgmn_dev->open_count) {
JPEG_PR_ERR(KERN_ERR "%s: not opened\n", __func__);
mutex_unlock(&pgmn_dev->lock);
return -EINVAL;
}
pgmn_dev->open_count--;
mutex_unlock(&pgmn_dev->lock);
msm_jpeg_core_release(release_buf, pgmn_dev->domain_num);
msm_jpeg_q_cleanup(&pgmn_dev->evt_q);
msm_jpeg_q_cleanup(&pgmn_dev->output_rtn_q);
msm_jpeg_outbuf_q_cleanup(&pgmn_dev->output_buf_q,
pgmn_dev->domain_num);
msm_jpeg_q_cleanup(&pgmn_dev->input_rtn_q);
msm_jpeg_outbuf_q_cleanup(&pgmn_dev->input_buf_q, pgmn_dev->domain_num);
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
if (pgmn_dev->open_count)
JPEG_PR_ERR(KERN_ERR "%s: multiple opens\n", __func__);
msm_jpeg_platform_release(pgmn_dev->mem, pgmn_dev->base,
pgmn_dev->irq, pgmn_dev);
return 0;
}
int msm_jpeg_ioctl_hw_cmd(struct msm_jpeg_device *pgmn_dev,
void * __user arg)
{
struct msm_jpeg_hw_cmd hw_cmd;
int is_copy_to_user;
if (copy_from_user(&hw_cmd, arg, sizeof(struct msm_jpeg_hw_cmd))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
is_copy_to_user = msm_jpeg_hw_exec_cmds(&hw_cmd, 1);
JPEG_DBG("%s:%d] type %d, n %d, offset %d, mask %x, data %x,pdata %x\n",
__func__, __LINE__, hw_cmd.type, hw_cmd.n, hw_cmd.offset,
hw_cmd.mask, hw_cmd.data, (int) hw_cmd.pdata);
if (is_copy_to_user >= 0) {
if (copy_to_user(arg, &hw_cmd, sizeof(hw_cmd))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
}
return 0;
}
int msm_jpeg_ioctl_hw_cmds(struct msm_jpeg_device *pgmn_dev,
void * __user arg)
{
int is_copy_to_user;
int len;
uint32_t m;
struct msm_jpeg_hw_cmds *hw_cmds_p;
struct msm_jpeg_hw_cmd *hw_cmd_p;
if (copy_from_user(&m, arg, sizeof(m))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
len = sizeof(struct msm_jpeg_hw_cmds) +
sizeof(struct msm_jpeg_hw_cmd) * (m - 1);
hw_cmds_p = kmalloc(len, GFP_KERNEL);
if (!hw_cmds_p) {
JPEG_PR_ERR("%s:%d] no mem %d\n", __func__, __LINE__, len);
return -EFAULT;
}
if (copy_from_user(hw_cmds_p, arg, len)) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
kfree(hw_cmds_p);
return -EFAULT;
}
hw_cmd_p = (struct msm_jpeg_hw_cmd *) &(hw_cmds_p->hw_cmd);
is_copy_to_user = msm_jpeg_hw_exec_cmds(hw_cmd_p, m);
if (is_copy_to_user >= 0) {
if (copy_to_user(arg, hw_cmds_p, len)) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
kfree(hw_cmds_p);
return -EFAULT;
}
}
kfree(hw_cmds_p);
return 0;
}
int msm_jpeg_start(struct msm_jpeg_device *pgmn_dev, void * __user arg)
{
struct msm_jpeg_core_buf *buf_out;
struct msm_jpeg_core_buf *buf_out_free[2] = {NULL, NULL};
int i, rc;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
release_buf = 1;
for (i = 0; i < 2; i++) {
buf_out = msm_jpeg_q_out(&pgmn_dev->input_buf_q);
if (buf_out) {
msm_jpeg_core_fe_buf_update(buf_out);
kfree(buf_out);
} else {
JPEG_DBG("%s:%d] no input buffer\n", __func__,
__LINE__);
break;
}
}
for (i = 0; i < 2; i++) {
buf_out_free[i] = msm_jpeg_q_out(&pgmn_dev->output_buf_q);
if (buf_out_free[i]) {
msm_jpeg_core_we_buf_update(buf_out_free[i]);
release_buf = 0;
} else {
JPEG_DBG("%s:%d] no output buffer\n",
__func__, __LINE__);
break;
}
}
for (i = 0; i < 2; i++)
kfree(buf_out_free[i]);
rc = msm_jpeg_ioctl_hw_cmds(pgmn_dev, arg);
JPEG_DBG("%s:%d]\n", __func__, __LINE__);
return rc;
}
int msm_jpeg_ioctl_reset(struct msm_jpeg_device *pgmn_dev,
void * __user arg)
{
int rc;
struct msm_jpeg_ctrl_cmd ctrl_cmd;
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
if (copy_from_user(&ctrl_cmd, arg, sizeof(ctrl_cmd))) {
JPEG_PR_ERR("%s:%d] failed\n", __func__, __LINE__);
return -EFAULT;
}
pgmn_dev->op_mode = ctrl_cmd.type;
rc = msm_jpeg_core_reset(pgmn_dev->op_mode, pgmn_dev->base,
resource_size(pgmn_dev->mem));
return rc;
}
int msm_jpeg_ioctl_test_dump_region(struct msm_jpeg_device *pgmn_dev,
unsigned long arg)
{
JPEG_DBG("%s:%d] Enter\n", __func__, __LINE__);
msm_jpeg_io_dump(arg);
return 0;
}
long __msm_jpeg_ioctl(struct msm_jpeg_device *pgmn_dev,
unsigned int cmd, unsigned long arg)
{
int rc = 0;
switch (cmd) {
case MSM_JPEG_IOCTL_GET_HW_VERSION:
JPEG_DBG("%s:%d] VERSION 1\n", __func__, __LINE__);
rc = msm_jpeg_ioctl_hw_cmd(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_RESET:
rc = msm_jpeg_ioctl_reset(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_STOP:
rc = msm_jpeg_ioctl_hw_cmds(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_START:
rc = msm_jpeg_start(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_INPUT_BUF_ENQUEUE:
rc = msm_jpeg_input_buf_enqueue(pgmn_dev,
(void __user *) arg);
break;
case MSM_JPEG_IOCTL_INPUT_GET:
rc = msm_jpeg_input_get(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_INPUT_GET_UNBLOCK:
rc = msm_jpeg_input_get_unblock(pgmn_dev);
break;
case MSM_JPEG_IOCTL_OUTPUT_BUF_ENQUEUE:
rc = msm_jpeg_output_buf_enqueue(pgmn_dev,
(void __user *) arg);
break;
case MSM_JPEG_IOCTL_OUTPUT_GET:
rc = msm_jpeg_output_get(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_OUTPUT_GET_UNBLOCK:
rc = msm_jpeg_output_get_unblock(pgmn_dev);
break;
case MSM_JPEG_IOCTL_EVT_GET:
rc = msm_jpeg_evt_get(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_EVT_GET_UNBLOCK:
rc = msm_jpeg_evt_get_unblock(pgmn_dev);
break;
case MSM_JPEG_IOCTL_HW_CMD:
rc = msm_jpeg_ioctl_hw_cmd(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_HW_CMDS:
rc = msm_jpeg_ioctl_hw_cmds(pgmn_dev, (void __user *) arg);
break;
case MSM_JPEG_IOCTL_TEST_DUMP_REGION:
rc = msm_jpeg_ioctl_test_dump_region(pgmn_dev, arg);
break;
default:
JPEG_PR_ERR(KERN_INFO "%s:%d] cmd = %d not supported\n",
__func__, __LINE__, _IOC_NR(cmd));
rc = -EINVAL;
break;
}
return rc;
}
#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
static int camera_register_domain(void)
{
struct msm_iova_partition camera_fw_partition = {
.start = SZ_128K,
.size = SZ_2G - SZ_128K,
};
struct msm_iova_layout camera_fw_layout = {
.partitions = &camera_fw_partition,
.npartitions = 1,
.client_name = "camera_jpeg",
.domain_flags = 0,
};
return msm_register_domain(&camera_fw_layout);
}
#endif
int __msm_jpeg_init(struct msm_jpeg_device *pgmn_dev)
{
int rc = 0, i = 0;
int idx = 0;
char *iommu_name[3] = {"jpeg_enc0", "jpeg_enc1", "jpeg_dec"};
mutex_init(&pgmn_dev->lock);
pr_err("%s:%d] Jpeg Device id %d", __func__, __LINE__,
pgmn_dev->pdev->id);
idx = pgmn_dev->pdev->id;
pgmn_dev->idx = idx;
pgmn_dev->iommu_cnt = 1;
msm_jpeg_q_init("evt_q", &pgmn_dev->evt_q);
msm_jpeg_q_init("output_rtn_q", &pgmn_dev->output_rtn_q);
msm_jpeg_q_init("output_buf_q", &pgmn_dev->output_buf_q);
msm_jpeg_q_init("input_rtn_q", &pgmn_dev->input_rtn_q);
msm_jpeg_q_init("input_buf_q", &pgmn_dev->input_buf_q);
#ifdef CONFIG_MSM_IOMMU
/*get device context for IOMMU*/
for (i = 0; i < pgmn_dev->iommu_cnt; i++) {
pgmn_dev->iommu_ctx_arr[i] = msm_iommu_get_ctx(iommu_name[i]);
JPEG_DBG("%s:%d] name %s", __func__, __LINE__, iommu_name[i]);
JPEG_DBG("%s:%d] ctx 0x%x", __func__, __LINE__,
(uint32_t)pgmn_dev->iommu_ctx_arr[i]);
if (!pgmn_dev->iommu_ctx_arr[i]) {
JPEG_PR_ERR("%s: No iommu fw context found\n",
__func__);
goto error;
}
}
pgmn_dev->domain_num = camera_register_domain();
JPEG_DBG("%s:%d] dom_num 0x%x", __func__, __LINE__,
pgmn_dev->domain_num);
if (pgmn_dev->domain_num < 0) {
JPEG_PR_ERR("%s: could not register domain\n", __func__);
goto error;
}
pgmn_dev->domain = msm_get_iommu_domain(pgmn_dev->domain_num);
JPEG_DBG("%s:%d] dom 0x%x", __func__, __LINE__,
(uint32_t)pgmn_dev->domain);
if (!pgmn_dev->domain) {
JPEG_PR_ERR("%s: cannot find domain\n", __func__);
goto error;
}
#endif
return rc;
error:
mutex_destroy(&pgmn_dev->lock);
return -EFAULT;
}
int __msm_jpeg_exit(struct msm_jpeg_device *pgmn_dev)
{
mutex_destroy(&pgmn_dev->lock);
kfree(pgmn_dev);
return 0;
}

102
drivers/media/video/msm/jpeg_10/msm_jpeg_sync.h
View file

@ -1,102 +0,0 @@
/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef MSM_JPEG_SYNC_H
#define MSM_JPEG_SYNC_H
#include <linux/fs.h>
#include <linux/list.h>
#include <linux/cdev.h>
#include <linux/platform_device.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#include "msm_jpeg_core.h"
#define JPEG_7X 0x1
#define JPEG_8X60 (0x1 << 1)
#define JPEG_8960 (0x1 << 2)
#define JPEG_8974 0x1
struct msm_jpeg_q {
char const *name;
struct list_head q;
spinlock_t lck;
wait_queue_head_t wait;
int unblck;
};
struct msm_jpeg_q_entry {
struct list_head list;
void *data;
};
struct msm_jpeg_device {
struct platform_device *pdev;
struct resource *mem;
int irq;
void *base;
struct clk *jpeg_clk[5];
struct regulator *jpeg_fs;
uint32_t hw_version;
struct device *device;
struct cdev cdev;
struct mutex lock;
char open_count;
uint8_t op_mode;
/* event queue including frame done & err indications
*/
struct msm_jpeg_q evt_q;
/* output return queue
*/
struct msm_jpeg_q output_rtn_q;
/* output buf queue
*/
struct msm_jpeg_q output_buf_q;
/* input return queue
*/
struct msm_jpeg_q input_rtn_q;
/* input buf queue
*/
struct msm_jpeg_q input_buf_q;
struct v4l2_subdev subdev;
struct class *msm_jpeg_class;
dev_t msm_jpeg_devno;
/*iommu domain and context*/
int domain_num;
int idx;
struct iommu_domain *domain;
struct device *iommu_ctx_arr[3];
int iommu_cnt;
};
int __msm_jpeg_open(struct msm_jpeg_device *pgmn_dev);
int __msm_jpeg_release(struct msm_jpeg_device *pgmn_dev);
long __msm_jpeg_ioctl(struct msm_jpeg_device *pgmn_dev,
unsigned int cmd, unsigned long arg);
int __msm_jpeg_init(struct msm_jpeg_device *pgmn_dev);
int __msm_jpeg_exit(struct msm_jpeg_device *pgmn_dev);
#endif /* MSM_JPEG_SYNC_H */

0
drivers/media/video/msm/mercury/Makefile Executable file → Normal file
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0
drivers/media/video/msm/mercury/msm_mercury_common.h Executable file → Normal file
View file

0
drivers/media/video/msm/mercury/msm_mercury_core.c Executable file → Normal file
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0
drivers/media/video/msm/mercury/msm_mercury_core.h Executable file → Normal file
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0
drivers/media/video/msm/mercury/msm_mercury_dev.c Executable file → Normal file
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0
drivers/media/video/msm/mercury/msm_mercury_hw.c Executable file → Normal file
View file

0
drivers/media/video/msm/mercury/msm_mercury_hw.h Executable file → Normal file
View file

0
drivers/media/video/msm/mercury/msm_mercury_hw_reg.h Executable file → Normal file
View file

0
drivers/media/video/msm/mercury/msm_mercury_macros.h Executable file → Normal file
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0
drivers/media/video/msm/mercury/msm_mercury_platform.c Executable file → Normal file
View file

2
drivers/media/video/msm/mercury/msm_mercury_platform.h Executable file → Normal file
View file

@ -15,7 +15,7 @@
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/msm_ion.h>
#include <linux/ion.h>
int msm_mercury_platform_clk_enable(void);
int msm_mercury_platform_clk_disable(void);

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