Piteball/android_kernel_google_msm
1
0
Fork 0
mirror of https://github.com/followmsi/android_kernel_google_msm.git synced 2024-11-06 23:17:41 +00:00
Code Issues Projects Releases Wiki Activity

msm: display: dsi command mode vsync time generation

Browse source 
In each vsync cycle there will be two vsync interrupts
generated, need ignore the wrong one to provide the correct vsync
timestamp.

CRs-fixed: 452269
Change-Id: Ic13eea77d15eb46f4879f818d346425c63efe41a
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
This commit is contained in:
Ken Zhang 2013-02-19 10:32:31 -05:00 committed by Iliyan Malchev
parent 270a7e548c
commit cd39a1efba
1 changed files with 11 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
drivers/video/msm/mdp4_overlay_dsi_cmd.c
View file

@ -41,6 +41,8 @@ static int vsync_start_y_adjust = 4;
*/
#define VSYNC_EXPIRE_TICK 4
#define VSYNC_MIN_DIFF_MS 4
static struct vsycn_ctrl {
struct device *dev;
int inited;
@ -70,9 +72,9 @@ static struct vsycn_ctrl {
struct vsync_update vlist[2];
int vsync_enabled;
int clk_enabled;
int new_update;
int clk_control;
ktime_t vsync_time;
u32 last_vsync_ms;
struct work_struct clk_work;
} vsync_ctrl_db[MAX_CONTROLLER];
@ -450,8 +452,9 @@ void mdp4_dsi_cmd_vsync_ctrl(struct fb_info *info, int enable)
mipi_dsi_clk_cfg(1);
mdp_clk_ctrl(1);
vctrl->clk_enabled = 1;
vctrl->new_update = 1;
clk_set_on = 1;
vctrl->last_vsync_ms =
ktime_to_ms(ktime_get()) - VSYNC_MIN_DIFF_MS;
}
if (clk_set_on) {
vsync_irq_enable(INTR_PRIMARY_RDPTR,
@ -534,6 +537,8 @@ static void mdp4_dsi_cmd_wait4ov(int cndx)
static void primary_rdptr_isr(int cndx)
{
struct vsycn_ctrl *vctrl;
u32 cur_vsync_ms;
int vsync_diff;
vctrl = &vsync_ctrl_db[cndx];
pr_debug("%s: ISR, tick=%d pan=%d cpu=%d\n", __func__,
@ -542,13 +547,15 @@ static void primary_rdptr_isr(int cndx)
spin_lock(&vctrl->spin_lock);
vctrl->vsync_time = ktime_get();
cur_vsync_ms = ktime_to_ms(vctrl->vsync_time);
vsync_diff = (int)(cur_vsync_ms - vctrl->last_vsync_ms);
if (vctrl->new_update) {
vctrl->new_update = 0;
if ((vsync_diff >= 0) && (vsync_diff < VSYNC_MIN_DIFF_MS)) {
spin_unlock(&vctrl->spin_lock);
return;
}
vctrl->last_vsync_ms = cur_vsync_ms;
complete_all(&vctrl->vsync_comp);
vctrl->wait_vsync_cnt = 0;