Make use of the two independent power domains to
add intermediate levels. Attempt to just increase
the bus frequency before also raising the GPU
frequency.
Change-Id: Ie2109df001f96e36e03959288aa957d63c0ef4a7
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Add separate kernel memory mapping for GPU shader memory.
Previously, both the register and the shader memory were mapped
as one entity, with the mapping length being equal to combined
size of register memory and shader memory. Now, we separate the
shader memory mapping to help in cases of GPU devices where the
shader and register memory may not be adjacent. This helps to
dump the shader memory in the postmortem snapshot. By having a
separate mapping for shader memory, the snapshot dump routine
simply reads in the shader memory range specified and dumps.
Change-Id: I30e59dffe849fefcfbbaf0e5245cc1024ccedcb1
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
We add 8974 support for enabling GDHS of GPU power rail line
by adding it to the 8974 device tree. This feature allows
GPU to go in SLUMBER instead of SLEEP state as 8974 has a low
latency power rail bring-up.
Change-Id: I4c098947c50277817af997e0f8cc7ec232bc42c9
Signed-off-by: Harsh Vardhan Dwivedi <hdwivedi@codeaurora.org>
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
this add new API for sound compress to support gapless playback.
As noted in Documentation change, we add API to send metadata of encoder and
padding delay to DSP. Also add API for indicating EOF and switching to
subsequent track
Also bump the compress API version
Conflicts:
include/uapi/sound/compress_offload.h
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This change adds support to read the HW information and use it
to select FW version.
Change-Id: I8ce11341f87b61668f907e969e07bdde5601c066
Signed-off-by: Rajakumar Govindaram <rajakuma@codeaurora.org>
Add parsing of LED flash property in camera sensor driver. If camera
sensor supports LED flash functionality, led-flash-src property
shall point to phandle of respective LED flash device.
Change-Id: Ic94c166d02cd77cff68dff427c5706b267eb7714
Signed-off-by: Sreesudhan Ramakrish Ramkumar <srramku@codeaurora.org>
Add actuator driver that is responsible to move the actuator lens
for auto focus functionality. Register platform driver and create
v4l2 subdevice during probing. Add config functions for power up,
power down and move focus.
Change-Id: Icabf5dbd88fa64ea0a007834ffdd7a2b81eae567
Signed-off-by: Sreesudhan Ramakrish Ramkumar <srramku@codeaurora.org>
(1) ISP interface(ISPIF) sits between sensor(CSID) and ISP.
It's responsible to mux sensor's output path to
ISP input path. ISPIF driver contains two parts, i.e.,
user space driver and kernel driver. The kernel driver is
mainly for register write and read.
(2) Image signal processing(ISP) driver's responsiblity is to
processed the sensor's raw image to generate the YUV image
for rending/video encoding and snapshot. ISP driver has
following main functional blcoks:
- Image bus(AXI) management and configuration
- ISP processing pipeline configuration and run time update
- ISP input interface(CAMIF) configuration
- Image buffer management
- ISP interrupt handling
- ISP kernel event notification to user space
- ISP hardware start/stop state machine.
This patch implemented the ISP kernel driver.
Change-Id: I5f222c6a2df8b4c26b0948ef3fb2e36e859d0964
Signed-off-by: Kevin Chan <ktchan@codeaurora.org>
This change reimplements MSM camera V4L2 driver for camera
2.0. Current architecture cannot support 2.0 API very well.
This initial change contains plumbing code for v4l2 device
node creation, ioctls, events, videobuf2, etc.
The new code avoids payload deep-copy by passing them
between user space processes via IPC.
Change-Id: I8598cce8dd25fbd19743398ae0d228081f847d98
Signed-off-by: Jignesh Mehta <jigneshm@codeaurora.org>
Signed-off-by: Shuzhen Wang <shuzhenw@codeaurora.org>
Add device tree (DT) support for isa1200. Extract device
properties from DT and store it in platform data structure.
Change-Id: I9ed9cc36cb07db00634b9e73a8052e62d313d484
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
In order to keep card endurance, it is best not to check the need for
BKOPS every time the MMC is idle.
However, the decision when to check the card need for BKOPS according
to number of changed sectors doesn't fit all cards sizes. Therefore,
the check for BKOPS need is based on percentages of changed sectors
of the card size.
In order to assure that BKOPS will be triggered again in case it was
interrupted, the accumulated number of changed sectors is cleared only
in case BKOPS was completed without interruption.
Change-Id: I598f64b652a524a431b87d103fd5890b808f11b1
Signed-off-by: Maya Erez <merez@codeaurora.org>
(cherry picked from commit e1eae988976536834759a45cf7f62e1cb2b82838)
Update the TSPP driver to support using the device tree mechanism
for getting platform-dependent data.
Change-Id: I5ac0f90266c3f30621865cf097db4dba1ee07fc6
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>
The driver implements an IPC (Inter-Processor) communication
mechanism that allows for clients to make remote method
invocations across processor boundary.
Change-Id: Ia9eb9bc69c64c785b040e24ee36a4f416ab49355
Acked-by: Sathish Ambley <sambley@qualcomm.com>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
Enable and disable ETM during hotplug operations only if ETM is
allowed round-robin access by the funnel when all the ETMs share
the same funnel priority.
For 8960, 8064, etc it is observed that sometimes a core's ETM is
starved by other core ETMs constantly producing data. This works
around an issue seen where setting the prog bit of a core's ETMCR
(i.e. ETMCR[10]) doesn't result in that core's ETMSR[1] getting
set thereby triggering the "timeout while setting prog bit"
warning. Subsequently performaing a manual ETB flush as part of
disabling ETB to retrieve the collected trace data also fails.
Change-Id: I6dd37979058644495d945e80e6a2de4696fc5a20
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Reading block size to use for tmc-etr to usb transfers from DT
allows the flexibility to configure a different block size per
target.
Change-Id: I5b52db194ebb6fab7d3a02e8fb031bd9936fddd8
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Add runtime control for enabling/disabling program counter save feature.
Enabling program counter save feature will enable pc to be saved on
reset but implies ETM being left powered on. So we provide user runtime
control to enable the feature when debugging or disable it while taking
power measurements.
Change-Id: Ib007da851ee7f3b0fac195da62aac7def68cc67a
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
demux used single-threaded workqueue to process TS packets
notified from the HW. Workqueue implementation was changed
so that all work scheduled to workqueues are submitted
to same kworker threads, this result on having TS packet
processing not to be done on demux own thread and compete
with other work scheduled by other drivers. Moved to separate
thread dedicated only for demux.
Change-Id: Ia8b96543f26428a0a12809d34c27849f900cc45e
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
TSIF signals (clock, data, enable and sync) may be configured
to be inversed at TSPP unit input. This is useful in case
TSIF signals from external units need to be inversed.
Change-Id: I4f0bfdc58fb8658dbf10fe3805b8787f9d36aeca
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
The busy/idle behavior of different cores can be correlated by
DCVS when determining what frequency to run cores at. However,
this is not desirable below a certain frequency. Add a parameter
to establish what this frequency is. The parameter is configurable
in userspace via sysfs.
The ss_iobusy_conv parameter is currently unused, so it is
being replaced with ss_no_corr_below_freq.
(cherry picked from commit e8c6d615259af5fde8a6613f53c41c212407bda9)
Change-Id: Ibf814f3f93b92a532d7b3af80721a5bc7db1bd31
Signed-off-by: Steve Muckle <smuckle@codeaurora.org>
Strongly ordered memory is occasionally needed for some DMA
allocations for specialized use cases. Add the corresponding
DMA attribute.
Change-Id: Idd9e756c242ef57d6fa6700e51cc38d0863b760d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
This patch adds DMA_ATTR_NO_KERNEL_MAPPING attribute which lets the
platform to avoid creating a kernel virtual mapping for the allocated
buffer. On some architectures creating such mapping is non-trivial task
and consumes very limited resources (like kernel virtual address space
or dma consistent address space). Buffers allocated with this attribute
can be only passed to user space by calling dma_mmap_attrs().
Change-Id: Id12b93fa2b02d5f3d01ab48eb61cda79f533d695
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Define Device Tree bindings for wfd and update the driver to match the
specification.
Change-Id: Ia204cf32aa1ccd5fd51999844dd73d740e90f0e2
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
With 8974, bandwidth requests are exceeding integer size.
Update ab and ib to ensure values over 4Gbps can be requested.
For 64-bit support, there are four changes in this patch:
Changes in the bus driver structures and functions to
update ab and ib values to uint64.
Updates in client drivers to ensure that the bus APIs
are called with the right types.
Updates to the device-tree. Device-tree nodes don't
provide a clean mechanism to read a combination of u32
and u64 variables within the same property name. So, the
ab and ib values must be specified in kbps instead of
bytes/sec from the device tree. The bus driver function
will convert the ab and ib values read from device-tree
to Mbps.
Change the existing property names to make them consistent
with the convention used by the new property name, which
abides to the Device Tree convention.
Change-Id: Ib0a6db0e221af366c61c51cc21ac722f02cb7a34
CRs-Fixed: 408786
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
Populate bus vectors for the audio ocmem driver with use of new
bus device tree APIs.
Change-Id: If965c269706763a3a67b22243f265429f23427d6
Signed-off-by: Phani Kumar Uppalapati <phanik@codeaurora.org>
Signed-off-by: Rajeev Kulkarni <krajeev@codeaurora.org>
This attribute is used to determine whether the status bit that
indicates the need for BKOPS should be checked. The value is stored in
this attribute represents the minimum number of sectors that needs to
be changed in the device (written or discarded) in order to require
the status-bit of BKOPS to be checked
(cherry picked from commit e6c6b4b14ac2f10aa34cf42b6f558152e438bb37)
Change-Id: I3b05a0826fc9397a13d6b03ee028293f877f8d66
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
(cherry picked from commit 15ecbe1c5f6b2f2af5974f23cd494fce0c5bf81a)
The write packing control will ensure that read requests latency is
not increased due to long write packed commands.
The trigger for enabling the write packing is managing to pack several
write requests. The number of potential packed requests that will trigger
the packing can be configured via sysfs by writing the required value to:
/sys/block/<block_dev_name>/num_wr_reqs_to_start_packing.
The trigger for disabling the write packing is fetching a read request.
(cherry picked from commit 0cc76400d65f0d7b3f2f8f1ece3c8061652a35d7)
Change-Id: I51a44d2673e40e4e404317ddb632a9fb204e9a06
Signed-off-by: Maya Erez <merez@codeaurora.org>
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit fd402c28f1571b64f4d695d191778e9dd595806a)
The version of packing support excepted by the linux community is
slightly different from the one that was merged. This revert is needed
in order to upload the latest version from the linux community.
This patch reverts the following commits:
1.mmc: card: Add eMMC4.5 write packed commands unit-tests
2.mmc: card: Fix packing control enabling algorithm
3.mmc: block: Add MMC write packing statistics
4.mmc: msm_sdcc: enable the write packing control
5.mmc: msm_sdcc: Enable write packing capability
6.mmc: block: Add write packing control
7.mmc: core: Support packed write command for eMMC4.5 device
8.mmc: core: Add packed command feature of eMMC4.5
(cherry picked from commit f94cf3da103b344b13fa4d6665fd21dad1b95ead)
Change-Id: I2efc6dc8d8f6d5cc7e9efa99ec74914ffff96fcd
commit: 9b54d88c6a11ebfe069b7fdebcb521da21754c3f
commit: e2ecb58a6c5011549aac3e86fb1c13e7b7c65104
commit: e544d700e2dac1584a8172c4dc347d81ede203bd
commit: 8afe8d2a98a1bbf3804162ff5c95a56226935f5a
commit: 25e2261a556c4393f79d58bce814bb3df34b9549
commit: 63c61d6d8b8f37c71b4162b3affffdf72ac06811
commit: 968c774ea6466fa7adbf2eac333220132acda306
commit: 516994eee39282b8648b509e449ff83b49833209.
Signed-off-by: Tatyana Brokhman <tlinder@codeaurora.org>
(cherry picked from commit 31fe84d6edae65f9df5663538e528697897be86e)
Signed-off-by: Maya Erez <merez@codeaurora.org>
Parse the device tree elements and fill platform
data structure.
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
(cherry picked from commit d96f5032cd8b73450886262fe193d1531038c0f0)
Conflicts:
drivers/input/touchscreen/atmel_mxt_ts.c
Change-Id: I551dadffaa84c991abbe964bfb9f72b7fd11dfee
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 368b8d73bbda62f6ab217ef06019b685636fc3ba)
QPNP (Qualcomm Plug N Play) LEDs driver is used for
controlling LEDs that are part of PMIC on Qualcomm reference
platforms. The PMIC is connected to Host processor via
SPMI bus. This driver supports various LED modules such as
WLED (white LED), RGB LED and flash LED. The first version of
the driver supports WLED and other features are added in the
next versions.
Change-Id: Ib2962c784cf566905f909faa0d46f8ebfee77b2d
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
(cherry picked from commit f3d5a06505faa2d7690ad48ce7bb5e32afb56df2)
PMIC-DLY on SPM V2.2 is part of the PMIC_DATAn command. Remove the
incorrect entity from documentation.
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit a5753764bace491d50f09ad7461647dd62f6c20a)
Change-Id: I66f83ed1e594f611154aaa3165ba95e73bda4e63
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add support in the bam_dmux driver to receive the BAM hardware description
data from device tree.
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
(cherry picked from commit 7bf02059a51756514983a76d225b640bc65f2ea4)
Change-Id: I24ef668edca1cf14f6dcdffa0340a036c3900482
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
This patch enables clients to specify vectors in device tree
format. Clients will no longer need to specify vectors in
the boards file. Instead, they can add the bus-scaling
related data to their own device-nodes.
The clients can then call an API exposed by the bus driver
which will build the pdata out of those strings.
The registration process using pdata remains unchanged.
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
(cherry picked from commit bf3676d64aa6007664223c552557ab3d0666f842)
Change-Id: Iec994d8949bef9a45a401147c7f2aeebaf748e4f
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Leading zeros in register offsets is not acceptable
while naming device nodes in device tree. Fix this in
msm_qpic_nand.txt device tree binding.
Change-Id: Iab8f339b8e98d06c5197b794640fddca0e153960
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
(cherry picked from commit 152eff18c93c014cd8885fed38f0e6eeb89032ee)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The algorithm needs thermal inputs for all the cores. Create members in
the internal core_info strucutre and platform data/device tree to pass
in the sensors they use.
Update the dcvs code to notify the temperature to TZ.
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
(cherry picked from commit fc7dca4c325725492af997fa282e07b9d03154d1)
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
(cherry picked from commit eb478c5b7b55ea8a57e0336e4cf9979be935b289)
Change-Id: I505903eb8b9779f2065aebfab5b3f2aefc874200
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
This change
-removes the use of group id and instead introduces core type
-rearranges platform data, adds energy curve coefficients and power
parameters
-allow for the energy params to be -ve numbers
The change also mandates updates to the msm8974-gpu.dtsi and the
associated binding documentation.
Also take this opportunity to remove devices for unsupported platform
- 8930 and 8960
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
(cherry picked from commit 4445166ad16be0c45b077bfb10487de355ed2e05)
Signed-off-by: Ram Kumar Chakravarthy Chebathini <rcheba@codeaurora.org>
(cherry picked from commit 24d2351f6a5e7069e5d554dbc999280a69288c5d)
Change-Id: I5c65c0e65cc7652eee72c525f0db10e128061cf9
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
This describes the protocol used by uhid for user-space applications. It
describes the details like non-blocking I/O and readv/writev for multiple
events per syscall.
Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
commit a2fd641917 upstream.
Both the PowerPC hypervisor and Xen hypervisor can utilize the
hvc driver.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Link: http://lkml.kernel.org/r/1361825650-14031-3-git-send-email-konrad.wilk@oracle.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 2482a92e7d upstream.
The earlyprintk for Xen PV guests utilizes a simple hypercall
(console_io) to provide output to Xen emergency console.
Note that the Xen hypervisor should be booted with 'loglevel=all'
to output said information.
Reported-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Link: http://lkml.kernel.org/r/1361825650-14031-2-git-send-email-konrad.wilk@oracle.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This driver supports the Qualcomm PNP clkdiv peripheral. It
allowed for configuring divide factors for various clock outputs
on the PMIC. The source clock is CXO.
The driver allows for configuration of the clkdiv device through
Device Tree. Some optional parameters may be specified instead at
runtime with the qpnp_clkdiv_config() API.
Change-Id: I393ed0e4389fb3c1dfe0bcdb40944102d2e09894
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Add ADSP loader driver to bring ADSP out of reset on demand.
The MSM platforms that use APRv2 driver requires separate driver to
bring ADSP out of reset.
Change-Id: I7d64b0336fac76e71078a3bec0795007ee989643
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
The PON module supports various reset sources (physical pins)
such as KPDPWR, RESIN, RESIN+KPDPWR. These pins can be configured
for different reset types (such as warm, soft, hard) and can also
be used as push buttons (keys).
In the push-button configuration these pins act as gpios, only
reporting the state on the line (high/low) and no additional
pon based configuration being done in the hardware or software.
They can be used for generic buttons (such as volume up/down,
directional keys)
Change-Id: Icde78b49b1037c1b5a13d7e90f772f72ac822b2a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The documentation incorrectly specifies 'select' instead of
'src-select'. Update this to be consistent with the driver.
Change-Id: I90bffc26affdefa42192c7f10d4af80ad0340f7f
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Support for reading hardware data for CoreSight devices from device
tree.
Change-Id: I4d149991c89b458384465d163386084f500a4028
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
On some regulator hardware, the values read on SPMI offset 0x4 (type)
and 0x5 (subtype) are incorrect. Add a new optional property called
qcom,force-type that allows a user to override the hardware values
with values supplied in the Device Tree.
Change-Id: Id73fe69873f5dc9d0f2623771872aa2eaddd66f1
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Interfacing with some modem subsystem peripherals is not possible
unless the UNCLAMP_ALL bit is set in MSS_CLAMP_IO register. Set
this bit accordingly.
Change-Id: I5685383c506b0bcb89d6b6f808021512079cc607
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Read the codec specific data from device tree instead of board file.
Change-Id: Iad382b89692903d2434b63d34c7121fe0b4b9dda
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
The gpio driver was not a true platform driver and hence wasn't
supported by device tree. This patch fixes that for non-DT targets
by making sure the device gets added early on during board init.
For DT-targets, adding the gpio-controller property for the device
makes sure the msmgpio device gets probed.
This change is done for all TLMM_v2 targets (msm8660 and future)
TLMM_V1 targets remain unaffected.
Change-Id: I8a55ab1e2af0366b3e6893b334ba2396d2a83190
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
The qcom,msm-id entry specifies the MSM chipset, platform and
hardware revision. This is used by the Android dtbtool utility
to generate a table of device tree used in the boot.img.
The qcom,msm-id syntax is:
qcom,msm-id = <chipset_id, platform_id, rev_id> [, <...>];
The entry can optionally be an array with variable number of
triplets indicating the device tree supports more than one
chipset/platform/hardware rev.
Note that the id's are hardware ID's reported by the hardware
and not commonly used literal ID's. E.g. MSM8974's chipset ID
is 126, not 8974.
Change-Id: If65b40d6e947504cb4b07a36aa895f8ec6f9d300
Signed-off-by: David Ng <dave@codeaurora.org>
Define device tree bindings for MSM_THERMAL driver, and implement
matching code to make the driver abide to these bindings.
Change-Id: I6ed08a09f45f8748841cf44db601f28659e49d9c
Signed-off-by: Eugene Seah <eseah@codeaurora.org>
Due to some issue with older USB PHYs, USB h/w requires to be
RESET everytime cable is diconnected. Avoid this on 8974's
USB core which doesn't have this issue.
Change-Id: I918492032de6d65eaba7c9b656c700d4f443aa99
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
The QPNP IADC driver supports the user bank
peripheral of the current ADC(IADC).
IADC is a 16 bit ADC used for measuring current.
The single measurement mode is supported to read
current from upto seven channel configuration.
Clients can read the internal/external Rsense,
CSP_EX, CSN_RX along with gain and offset
calibraton channels.
Change-Id: I7e5ae3fc70878d16827d33705853a36bb0aa04f6
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Add support for controlling the power state of ocmem memory
macros. Both local power control and RPM assisted power control
are supported.
Also add required support for debugging power control operations.
Change-Id: Ia02c3b90245e808085c3f92fdf5f23044fc04665
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Add the dsi driver implementation for
DSI version 3.0. Use the panel information
retrieved from the 'dts' to configure the
interface parameters.
Add the device tree binding file to specify the
basic configuration and panel features.
Change-Id: I6a3677401454ad1d2bc29b0b845b0366eb7842b7
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
MSM controller for slimbus usually uses a BAM pipe to receive control
data. However, some targets may not have a BAM pipe assinged for
receiving this data. In that case, RX data should be received using
direct register access instead.
Introduce a Device-Tree property to change this access.
Change-Id: I9bb1502f25e0e855937bc6fb4131f55348d04794
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Add the PWM devicetree bindings for the PWM/LPG device present in
Qualcomm PM8941 chipset. Also make the necessary changes to the driver
to comply with the devicetree binding requirements.
Change-Id: I8124e2541028719e5b747bc85ff548ac109a9735
Signed-off-by: Jay Chokshi <jchokshi@codeaurora.org>
kickstart bridge driver will be used to download boot images
to mdm, ram-dumps and efs sync.
Change-Id: Id35e2da664ebf4a16c84d6fb67fbf38a2855356a
Signed-off-by: Vamsi Krishna <vskrishn@codeaurora.org>
Add device tree parsing to common msm ion code
to allow new targets to specify ION heap configuration
in device tree.
Document the device tree bindings for ION.
Change-Id: I40b7f4b1fbb3ca4ad1d6dc06a33b647f6af1d669
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Add USB bam changes to support QDSS in msm-8794.
Main additions:
Support device-tree files.
Add disconnect bam pipe support.
Add new API to retrieve pipe connection: get_bam2bam_connection_info.
Change-Id: I200d44dee319b8a9efda31b238c99202efddaa07
Signed-off-by: Shimrit Malichi <smalichi@codeaurora.org>
Document required information for camera hardware blocks
to support device tree.
Change-Id: Ia0fceb1091ac5ae7867dcd83691ab7613eb71e42
Signed-off-by: Kevin Chan <ktchan@codeaurora.org>
Add audio OCMEM driver support to exercise On-Chip
Memory (OCMEM) for low power audio and voice. The
driver is implemented as standalone and it gets
exercised based on the usecase. Also, this design
reduces the latency associated with OCMEM handshaking
protocol. The audio OCMEM driver is enabled by default
with a Kconfig option using select. Add device tree node
for audio OCMEM to retrieve platform data.
Change-Id: Iba46ce675fc03843d88cd7cf2aa9bc92fe70a955
Signed-off-by: Phani Kumar Uppalapati <phanik@codeaurora.org>
Register slimbus CPU dai link to support slimbus data path.
Change-Id: I3584306ac1e0ad6561a19cecfe71f2a63aadafa9
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
This is an initial driver for the new QPIC based NAND controller(NANDc)
that is introduced in MDM9x25. This driver has been leveraged from the
current driver msm_nand.c and is modified for the new hardware changes
in QPIC NANDc. Addition of SPS/BAM support is one of the major
hardware changes in new controller. It also supports only BCH ECC and
based on the device capabilities either 4 bit or 8 bit BCH ECC will
be used. This driver is based on the device tree architecture.
Change-Id: Ie9f782a796bd7c1506997e8eaa1e797310dc26a0
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Add device tree information for NAND controller. Also, add
documentation defining bindings for NAND controller and MTD
flash partition layout for NAND devices.
Change-Id: I6eaf949a54a19aacd3249711033563efd7fd90c2
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Refactor the IOMMU clock control code to always require a
core clock as well as an interface clock. Add support for
an optional alternate core clock and update device tree
bindings accordingly. Clean up the probe function to remove
needless enabling / disabling of clocks.
Change-Id: I4d744ffabc1e6fb123bacfda324f64408257cb25
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The QPNP VADC driver supports the User Bank Peripheral of
the voltage ADC(VADC).
VADC is a 15 bit ADC that measures signals through the
Main analog multiplexer (AMUX) and PREMUX. The driver
arbitrates the request to issue ADC read requests.
VADC driver includes support for the conversion sequencer.
The conversion sequencer is a HW triggered signal to start
ADC measurement on trigger events for PA ON,
camera flash and TX threshold.
The AMUX supports external pull-ups simultaneously. Clients
can select the appropriate AMUX input channel to measure the
ADC for the intended pull up configuration.
Change-Id: I8886968ccec54ad03334b113b4516d4d200e0da8
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Use the label property to specify device labels instead of
a vendor-specific property.
Change-Id: I74f3b57db469781f738f0d52c785d992c1e88efb
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Video driver manages clock rate according
to the increase in load on video core. Clock
is scaled as per number of macroblocks
decoded/encoded per second. This makes sure
that the power consumption and performance is
optimal.
Change-Id: If8aede0e3048cdc9bcdf14ce0c239a58bdd5d263
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
The current MPM driver works for targets where the interrupt controllers
operate in a legacy mode, where the linux irqs are at a constant offset
from the hardware irqs. On newer targets, the mapping within the
interrupt controllers are no longer restricted to legacy mode.
The change also address the interface changes in the MPM hardware
starting with 8974 chipsets.
Change-Id: Ide9b5bf7e29c94a85e37d04cd0064864b89f7c5c
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Add device tree bindings and driver support for the cache
error reporting devices on 8974. Remove leftover
opportunistic debug info from the L1 error handler, since
we can no longer get away with this on all targets.
Change-Id: Iac88915a6b40a40ec3157027048f4daf6369dc42
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Bug fixes to get RPM assisted power collapse working.
Unstable behavior was seen because L2 SPM state wasn't
being reset as part of exiting power collapse.
RPM driver callbacks were being missed because the
resource type comparison from the callback with the
resource type maintained at lpm_resources was failing
due to endian related issues.RPM sleep set processing
fails because vdd-dig resource doesn't use absolute
voltage values but voltage corner values.
Change-Id: I5b7218ba87574f2e7296378ded5e86fcac085203
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
- Add a front end DAI link for compressed audio driver.
- Add device tree specific changes to sound soc compressed
drivers which will help the detection of sound card.
Change-Id: I4a8076df8c82cd4e444fc0d68e8f7a228bd1dc02
Signed-off-by: Harmandeep Singh <hsingh@codeaurora.org>
SDC1 and SDC2 interfaces on copper target has dedicated
TLMM pins and SDC3, SDC4 have GPIOs muxed with other
subsystems.
Change-Id: I6f924ccb0c27e8ecde95c0a7d8beb6614c25378d
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
Video driver uses PIL and IOMMU to download video
firmware.Video firmware is downloaded during the
start of video session using PIL apis.
Change-Id: If285e9b6df57ecdfa379fa82b9eef542e6aa9bba
Signed-off-by: Vinay Kalia <vkalia@codeaurora.org>
Add the On-chip memory(OCMEM) device to the msm8974 device tree.
OCMEM is a high speed memory device used by various subsystems.
Change-Id: I08da5b088e5f48e6ed935a38da5a708fcdbaf670
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Add support in the rpm-regulator-smd driver for the "bypa"
bypass mode disallow parameter. This parameter can be used to
instruct the RPM that a given LDO should never be put into
bypass mode because its load is sensitive to voltage supply
noise.
Change-Id: I34fdcdb88107f94b78f2ace4a0512fe4ca94779c
Signed-off-by: David Collins <collinsd@codeaurora.org>
Update the voltage corner mapping used by the rpm-regulator-smd
driver to match what is being used inside of the RPM.
In particular, an explicit "none" corner value has been inserted
with value 0 which pushes all of the other corners up by 1.
Change-Id: I34b4285f88e7e9d23d7accf4ccbf9cebff591754
Signed-off-by: David Collins <collinsd@codeaurora.org>
Document the appropriate bindings so the register trace buffer (RTB)
can be used on targets that support device tree.
Change-Id: Iafd2cbca20489fb27ada0b982e012ee74f7b07c1
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
To get large contiguous memory allocations, a dedicated carved out
memory pool is created. The size of this pool is determined by the
sizes declared by devices. Add size bindings so drivers can increase
the size needed for reservations. Also add bindings to allow drivers
to reserve memory with memblock_reserve to reserve specific memory
regions.
Change-Id: Icc51aef5069a7964c03c5c52f24e40b96f4b2781
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
The power-on module of the PMIC provides support for
power-key, reset and power on/off reasons and other
power-on related functionality.
The driver currently supports only the power-key detection.
Change-Id: If7d42ce38fba6e9a590d0953daadcd43ab746112
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
A 32 bit RTC is housed inside PMIC. The RTC driver
uses SPMI interface to communicate with the RTC module.
RTC device is divided into two sub-peripherals:
1. RTC read-write peripheral having basic RTC registers.
2. Alarm peripheral for controlling alarm.
RTC peripherals are children of SPMI device and driver
receives it's configuration parameters (such as alarm
powerup feature to powerup phone using alarm interrupt)
from device tree.
Change-Id: I46a2ffc0f6c9c5ee174cf803de19e656da7ce088
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
MSM8974 TSENS block supports 11 temperature
sensors that are used for thermal mitigation.
The TSENS driver is part of the thermal sysfs
framework that allows clients to set thresholds
and receive notification on temperature thresholds
being crossed through thermal sysfs.
The driver provides ability to thermal clients
to set upper/lower thresholds for each sensor
and receive individual notification for each
sensor once the threshold is crossed.
All sensors are enabled by default during
driver initialization.
The driver is initialized early during kernel
initialization to provide capability to the
thermal kernel driver to read temperature
from the TSENS sensors. To support this feature
a kernel API is provide to read the TSENS
temperature.
Change-Id: If17daae81cfb522a9cea786b5db0c920adb5ed2d
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Update the DTS bindings documentation to include the
vdd-supply regulator property.
Change-Id: I006dbbcf55cfdf07604c64380ce227f30f6cc75a
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add device tree support for qcedev and qcrypto device drivers.
Add documentations for associated bindings.
Change-Id: Ib76986af5d9e30263a559329acbca401ec3304d2
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Since the IOMMU ID registers are only accessible by the
secure environment, specify the SMT sizes in device tree
so that the IOMMU driver knows how many SMRs to initialize.
Change-Id: I614a51069c0304f71b0c7d061d97aca0289c17ea
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Venus PIL platform driver is used to bring Venus Video subsystem
out of the reset and start executing code. It also supports
shutting down the subsystem to save power when it is not in use.
Change-Id: I6e305efe548524fc71ee2fa2fba05b6b2b783ff7
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
This patch adds support for CMA to dma-mapping subsystem for ARM
architecture. By default a global CMA area is used, but specific devices
are allowed to have their private memory areas if required (they can be
created with dma_declare_contiguous() function during board
initialisation).
Contiguous memory areas reserved for DMA are remapped with 2-level page
tables on boot. Once a buffer is requested, a low memory kernel mapping
is updated to to match requested memory access type.
GFP_ATOMIC allocations are performed from special pool which is created
early during boot. This way remapping page attributes is not needed on
allocation time.
CMA has been enabled unconditionally for ARMv6+ systems.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>
Conflicts:
arch/arm/include/asm/mach/map.h
arch/arm/mm/init.c
arch/arm/mm/mm.h
arch/arm/mm/mmu.c
Change-Id: I85e3b43a9fa1e3c4d33cbc85fff6dee1b815041d
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
DWC3 has separate irq line for OTG interrupts (e.g. ID / BSV).
These interrupts are needed to detect cable connect and disconnect
events. Hence, request for this interrupt line from OTG driver.
Also, update device tree binding documentation for DWC3 core.
Change-Id: Ie97e4b3b5dcf840eabeb01b5c5d6531a8a70a3c9
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Add device tree support to sound soc audio drivers.
These drivers get registered to the alsa framework
and thus aid detection of soundcard.
Change the device tree entries to follow the new
design approach of having individual probe functions
for each audio interface.
Change-Id: Ie8f0bddd5ba6e2cfb66c6a23efdcb434c5082d7d
Signed-off-by: Phani Kumar Uppalapati <phanik@codeaurora.org>
Add necessary match table so this driver can be used in
Device Tree configurations
Change-Id: I4e7fd0c1bb1d9f22296f70cf5710016b10046cd5
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
SDC controllers need two types of power supply:
- vdd (SD/eMMC flash core power supply)
- vdd_io (SD/eMMC I/O pad power supply)
Add support for enable, disable, low power mode setting
for these regulators.
Change-Id: Ifd0ef0d4dd9732893f49700fe86b1dad24497f71
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
The Contiguous Memory Allocator is a set of helper functions for DMA
mapping framework that improves allocations of contiguous memory chunks.
CMA grabs memory on system boot, marks it with MIGRATE_CMA migrate type
and gives back to the system. Kernel is allowed to allocate only movable
pages within CMA's managed memory so that it can be used for example for
page cache when DMA mapping do not use it. On
dma_alloc_from_contiguous() request such pages are migrated out of CMA
area to free required contiguous block and fulfill the request. This
allows to allocate large contiguous chunks of memory at any time
assuming that there is enough free memory available in the system.
This code is heavily based on earlier works by Michal Nazarewicz.
Change-Id: I8a04c58b0d39ee7343ac0b58b6dad9d57912c91d
[lauraa: fixed Kconfig conflict]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
The official name for copper is MSM8974.
Switch to it.
Change-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Add support in the rpm-regulator-smd driver for the "corn"
voltage corner parameter. It can be used with some regulators in
order to specify voltage performance corners instead of discrete
voltages.
Initial support is provided for MSM8974 SMPS 2 (VDD_Dig).
Change-Id: Icac67a1e5594d0aa54f3f6bd8aa8ac1edacc36d9
Signed-off-by: David Collins <collinsd@codeaurora.org>
In case of a watchdog bark time out, dump
the cpu alive mask and last pet time, to determine cpu
hangs or deadlock scenarios as cause of the timeout.
In case of a kernel panic, adjust bark and bite
timeouts based on panic timeout, to allow for completion
of panic handling prior to watchdog bark or bite.
Change-Id: I4401db681cbad54abb0f14ae84550fc63663fb04
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
The test scheduler allows testing a block device by dispatching
specific requests according to the test case and declare PASS/FAIL
according to the requests completion error code
Change-Id: Ief91f9fed6e3c3c75627d27264d5252ea14f10ad
Signed-off-by: Maya Erez <merez@codeaurora.org>
Add mpp support to the qpnp-pin driver. MPP support allows for
additional devices to be specified in the Device Tree topology.
This support is implemented in the same driver as the GPIO
support since the address map is very close between them.
The addition of this support does not change the existing gpio
support.
Default MPP configuration can be specified in the Device Tree
using the three new bindings for mpp. Any attribute not specified
in the Device Tree will assume its default configuration.
It's also possible to configure an MPP at runtime using the
existing qpnp_pin_config() API. If a given configuration feature
is not supported by the underlying hardware pin, then that
particular request is silently dropped with no error. This allows
for gpio users to continue specifying only a subset of the full
qpnp_pin_cfg structure.
Change-Id: I2b72768647de2a371edfa05c52fc1ed776c215c0
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
qpnp-gpio manages gpio_chip queries based on the slave
ID. This has a limitation in that it restricts the number of
gpio_chips per slave ID to one. However, some PMICs have both MPP
and GPIO on the same slave, and thus the slave ID is not a
meaningful unit to search for.
Instead, make use of the 'label' binding to give the
primary dev-container node a name. This name will serve as the
gpio_chip label, which can be used in lookups.
Change-Id: Ic20caeb4622d73449a983992275446c733ddd89a
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since QPNP PMICs also include support for MPP, and since we
intend to support MPPs in the same code base, it's not
appropriate to limit this the scope of this driver to 'gpio'.
Change the driver name to 'pin' since it more accurately
describes the potential for this driver.
Also update the Device Tree include files for the name changes.
Remove a superflous 'gpio-pin' definition in the msmcopper
specific include file, since such configuration shall never
change. This binding should be defined in the PMIC specific
include only.
Change-Id: Id1d6407039908e3cf44dfc19af71f0cdc7aff8e6
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Since we support multiple device_nodes per spmi_device when used
with the spmi-dev-container flag, it's often unclear how a driver
should make reference to a particular device. Therefore,
introduce the spmi specific binding spmi-dev-name that specifies
the device name for the device_node.
Also introduce an API that can be used from
the driver to lookup the specific device node associated with a
particular device name.
Note that it may seem at first glance that the binding 'label' is
redundant with device_node->name. However, per the ePAPR,
device_node->name is intended to be as generic as possible,
representing the function of the device and not the precise
programming model. 'label' is used to give a platform
specific name that can be queried from device drivers.
Change-Id: I28eca35d0b625372c26a6d8ad81e7679f200d14b
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
reg-names and interrupt-names are standard bindings to map device
tree reg and interrupt indices to particular names. This way the
driver does not need to be concerned with hard coded assignments.
Therefore, add spmi support for these bindings.
Explicit support for reg-names is required since the
implementation does not make use of of_address_to_resource(),
which happens to already support this.
This is because of_address_to_resource() mandates address
translation, which is not relevant to spmi.
interrupt-names is already implicitly handled by
of_irq_to_resource(), which is used in the spmi implementation.
Add additional documentation to state clearly that this binding
is also supported.
Also add supporting routines to easily lookup a resource by name
for both registers and interrupts.
Change-Id: I94faf950da5106ecd4ff36f47e5b46102d9bd426
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Code changes to add support for Low Power Resource Manager Driver.
This code will manage PXO, VDD dig and Vdd mem based on the idle
mode the kernel chooses and updates the RPM sleep vote accordingly.
Change-Id: If3af14920e17c010c8e77b550ab57d532b32e6cd
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
The SPM device tree entry to configure L2 SAW doesn't distinguish
between Krait and L2 SAW low power modes. Update the device tree to
differentiate between L2 and Krait low power modes.
Change-Id: I6c7cf6f8dd10478fd53826e22b17ed98d46b68b4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Remove tzcom driver components that includes files,
clock definitions. Currently tzcom driver has been replaced
by qseecom driver.
Change-Id: I1832d921a7b949057b84a7e0aa9afaa445be5194
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
The write packing control will ensure that read requests latency is
not increased due to long write packed commands.
The trigger for enabling the write packing is managing to pack several
write requests. The number of potential packed requests that will trigger
the packing can be configured via sysfs by writing the required value to:
/sys/block/<block_dev_name>/num_wr_reqs_to_start_packing.
The trigger for disabling the write packing is fetching a read request.
Change-Id: I982170fa6dca9150ea4310bb546b838b7fd30e9b
Signed-off-by: Maya Erez <merez@codeaurora.org>
Added text file which describes MPQ DVB adapter implementation
and the extensions made for linux DVB core
Change-Id: I50df66a8bec52c224dd00be205ffc022c4d1f13a
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
SMMU v2 is based off the ARM SMMU architecture specification.
The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory. In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.
The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.
Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
This new mode allows Neighbor discovery packets to be sent to userspace
without regards to the state of the forwarding setting. Without this, NDP
packets addressed to the host are still received, but those for other
addresses are not.
Enabling this mode allows NDP proxying to be performed from userspace.
Change-Id: I69b7a7c0c42e3253c42d6f2e163c0ce1d848aed6
Signed-off-by: Jaime Lopez <jaimel@codeaurora.org>
The header file was renamed to pm_qos.h in e8db0be (PM QoS: Move
and rename the implementation files, 2011-08-25) but this
documentation wasn't updated. Update it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add device tree support for MSM HSUSB. The OTG driver registers
gadget and host platform devices based on the operational mode.
This patch also updates the copper device tree source file with
HSUSB device specifics.
Change-Id: I0a50b0500d15f32ff65468cdb411398a80a20329
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Add MSM USB3.0 super-speed controller.
The MSM USB3.0 controller is a wrapper of Synopsys's DesignWare
USB3.0 controller which also includes other HW units as the DBM.
The copper device-tree now includes a new device for this controller,
which will be attached to the dwc3-msm.c driver.
The dwc3-msm.c driver will be used for MSM specific operations of USB3.0
(as managing the DBM) and for now it just add in runtime a core dwc3 device
that will be attached to the dwc3/core.c driver.
Change-Id: I1e0a9144971b2de533d4d1ce7ac5f0c3584d1930
Signed-off-by: Amit Blay <ablay@codeaurora.org>
Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
An EHSET test fixture is used to initiate test modes on an embedded
host controller while performing the usb host compliance testing.
During enumeration by the USB host this test fixture presents a VID/PID
pair and this PID value corresponds to the requested testmode.
Change-Id: I7558f9c1c37b3c65be2b358d964b295593c021d9
CRs-Fixed: 174266
Signed-off-by: Manu Gautam <mgautam@qualcomm.com>
Extend the of_get_regulator_init_data function so that it can
parse an additional property from regulator device tree nodes
which is needed to support non-device tree consumers.
The new property is named qcom,consumer-supplies. Its value
is a list of strings of the form:
qcom,consumer-supplies = "supply_name1", "device_name1",
"supply_name2", "device_name2", ...
Change-Id: Ia689d04e6de568e6889b807eed15df3116de01d2
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add the qpnp-regulator driver to support regulators found in
Qualcomm plug-and-play (QPNP) PMIC chips. QPNP chips make use of
Qualcomm's SPMI register convention. The particular hardware
characteristics of a given regulator can be derived from the
values present in the type and subtype registers.
The qpnp-regulator driver supports probing with either device tree
device specification or with board file specified platform data.
Change-Id: I4f74431a50949763d651faf992b5d2567d05758e
Signed-off-by: David Collins <collinsd@codeaurora.org>
[sboyd: Squash in DT binding document]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The spmi-dev-container binding is intended for SPMI
configurations that have multiple device nodes associated with
only one spmi_device. By default, if this flag is not specified,
each device node will create a new spmi_device.
Sometimes having multiple spmi_devices for SPMI device nodes is
superfluous. One example of this is gpios. In some architectures,
a single gpio is treated as a unique device. But from a gpio_chip
perspective, the chip is comprised of many gpios. Beyond wasting
memory allocating a unique spmi_device per gpio, the implication
of not coalescing spmi_devices is that the clients probe() routine
would be called N number of times. But this sort of behavior makes
it difficult to realize when a gpio_chip starts and stops. If we
assume that one gpio_chip represents one call to probe(), then
this problem is solved, since all gpios in that chip will be
passed as resources.
In order to support multiple device nodes per spmi_device, we
also need to extend the data structures for spmi_resources.
This change also makes an effort to cleanup some of the error
handling for illegal combinations of device bindings, as well as
adding some additional documentation.
Change-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This binding is currently used to indicate all devices existing
in the same slave. Let's change the name to be more meaningful.
The real motivation here is that we want to introduce a new
binding to specify all qpnp devices existing in the same
spmi_device. So spmi-dev-container is a more meaningful name for
that usecase, and spmi-slave-container better describes the
former.
Change-Id: I48f834b9cff9ea90d05f5e958ca21bef0ab56a86
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and
is used to communication with one or more PMIC (slave) devices on the
SPMI bus. The PMIC Arbiter is actually a hardware wrapper around the
SPMI controller that provides concurrent and autonomous PMIC access
to various entities that need to communicate with the PMIC.
The SPMI controller hardware handles all of the SPMI bus activity (bus
arbitration, sequence start condition, transmission of frames, etc).
This software driver uses the PMIC Arbiter register interface to
initiate command sequences on the SPMI bus. The status register is
read to determine when the command sequence has completed and whether
or not it completed successfully.
Request Capable Slave (RCS) devices can initiate a master write
command sequence on the SPMI bus that the can be decoded by the
bus master and used to generate interrupts.
Change-Id: I037fefc946ccb5b8e0b04da856a3a96effe1c7e4
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This change adds SPMI Device Tree parsing. The
of_spmi_register_devices() API should be called from the probe()
routine of each SPMI controller to parse the subtree and add the
respective SPMI devices.
The SPMI subtree is nested up to two levels deep. The first level
is the most basic and treats the address as the SPMI slave ID.
This should be used for simple devices that has no notion of
segmented SPMI address spaces.
An optional second level specifies the address as an offset
within the outer layer's slave ID. This is used to specify
multiple devices on the same slave ID that have different address
ranges. In fact, it's reasonable to specify any number of address
ranges at this level.
Devices can also specify any number of interrupts that's decoding
is done by an external interrupt device.
Sections of this code were taken from drivers/of/platform.c.
Change-Id: Ib9f06764a9bd85e3b2aab43b72aa7132885aa044
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Including the following patches:
commit 0f7723bb09440ae69743fed38cf558a838aa9bdf
Author: Bryan Huntsman <bryanh@codeaurora.org>
Date: Thu Oct 6 23:13:56 2011 -0700
Revert "spi_qsd: GPIO configuration changes for SPI chip-select line"
This reverts commit 7eaa08b75995289a91c7dd1f3616f79227f5f923.
Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>
commit 7eaa08b75995289a91c7dd1f3616f79227f5f923
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 28 16:26:39 2011 -0600
spi_qsd: GPIO configuration changes for SPI chip-select line
The chip-select GPIO's pertaining to each slave remains in suspended
configuration until the first transfer is intiated by the slave.
Change-Id: I3aa8555289be7ce457b91a969cf03909be0965d7
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e47df9f9b932968152ab2908153e60adab4402d7
Author: Jordan Crouse <jcrouse@codeaurora.org>
Date: Mon Sep 19 11:21:16 2011 -0600
spi_qsd: Fix possible uninitialized variable
Change-Id: Ic0dedbad184046e9835cde015ad5d592f33e82a6
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
commit 4ae02c76b98f2b96bfb8c4fa02f40cfda2f16f97
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Sep 20 17:28:50 2011 -0600
spi_qsd: Fix Klocwork errors in SPI driver
Change-Id: I1fe6632e68ea625966aced37a1b140b30534e101
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 52e065ba3d86977b59937693ac7e85836cf4eca8
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Sep 1 12:12:58 2011 -0600
spi_qsd: Fix for SPI Operational State Invalid error
This error is reproted randomly when the SPI core is put
into RUN state and occurs when the ACPU clock is low.
When the timer expires, we check again to ensure that the
STATE_VALID bit is set before returning.
Change-Id: Ic8912534f4924efd999b8aa1d75a9fd19749e870
CRs-fixed: 304672
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a9a8816913e5466e06b443c42cbf8ae866b95fd1
Author: Jeff Ohlstein <johlstei@codeaurora.org>
Date: Fri Sep 2 13:55:16 2011 -0700
msm: dma: remove crci conflict checking
The crci conflict checking code was designed for a system where a crci's
mux could be changed at runtime. In reality, our chips configure these
statically, so it is not necessary.
Change-Id: I4d5f32cd8728d3c78fca8f64aed0e02b57b6afba
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
commit 36c6f1bb48af3e65db281cc7ccb913a8e81a598e
Author: Matt Wagantall <mattw@codeaurora.org>
Date: Wed Aug 17 15:44:58 2011 -0700
msm: clock: Rename all I2C/SPI clocks to 'core_clk' or "iface_clk"
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name.
Change-Id: Iab12caf4eab163773d68f1b2adc1bb4c72c69e83
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
commit 55e656e68cac78eaa367341df2e693a483a53f84
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon Jun 6 14:34:38 2011 -0700
drivers: barriers: Replace dsb() with mb()
Replace explicit dsb() calls with mb(). Now that the
generic ARM implementation defines mb() to mean (at least)
dsb(), it is appropriate to switch back to the generic
kernel version of the barriers. This is also needed for
correctness on certain targets (such as 7x27) where dsb()
is insufficient and other operations (such as outer cache
sync or writing to strongly-ordered memory) are required to
ensure proper I/O operations ordering. In some cases,
remove explicit calls to outer_sync following a barrier
since the barrier will now have an explicit outer_sync
call.
Change-Id: I2c53b8534af9c3cbac4d4d77b322f897a39e7758
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit 17194a32164b868f80ce84e313f9148d1dc77e7b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 3 18:10:09 2011 -0600
spi_qsd: GPIO configuration changes
On suspend, the SPI related GPIO's enter a low power configuration
and on resume they move to an active configuration. This helps
conserving power during power collapse.
Change-Id: I0911867e10fadcfc6950f6dddf74226bd6321c16
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 1777d88688511cd59bad7674c6a2246e0c93142b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Jun 1 16:54:07 2011 -0600
spi_qsd: Remove restriction on SPI clock speed.
When multiple slaves are connected to the SPI controller,
the driver does not allow the clock to go from lower speed
to a higher speed. This restriction is not required since
there can only be one slave listening at a time. Also,
there are no hardware limitations in doing so.
Change-Id: I4ecabfb3a1515416f050c18678cf0987dcde9d1e
CRs-fixed: 290127
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 4b7c7bfc546cb02141da9d034421aefe5635f857
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 7 14:18:42 2011 -0600
spi_qsd: Add null pointer check before dereferencing
During probe, there is no cur_msg to set the status.
Change-Id: I82e00b9d74d45c36b70078b171db1bb150d1bfac
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit bf514c766fcc2bdee680f80a2ea16c7fead0be96
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon May 16 13:37:11 2011 -0700
msm: spi: Fix access to unclocked registers
Don't program the GSBI configuration until the clocks have
been turned on.
Change-Id: Idee5f5dffcb5ed0f7de18f1e508ee8c76b618894
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit d9c248213f4cd025f3d3586f0de81e4bc44a5a54
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon May 16 16:43:08 2011 -0600
spi_qsd: Fix for SPI input overrun error
This error occurs due to a bug in the controller.
This bogus error is reported when a transition from run
to reset state occurs and if the input FIFO has an odd number
of entries.
Change-Id: I555864d4855ac6d416997da69d8bc6aee7a82178
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e99ceb5b3da7bec51be853809c25df8e32b2c1e6
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Apr 14 18:36:34 2011 -0600
spi_qsd: Multi-transfer handling
When there are mulitple SPI transfers in a message, we
default to using FIFO mode for all the transfers. As special
case, we handle a WR-WR or WR-RD transfer where we choose
between FIFO mode and DM mode based on the total length of
the transaction.
Change-Id: I6fbc1a06a22f9782db5b97c9b87cc53392a8c2fa
CRs-fixed: 276666
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 8f3d3aaa51603a929027bc820fe2d3515e959779
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Apr 19 14:19:29 2011 -0600
spi_qsd: Ensure IO operation ordering
Adding memory barriers to ensure that the writes and reads
to the SPI and QUP registers happen in the correct order.
Change-Id: I86d8f63b0e9547a2339ee4ab5c713cf8864fef04
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 36b3fae5f54230cd1e4ca072d1f55cb2f79d8945
Author: Laura Abbott <lauraa@codeaurora.org>
Date: Thu Oct 14 12:48:16 2010 -0700
spi_qsd: Fix section mismatch
The function msm_spi_probe is referenced outside of the __init section.
This fixes the problem by calling platform_driver_probe instead of
platform_driver_register since this device is not hotplugable.
Change-Id: I3a563c6fc562ada959317b54ff60a38f9ce517d8
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
commit dc2e36eecefb6628031afeff28afd9d97f2f3f6f
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 29 16:58:20 2010 -0600
spi_qsd: Changes to support DM mode.
The dma_config function may not always be present.
This change makes sure the driver gets DM resources
irrespective of the dma_config function.
Change-Id: I25a2497d20e973f22b76f2b5d6f68c86bd4d5f1d
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a39bd4a398674c320925540eec91d94d2b7d53f3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Aug 19 17:48:01 2010 -0600
spi_qsd: Modify timeout mechanism to check SPI state valid bit.
In order to allow sufficient time for the SPI state
transition to occur, calculate the timeout based on
the SPI clock speed.
Change-Id: I3d6955b2a64a8bf8980590e352fbd564250210fb
CRs-fixed: 250998
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b5887b644ba9545672d637985713c7e0e2e5bb50
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Aug 3 16:57:33 2010 -0600
spi_qsd: Use FIFO mode when DM mode configuration fails.
When the Data Mover configuration fails, the driver
uses FIFO mode.
Change-Id: Iaf83e50fe725654c58260c5cd1150cdeb56f51c8
CRs-fixed: 249238
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit ced8ad320d480006643a3aa3474f5c0d77457454
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon Jun 28 16:01:33 2010 -0600
spi_qsd: Use SW timeout instead of SPI_TIME_OUT register.
Since the software timeout is already present in the driver,
the hardware SPI_TIME_OUT register is being removed.It is just
redundant and used only for debugging purposes.
Change-Id: I829cb944444fc3e5053bc810adffe2b87f511b63
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 35e9155f59317e8ef63b8ce5190f26f5cae6a8ee
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 25 16:48:25 2010 -0600
spi_qsd: Disable irqs in the probe function.
The irqs are disabled at all times in the probe function
irrespective of the use of remote lock.
Change-Id: I0997d07b93c97a12bca6d80a9bba59682b1bec3e
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e6af92d74a35ba267125bc61c2c6c18034c03af3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 22 12:20:46 2010 -0600
spi_qsd: Disable clocks and irqs when SPI bus is not in use.
The SPI clocks and irqs are enabled per workqueue and correspondingly
disabled once the workqueue is completed.
Change-Id: Ib22b7e3b946eb4c829940e43327caaf5aff7721b
CRs-fixed: 242866
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b25e4220efdacc231cb150fc263af1e3f525b165
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Jun 8 15:25:47 2010 +0300
spi_qsd: Add usage of MX_WRITE_COUNT register
Use MX_WRITE_COUNT register to reduce the amount of TX interrupts in
FIFO mode for transfers smaller than FIFO size.
Change-Id: I7208fdc85b626a31a8b781ee5c56f73beee6c427
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 7ed56f3441c5ebe7fd8107fb8468207a88bc743f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Jun 9 16:14:44 2010 +0300
spi_qsd: Minor changes to support Data Mover mode on QUPe core
Minor changes to support Data Mover made on QUPe core.
Change-Id: I54663115a43f7fd9b52a2ddee796b5499d5f239a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a85fd0ab6484eb2ef404c062adffce1ee22337f1
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Jun 3 13:57:02 2010 +0300
spi_qsd: Add support for QUPe controller
QUPe controller is a new version of Qualcomm SPI controller. The
controller also supports other peripheral protocols, however its SPI
functionality is very similar to previous SPI core, supported by spi_qsd.
Therefore the same driver is being utilized with some register address
modification and minor flow change.
Change-Id: Ic091ef2c2ed699b43f786c278b613e69a7e9039b
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit ce270f6f9198cf40ee5638b35e595da81116241e
Author: Jeff Ohlstein <johlstei@quicinc.com>
Date: Thu Apr 29 13:40:53 2010 -0700
drivers: spi: Support ADM3 in spi_qsd driver
Change-Id: I6dfa38a4c33a8e4619d56ce30787e1aeafc8356d
Signed-off-by: Jeff Ohlstein <johlstei@quicinc.com>
commit 47346fa611773ef92d12d9145ea33a7f2c79052f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 28 11:33:15 2010 +0300
spi_qsd: Add disable/enable of pclk to suspend/resume functions
Add disable/enable of pclk to suspend/resume functions to improve
power performance.
Change-Id: I871e5ac90a998f2942778bb1e8c2c9d583a9ae00
CRs-fixed: 235046
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a96eba98fbbd21ac657f5d551466909352766ead
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:40:37 2010 +0300
spi_qsd: Making irq code implicit for the core mode in use
Make code clear regarding what mode is in use in the irq.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 6a02d85f8f48cf6f86cddc38c9fce9c1179208b4
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Apr 13 21:16:45 2010 +0300
spi_qsd: Separate tx/rx/error statistics between contexts
To improve SMP safety, separate the tx/error statistics between
contexts. This protects the statistics from accidentally being
access from another context at the same time.
Change-Id: Ibc52406e7b06a4bb5142f8a09a2f35442cb9df8a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 31f301c171aab8e42f8b6abe9b7866412cb546a8
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Mar 23 14:51:00 2010 +0200
spi_qsd: Add better handling for pending transfers during suspend
To improve SMP safety, add better handling in suspend function to wait
for graceful closure of pending transfers. This graceful closure waits
for all the pending transfers to finish or timeout, while not allowing new
ones to queue up. This allows correct handling of all the resources
involved in a transfer before suspend.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 8fbf6e4c5371520b5f9de2001e2ebd15773e918b
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Mar 25 10:44:10 2010 +0200
spi_qsd: Add mutex to get exclusive access to controller registers
To improve SMP safety, add mutex to get exclusive access to controller
registers.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 9405adda67d8c6a856243e599f09d806b4bc6de5
Author: Kenneth Heitke <kheitke@quicinc.com>
Date: Thu Apr 15 16:33:16 2010 -0600
spi_qsd: Move global input_fifo_size to device context.
Fix reference to device data input_fifo_size which is missing from the
previous patch.
Change-Id: Ia469896edd0fd90d7ded2b8ec44f9075474b3ec8
Signed-off-by: Kenneth Heitke <kheitke@quicinc.com>
commit 6031094ca6a940a47437bc6a092e813b4bc41d2a
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:34:48 2010 +0300
spi_qsd: Move global input_fifo_size to device context.
To improve SMP safety move global variable input_fifo_size to device
context.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 97f585033413b1f8ae210bbffd617a4af3462982
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 14 18:35:54 2010 +0300
spi_qsd: Initial contribution of the MSM SPI driver
This adds MSM SPI controller driver. The driver is SPI master, and
allows slave connections. Current version of the driver supports
FIFO and DM modes chosen upon the message size. The driver also
supports loopback mode which can be used for testing purposes.
This is a squashed version of all the MSM SPI driver changes on the QuIC
MSM 2.6.29 kernel which can be found at www.codeaurora.org.
It also contains all relevant adaptations to SPI core changes in 2.6.32
kernel.
https://www.codeaurora.org/gitweb/quic/la/?p=kernel/msm.git;a=blob;f=drivers/spi/spi_qsd.c;h=1c8e3ec727b29040648ef9a4949396f7109528ae;hb=refs/heads/android-msm-2.6.29b
Change-Id: Ibc1e71deb662af87deed77f10dcc8a3a46a8f012
Signed-off-by: Lena Salman <esalman@qualcomm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
Add a gpio_chip driver to support the Qualcomm SPMI PMIC
architecture called QPNP. The driver supports Device Tree
and allows a device_node to be registered as a gpio-controller.
The driver also specifies APIs to allow a non-Device Tree user
the ability to configure the PMIC GPIOs.
This driver does not handle interrupts for GPIOs directly.
Instead, that work is handled by the existing qpnp-int driver.
This is feasible since the interrupt register map for all
QPNP peripherals is the same.
Change-Id: I04eb39d9855b0957f0647010fcb203ec2fc83c7c
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
- The Trustzone Communicator driver provides interface for userspace
to communicate with TrustZone.
Change-Id: Id0dadacb9997d4a50e88f48ceb03540e1897df93
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Low level TSIF (Transport Stream InterFace) driver
provides in-kernel API to be used by upper layer
drivers;
included also is example for upper layer driver
that uses TSIF API and implements character device.
Signed-off-by: Vladimir Kondratiev <vkondrat@qualcomm.com>
Including:
commit 6bac783fae7e7c5a5bfc95e2cdc9b4f22ca53d44
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Thu Dec 20 18:30:40 2012 +0200
tspp: Disable read-complete interrupt
Read-complete interrupt can be generated from TSPP HW for test
purposes only. It is generated for each TS packet TSPP fetches from
TSIF interface. Having it enabled cause great load of interrupts
that are not used by the SW.
Change-Id: If2038f184a8b0904fba3e1cca5e110fd9daa52d3
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 81cee0596e3cdf8102bf8c8ef45e5f3a07fc8a4d
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Thu Nov 29 14:15:57 2012 +0200
tspp: Improve data-path handling
Existing driver allocated BAM descriptor at fixed sizes each
with interrupt flag set. Notification on data was received when
the descriptor is fully consumed by the HW. The descriptor size
on one hand need to be big enough so that we don't receive too much
interrupts for high-bitrate streams, and on other hand needs
to be small enough so that for low-bitrate stream we are not starved
waiting for data for a long period of time.
The change adds support of allocating small descriptors and set
interrupt flags on part of descriptors. In addition, expiration
timer is used so that if interrupt is not received after long period
of time the timer handler reports back descriptors are already ready
to be consumed. This allows low-rate of interrupts and
handling of low-bitrate streams.
As descriptors are smaller now (size of single TS packet), exposed
API within SW demux that handles a single packet to save the function
call to the API that handles multiple packets for efficiency. Information
regarding the new buffer allocation was added to debugfs.
CRs-Fixed: 420818
Change-Id: I4bb05177774ab0e0bad0737ca1106a0c33f843ae
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 44307d32e23a2bb2a190d88bb049cc34d1e20418
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Sun Nov 25 09:49:51 2012 +0200
misc: tspp: Enable notification of TSIF status and expose it in debugfs
Enable TSIF status interrupt to expose the following
information in debugfs:
- stat_rx_chunks: Counts number of TS packets chunks received from HW.
- stat_overflow: Counts number of times buffer has overflowed.
- stat_lost_sync: Counts number of times TSIF lost sync with input.
- stat_timeout: Counts number of times TSIF reached timeout
waiting for packets.
All counters can read and reset by writing to the respective file.
Change-Id: I475c2c0845c85ac22ea720059fb28c4a588fedcf
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 72b785570b265c6fcb4cb907c0c3a3a4b311f1f1
Author: Liron Kuch <lkuch@codeaurora.org>
Date: Tue Oct 30 17:47:50 2012 +0200
media: dvb: mpq: TSPP output buffer allocation by demux plugin
The TSPP driver can allocate its output buffers internally or
externally. External buffer allocation is required when Demux wishes
to use the ION driver to allocate a physically contiguous buffer
(e.g. to pass to TZ).
This commit improves the TSPP driver support for external buffer
allocation and implements the external memory allocation and free
functions in the Demux driver.
Change-Id: I71da4f18c090ef224c4fc7b23f55b9b3636be996
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>
commit 92705b3eb380826abf8ddefc25a8d210ffa64ff5
Author: Hamad Kadmany <hkadmany@codeaurora.org>
Date: Tue Oct 23 14:15:41 2012 +0200
tspp: Add option to inverse tsif signals
TSIF signals (clock, data, enable and sync) may be configured
to be inversed at TSPP unit input. This is useful in case
TSIF signals from external units need to be inversed.
Change-Id: Idd21948baccedc7499b31ed1d4df0f737538c870
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
commit 435ad8e2157eec5783a435f1e7ec47f67d759882
Author: Joel Nider <jnider@codeaurora.org>
Date: Wed Dec 14 16:53:30 2011 +0200
tspp: add kernel api for video demux component
The demux is an in-kernel software component whose purpose is to take
an incoming TSIF stream and split it into multiple output channels
based on the PID field in each TS packet. Each output channel can be
used for a different purpose, such as audio, video or channel
information. In order to get good performance when moving such large
data streams around, the demux was placed in kernel-space as to
prevent copying memory buffers between kernel-space and user-space, at
least at this early stage in processing the traffic. Originally the
design of the TSPP driver was based on the earlier TSIF driver, so it
contained only a user-space API.
Change-Id: I22799eb19d9049e3635d5c589b02f999d9b8e1c7
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit 6544f3e52c9c1707a5a8fa90d32f89d80dabb4b9
Author: Joel Nider <jnider@codeaurora.org>
Date: Tue Jul 10 13:50:06 2012 +0300
tspp: use new clock preparation functions
Replace the clk_enable() with clk_prepare_enable() and replace
clk_disable() with clk_disable_unprepare() functions.
Change-Id: I63479090eccbeac46f091bf95faeb857139d23a4
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit b9662ca49cfe619e076476dcf8297a4031f0c310
Author: Joel Nider <jnider@codeaurora.org>
Date: Sun Jun 10 14:21:11 2012 +0300
tspp: use device name when getting clock
The new method for requesting clocks requires a driver to pass its
device name for comparison to the list of available clocks.
Change-Id: Ica5b09447de177beead90f8b7c721b84820fbdf7
Signed-off-by: Joel Nider <jnider@codeaurora.org>
commit 5556a8524591e4d1c4c9188316551900e8b8382d
Author: Joel Nider <jnider@codeaurora.org>
Date: Sun Oct 16 10:52:13 2011 +0200
misc: tspp: adding TSPP driver files
The TSPP driver manages the transport stream packet processor. This core
is used to offload the main CPU by handling MPEG TS packets, generally
coming from a broadcast modem using the ISDB-T (or variant) protocol.
Change-Id: Ia4c16dcce970ae0f52d8d17957a92fce34ecdb44
Signed-off-by: Joel Nider <jnider@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
QUP (Qualcomm Universal Peripheral engine) hardware provides FIFO
based data path to mini cores like I2C. i2c-qup driver communicates
with the QUP and its FIFOs.
Advantages of this driver include 1-interrupt per FIFO/BLOCK number
of byte unlike 1-interrupt-per-byte of i2c-msm.
Since the QUP hardware communicates with I2C mini core, and this
driver communicates with QUP hardware, driver communicating with
I2C hardware directly (like i2c-msm) can't be used to communicate
with QUP. QUP has FIFO mode and BLOCK mode. FIFO mode can be used
if the data transfer size is less than FIFO size. BLOCK mode should
be used for transfers greater than FIFO size.
FIFO mode is supported in this initial implementation.
Signed-off-by: Sagar Dharia <sdharia@quicinc.com>
Squashed commit of the following:
commit c3fb53893cbc4b5e217ef176010d1b88982a9454
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date: Wed Sep 15 17:16:52 2010 +0200
csdio: Set/get vdd ioctl support
Implement power up/down sequence for internal UBM chip.
This commit includes generic, platform independent part.
CRs-Fixed: 255849
Change-Id: I526c78765ba32b310463a231c5cf578cb37c6deb
Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>
commit e1ba27311fcf3de2a5ca9a3fc1303328720dd120
Author: Nela Gurevich <nelag@codeaurora.org>
Date: Thu Aug 19 14:00:09 2010 +0300
csdio: Move csdio.h to kernel/include
Change-Id: Idf8df750e9f3bcc014d1afa673c9c27c97253195
Signed-off-by: Nela Gurevich <nelag@codeaurora.org>
commit 31d1b09c677c26efb71fa36ff6fe1e7f2d83abbc
Author: Alexander Kolesnikov <akolesni@codeaurora.org>
Date: Tue Aug 10 13:26:20 2010 +0300
mmc: Char SDIO Device Driver
The Char SDIO Device Driver is an interface which exposes an SDIO
card/function from kernel space as a char device in user space.
Change-Id: If298cdd6d4426b700e69affa5a3602cd221ad89c
Signed-off-by: Alexander Kolesnikov <akolesni@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This is a combination of 13 commits.
commit 59a27ca89fb515caeac2b97059832515566f70d9
Author: John Howe <jhowe@codeaurora.org>
Date: Tue Jan 4 17:18:54 2011 -0500
hw_random: Add Qualcomm MSM random number driver
This driver uses the hardware random number generator on MSM chips.
Change-Id: I13b4d831fb9b5487356af466536a9005107ff723
Signed-off-by: John Howe <jhowe@codeaurora.org>
commit 09cae33a80706e0aa77bdc4e1b493ef2a36dbbde
Author: John Howe <jhowe@codeaurora.org>
Date: Fri Jan 14 10:21:05 2011 -0500
hw_random: add PRNG clock control
Change-Id: I6d9dd2ee7c50020fb8d41242b655e172e4c9eff2
Signed-off-by: John Howe <jhowe@codeaurora.org>
commit 0573eda3ce19c01825ded4fe850362c37460dc20
Author: John Howe <jhowe@codeaurora.org>
Date: Mon Jan 24 14:56:06 2011 -0500
hw_random: remove clk frequency control
The clock only supports one rate, 64MHz, and is set to that
rate by default.
Change-Id: I820c74e44f4ebdec7b891a4c89d681cb5c3dcee6
Signed-off-by: John Howe <jhowe@codeaurora.org>
commit fab0a4d40e18be4a31a4720acafb128893c620e8
Author: John Howe <jhowe@codeaurora.org>
Date: Tue Apr 12 14:48:51 2011 -0400
hw_random: Use memory barriers
Change-Id: Ie216141d7f6997266d8c5ed4bbd436f1be6551b8
Signed-off-by: John Howe <jhowe@codeaurora.org>
commit f07f1ba547790155db4c508ccfa58b64c967fe8e
Author: Raj Kushwaha <rajk@codeaurora.org>
Date: Tue Jul 26 14:35:28 2011 -0700
hw_random: msm: Remove PRNG hardware configuration
LSFR and CONFIG registers are configured by secure domain
code and XPU protected.
CRs-Fixed: 284133
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
(cherry picked from commit a4f802b0f5d0faee9e83020c599b2f4b0b27de5f)
Change-Id: Ie73cc3a95d1e2fff970e4d71f15fc1cbb4ead11c
Signed-off-by: Raj Kushwaha <rajk@codeaurora.org>
commit 26cef0c9d572e55df0f17dc4a5de380595eddaeb
Author: Matt Wagantall <mattw@codeaurora.org>
Date: Thu Aug 11 17:19:31 2011 -0700
msm: clock: Use device names to distinguish between PRNG clocks
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name. This allows
the clock names to be updated to match the new naming convention.
Change-Id: Ibf00fd3d406adb04299e3e79e379d4fefe70f2b4
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
commit 5ad373931744ae98289ec680334d7cc0bee1c0b6
Author: Ramesh Masavarapu <rameshm@codeaurora.org>
Date: Mon Oct 10 10:44:10 2011 -0700
msm: Add PRNG to MSM9615 device.
Add configuration parameters for MSM9615 device.
PRNG hardware registers initialization in msm_rng.c is done
currently for MSM9615.
Change-Id: I2a05e9e582ce94a25bec71e1acaee95d62cd9469
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
commit 2f963dbc78c6c0703f51466b2b242287a2df5487
Author: Ramesh Masavarapu <rameshm@codeaurora.org>
Date: Thu Oct 20 15:33:50 2011 -0700
msm: Removed target specific changes for enabling PRNG h/w.
The driver checks if the PRNG h/w is enabled. If it is not ON, it
enables the PRNG h/w.
Change-Id: I7c73eba7ba47f4fca116cfe0884758e6dd130ed0
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
commit 46af59fb8f4bce302ad4d787b63b25e46548df6a
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Tue Feb 7 14:38:59 2012 -0800
msm: rng: Disable RNG init on APQ8064
Change-Id: Ic42a85c51faea8a17b02eb4987d0f5db732716c2
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit a54263b0056b15cad1336a33d57bb1db013e8abb
Author: Ramesh Masavarapu <rameshm@codeaurora.org>
Date: Wed Feb 1 22:49:01 2012 -0800
msm: Removed XPU violations.
During initialization, there is a violation in writing to
"read only" registers for targets that support trust zone.
Trustzone marks certain registers as read-only.
This change fixes the issue by writing to registers only
on targets that do not support trust zone.
Change-Id: I69bb0f1bad199201aa3dd8b378ca1683dfa81c86
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
commit a99fcc24e94481134ca22f9778e88ed31646d6e3
Author: Ramesh Masavarapu <rameshm@codeaurora.org>
Date: Wed Feb 22 14:30:32 2012 -0800
Revert "msm: rng: Disable RNG init on APQ8064"
This reverts commit 46af59fb8f4bce302ad4d787b63b25e46548df6a.
The RNG driver was initially disabled because of missing clock
changes and this driver was causing boot up issues.
Now with the clock changes checked in the RNG driver works.
Change-Id: I127f25c8be6b715510c1fb16b274a814416d8a8a
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
commit 801c392ab9ee2893c6f3ca506e43afa62798890b
Author: Ramesh Masavarapu <rameshm@codeaurora.org>
Date: Tue Apr 24 16:28:00 2012 -0700
prng: Replace clk_enable and clk_disable APIs.
The clk driver has introduced new clock APIs that replace
the existing clk_enable and clk_disable.
-clk_enable() APIs is replaced with clk_prepare_enable().
-clk_disable() API is replaced with clk_disable_unprepare().
Change-Id: Ib6c452e7dc3f357497eae5a9302a7352a19fcb18
Signed-off-by: Ramesh Masavarapu <rameshm@codeaurora.org>
commit de991f08a8738dc66e65488aebed472de65ce237
Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
Date: Thu May 31 13:15:51 2012 -0700
PRNG: Device tree entry for qrng device.
Cleanup platorm device entry & add device tree entry
Change-Id: I5bde944d63276a3aaf00b7415066963027f11249
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
commit a4100a4a6e2a1843645d3eff22dabb387d4cbb61
Author: Stephen Boyd <sboyd@codeaurora.org>
Date: Mon Jun 25 15:48:37 2012 -0700
msm-rng: Fix PRNG_LFSR_CFG setup
Changes to only configure the LFSR on devices that don't have the
prng hardware already setup mistakenly removed the LFSR
configuration. Instead, the change is ORing in 1s into the top 16
bits of the register (they're marked as reserved).
Restore the original code by masking off the lower 16 bits of the
register and filling them with values from the
PRNG_LFSR_CFG_CLOCKS define.
Change-Id: Idd0df7b49175c211eec5ea778733ae81f5bc8188
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
commit 0bef6ede4b779c19091234e20ecfbb76a44edac0
Author: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
Date: Wed Nov 7 19:47:21 2012 -0800
msm: rng: Add support for iface clk
Currently the driver supports only enabling core_clk,but on
certain targets, iface_clk is used for the hardware RNG
block. This fix adds compatibility to targets that have iface
clock instead of the core clock.
Change-Id: I480c3c7070e09f945439ea48e6877c7170ceeeb9
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
In order to support synchronization in a process with a single
gralloc handle we require the ability to write lock a buffer
while it is already read locked by the same handle. This change
extends the concept of an exclusive write lock or recursive read
locks to a genlock handle (rather than the genlock lock).
Genlock cannot provide deadlock protection because the same
handle can be used simultaneously by a producer and consumer.
In practice an error will still be generated when the timeout
expires.
CRs-fixed: 356263
Change-Id: I322e7fadc8b43287f53b211242b176d3de731db2
Signed-off-by: Jeff Boody <jboody@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Allowing a lock to be asynchronously released while a handle
was still active turned out to be too dangerous to use in a
multi-threaded environment and it served no pratical
purpose anyway. Handles now hold an attached lock until they
are destroyed.
CRs-fixed: 333141
Change-Id: Ic0dedbad8050ff01927ddb165c65a939bf297c10
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add a generic locking API for situations where multiple user-space
processes and/or kernel drivers need to cooordinate access to a
shared resource such as a graphics buffer.
Change-Id: Ic0dedbad74b970d7bd1a6624a845b5b1b9847443
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Fix NR_IPI to be 7 instead of 6 because both googly and core add
an IPI.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Conflicts:
arch/arm/Kconfig
arch/arm/common/Makefile
arch/arm/include/asm/hardware/cache-l2x0.h
arch/arm/mm/cache-l2x0.c
arch/arm/mm/mmu.c
include/linux/wakelock.h
kernel/power/Kconfig
kernel/power/Makefile
kernel/power/main.c
kernel/power/power.h
Add runtime DT support and documentation for the Cortex A7/A15
architected timers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Conflicts:
[Resolve conflicts for adding support for the feature
ARCH_HAS_READ_CURRENT_TIMER]
arch/arm/kernel/arch_timer.c
Change-Id: I4b1d1dc2a8c69466497423475f7a3dd4d2c380c1
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
(cherry picked from commit f2caa5109ee0ce7d988d864207e06fdb19e75c39)
During board initialization read the shared memory item
SMEM_POWER_ON_STATUS_INFO and place it in the procfs at
/proc/sys/kernel/boot_reason
The data item is an integer with a bit being set to identify the reason
the device was powered on. The values of this data item is defined in
the document Document/arm/msm/boot.txt, the following is the data in the
documentation file.
power_on_status values set by the PMIC for power on event:
----------------------------------------------------------
0x01 -- keyboard power on
0x02 -- RTC alarm
0x04 -- cable power on
0x08 -- SMPL
0x10 -- Watch Dog timeout
0x20 -- USB charger
0x40 -- Wall charger
0xFF -- error reading power_on_status value
This is change is a response to a customer request described in
JIRA KERNEL-518
Change-Id: I59e665f92e6e29f7dfef4380314f676a2d92c94b
Signed-off-by: Rick Adams <rgadams@codeaurora.org>
(cherry picked from commit 9512d7e26abc9d23a1771533c5300605d70dfaa7)
Conflicts:
arch/arm/include/asm/processor.h
arch/arm/mach-msm/board-msm7x30.c
kernel/sysctl.c
Josh proposed the following change, and I don't think I could
explain it any better than he did:
From: Josh Durgin <josh.durgin@inktank.com>
Date: Tue, 24 Jul 2012 14:22:11 -0700
To: ceph-devel <ceph-devel@vger.kernel.org>
Message-ID: <500F1203.9050605@inktank.com>
From: Josh Durgin <josh.durgin@inktank.com>
Right now the kernel still has one piece of rbd management
duplicated from the rbd command line tool: snapshot creation.
There's nothing special about snapshot creation that makes it
advantageous to do from the kernel, so I'd like to remove the
create_snap sysfs interface. That is,
/sys/bus/rbd/devices/<id>/create_snap
would be removed.
Does anyone rely on the sysfs interface for creating rbd
snapshots? If so, how hard would it be to replace with:
rbd snap create pool/image@snap
Is there any benefit to the sysfs interface that I'm missing?
Josh
This patch implements this proposal, removing the code that
implements the "snap_create" sysfs interface for rbd images.
As a result, quite a lot of other supporting code goes away.
[elder@inktank.com: commented out rbd_req_sync_exec() to avoid warning]
Suggested-by: Josh Durgin <josh.durgin@inktank.com>
Signed-off-by: Alex Elder <elder@inktank.com>
Reviewed-by: Josh Durgin <josh.durgin@inktank.com>
(based on commit 02cdb02cea)
[ Upstream commit 282f23c6ee ]
Implement the RFC 5691 mitigation against Blind
Reset attack using RST bit.
Idea is to validate incoming RST sequence,
to match RCV.NXT value, instead of previouly accepted
window : (RCV.NXT <= SEG.SEQ < RCV.NXT+RCV.WND)
If sequence is in window but not an exact match, send
a "challenge ACK", so that the other part can resend an
RST with the appropriate sequence.
Add a new sysctl, tcp_challenge_ack_limit, to limit
number of challenge ACK sent per second.
Add a new SNMP counter to count number of challenge acks sent.
(netstat -s | grep TCPChallengeACK)
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Kiran Kumar Kella <kkiran@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 25ec43d3e6 upstream.
The previous website doesn't exist anymore. Update it to one site that
actually exists.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 9a5a8f19b4 upstream.
oom_badness() takes a totalpages argument which says how many pages are
available and it uses it as a base for the score calculation. The value
is calculated by mem_cgroup_get_limit which considers both limit and
total_swap_pages (resp. memsw portion of it).
This is usually correct but since fe35004fbf ("mm: avoid swapping out
with swappiness==0") we do not swap when swappiness is 0 which means
that we cannot really use up all the totalpages pages. This in turn
confuses oom score calculation if the memcg limit is much smaller than
the available swap because the used memory (capped by the limit) is
negligible comparing to totalpages so the resulting score is too small
if adj!=0 (typically task with CAP_SYS_ADMIN or non zero oom_score_adj).
A wrong process might be selected as result.
The problem can be worked around by checking mem_cgroup_swappiness==0
and not considering swap at all in such a case.
Signed-off-by: Michal Hocko <mhocko@suse.cz>
Acked-by: David Rientjes <rientjes@google.com>
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Acked-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit e427c23756 upstream.
On recent kernels, Realtek codec parser tries to optimize the routing
aggressively and take the headphone output as primary at first. This
caused a regression on VAIO Z with ALC889, the silent output from the
speaker.
The problem seems that the speaker pin must be connected to the first
DAC (0x02) on this machine by some reason although the codec itself
advertises the flexible routing with any DACs.
This patch adds a fix-up for choosing the speaker pin as the primary
so that the right DAC is assigned on this device.
Reported-and-tested-by: Adam Williamson <awilliam@redhat.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
