For debugging purposes, it's sometimes useful to disable or adjust
proxy vote timeouts. Add a module parameter for this purpose.
If proxy_timeout is set to 0, proxy votes will remain asserted until
the peripheral is shutdown. If it's set to a positive value, the value
will be interpreted as override (in ms) for all proxy timeouts. The
default value (-1) will cause the timeout specified in the individual
PIL drivers to be used.
Change-Id: I74a111b8e4e62a15e01c4e2480b7127e84b9f467
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit 0aafa35e3ee6c37c41d67d9e9e2b1eda69a17333)
SDCC4 controller has IO_PAD_PWR_SWITCH control bit in MCI_CLK register.
Driver should set this bit to 1 if the IO voltage level is within
low voltage range (1.7v - 1.9v) else clear it.
But driver sets this bit to 1 only if the MMC core layer initiates
the voltage switch sequence. So if voltage switch sequence is not
initiated (which is the case with non UHS-I cards) then even if
the IO voltage level is within low voltage range, IO_PAD_PWR_SWITCH
bit remains cleared.
This change checks the IO voltage level and based on that sets the
IO_PAD_PWR_SWITCH bit.
CRs-Fixed: 386445
Change-Id: Id0648b0f87ea9bcc942e855e30da810e0fe5ebf5
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
(cherry picked from commit 341b9e7dbaf0a3caf6e41d37486e3bccc9795feb)
The current APR driver initializes subsystem state from late_init so
slimbus driver reads ADSP's state too late.
Move initialization code to apr_init so that slimbus driver can be
probe sooner.
Change-Id: I14d1bf294b40dd7ea184923ba023646e05912fff
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
(cherry picked from commit ddc46df62d97108de1e45f57b29bc44a4ead0787)
External bluetooth chip needs a lower frame rate
for high audio quality.
Change-Id: Ic3092c8adaf7097f257149e507f7c66f159eedb7
Signed-off-by: Damir Didjusto <damird@codeaurora.org>
(cherry picked from commit 08d2aa588087db0d3a6a7d7670b2ef945012caae)
Use the scm-pas APIs to authenticate and securely boot signed images
when supported. This is very similar to secure peripheral support
present in previous PIL drivers.
Change-Id: I3b6be69ad2f30ff5ba8c5de93051276936a1ab44
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
(cherry picked from commit 10a5967199846c07ce31b1b3730e088557a734cb)
As per the latest clock design, we should not vote for the clocks
in the atomic context.
CRs-fixed: 377905
Change-Id: I70f269d40f007326de7a6279bfd11c4e576d251b
Signed-off-by: Ram Mohan Korukonda <rkorukon@codeaurora.org>
(cherry picked from commit d0063b6620e90266599cec711d6c5160878d47ca)
mutex is used uninitialized while unloading N_TTY line discipline
and installing SMUX Line discipline as msm_hs_shutdown() of HSUART
driver is called which is destroying this used mutex. Hence while
SMUX Line discipline is used, and clock off API is called, mutex
slowpath warning is seen. Destroying of mutex shouldn't be done from
msm_hs_shutdown() as initizalition and destroying of the mutex
is done from probe() and remove() of HSUART driver. Hence don't
destroy mutex from msm_hs_shutdown() to fix the issue.
CRs-Fixed: 391551
Change-Id: I74ac1372405e1b893d658ee03e9955858c9e782f
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
(cherry picked from commit d21314cc42558fe60cb0052bb1b645985f6be456)
Added a new function to verify whether the LE Connection Update
parameters are valid instaed of verifying all the LE Connection
parameters since only update parameters are set in the Connection
Update Request.
CRs-Fixed: 387146
Change-Id: I9fe6b51e44e2793f3945613fdfde3a039804746f
Signed-off-by: Archana Ramachandran <archanar@codeaurora.org>
(cherry picked from commit 95319af0612d58788279748f586cc57221c3443e)
L2 flush flag needs to be initialized to 0 in probe,
else the value defaults to 1, will result in L2
being flushed when all cores are power collapsed.
Change-Id: I0912b4053bf7f0bda01b5918a48ac3140b103d1e
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>
(cherry picked from commit c2a53cb3d08533f86ab27d88391c7d3696c52816)
The smem_log dependency on SMSM is a legacy dependency that waited
for the modem to allocate the SMEM items before smem_log was initialized.
Now that smem_log can allocate the items first if necessary, it no longer
needs to wait for the modem since the only true dependency is that the
SMD module has initialized SMEM.
Update dependency information to initialize smem_log once SMD has
been initialized.
CRs-Fixed: 389529
Change-Id: I452eb31c8d2d1aea8ae02f8786a8c46f98c3ca2c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
(cherry picked from commit fa44cd76ee424d4cfae2595ff69cff0510a94518)
The mapping between voltage control register set point values and
physical output voltage changes for range 1 of N1200 and N600
LDOs between PM8941 v1 and PM8941 v2. LDOs with the previous
mapping have digital major revision equal to 0. LDOs with the
new mapping have digital major revision equal to 1. Modify the
qpnp-regulator driver so that the digital major revision register
value is taken into account when deciding which voltage mapping
to utilize. N1200 and N600 regulators have identical
(range, voltage set point) --> output voltage mapping.
N1200 LDO range 1 hardware set points (rev=0):
375 mV to 768.75 mV with 6.25 mV step size
N1200 LDO range 1 hardware set points (rev=1):
375 mV to 1537.5 mV with 12.5 mV step size
Configure qpnp-regulator to use only range 0 for N1200 rev 1.
Range 0 is used because there is no benefit to using ranges 1 or
2 given that they have the same maximum voltage and step size
and their minimum voltage is greater than or equal to that of
range 0.
Change-Id: Icac6a1d8fccc014a754843d61c1fa40f550f9c77
Signed-off-by: David Collins <collinsd@codeaurora.org>
(cherry picked from commit bad606a7739aae9f79d45a394b39d6d321ee793e)
Update the address used for the boost regulator current limit
register to reflect the correctly location in hardware. The
proper address is 0x4A, not 0x40.
Change-Id: Ieefcd072858691940103664a2130a6c69341448f
Signed-off-by: David Collins <collinsd@codeaurora.org>
(cherry picked from commit 6f84675e8ca540df1ab704b527db672a2c229c78)
QPNP (Qualcomm Plug N Play) LEDs driver is used for
controlling LEDs that are part of PMIC on Qualcomm reference
platforms. The PMIC is connected to Host processor via
SPMI bus. This driver supports various LED modules such as
WLED (white LED), RGB LED and flash LED. The first version of
the driver supports WLED and other features are added in the
next versions.
Change-Id: Ib2962c784cf566905f909faa0d46f8ebfee77b2d
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
(cherry picked from commit f3d5a06505faa2d7690ad48ce7bb5e32afb56df2)
The RPM clock handoff is erroneously setting last_sleep_set_khz
for clocks that only vote in the active-set. This results in an
incorrect sleep set vote to the RPM that does not go away even
when the corresponding (peer) sleep-and-active-set RPM clock is
disabled.
Set the last_sleep_set_khz value only if the clock in question
is not an active-set-only clock.
An example failure occurs as follows:
The system fabric clock is running at 192MHz on bootup. The
handoff code for the sfab_a_clk (the active set only clock)
sets last_set_khz and last_sleep_set_khz to 192MHz. Now, in
late_init, when sfab_clk is disabled, the sfab_a_clk's
last_sleep_set_khz value is sent to the RPM. This is wrong -
we are disabling the sleep-and-active-set clock, but we just
sent a rate of 192MHz to the RPM as our sleep set vote.
When the apps procesor transitions to the sleep set, if there
have been no other votes for sfab_clk and sfab_a_clk, the RPM
will figure that the apps needs 192 MHz on the system fabric
in the sleep set, even though sfab_clk on the apps side is
"disabled".
With the fix in place, sfab_a_clk's last_sleep_set_khz is 0,
and therefore when sfab_clk is disabled, the correct vote of
0 goes to the RPM.
CRs-Fixed: 392302
Change-Id: Iee47a3c4e683e335454d2485c4c4c5b1bc0d772c
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
(cherry picked from commit af72b71744e4c09ba210f2a68f1961dfe4d34c25)
PHY suspend fails as part of USB LPM at times. Currently, we are resetting
the PHY and Link during this failure case, but the EHCI stack is not reset
due to which we are seeing device enumeration failure cases. Fix this issue
by removing hcd and adding hcd back during PHY suspend failure.
CRs-Fixed: 382279
Change-Id: I2d69e75409ec2b783dbdd06de4f34fe0356c1c45
Signed-off-by: Chiranjeevi Velempati <cvelempa@codeaurora.org>
(cherry picked from commit ce16958d07cedf2c46c97a9b0088a410c1a464a2)
This reverts commit 136fbcf233893186369f20472ae0af9d791e0ad3.
Since the dependent patches are merged, no longer need to stub out
rpm calls.
Change-Id: If02d5d5afccdab4b97ecd02c62b19174e1656725
Signed-off-by: Gagan Mac <gmac@codeaurora.org>
(cherry picked from commit 8566000303351337859b6bdbdbd705c3beac7efe)
Clients can specify whether to ignore external block pipe reset
or not during BAM registration.
Signed-off-by: Yan He <yanhe@codeaurora.org>
(cherry picked from commit 821e276e5c19c80dcdf9c933acb6a3b0b9df0fce)
Change-Id: I1cde36cae8328c5b2cc5ec7f1dd053271f69e604
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
When power collapse is disabled, hotplug OFF of non-boot
core will result in WFI and hence msm_jtag_save_state
will not occur. Subsequently, during hotplug ON of
non-boot core when msm_jtag_restore_state is called via
msm_platform_secondary_init, we will now bail out without
restoring to help retain sane value of the restore counter
and prevent register restoration.
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
(cherry picked from commit 3a64a0f54fdaf07baf15cacf869600a125538101)
Change-Id: I8f6fc5b0601c7b696bb5ba53ef724abb1a99a1ed
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The boot address is a physical address (even if the secure
monitor only considers it to be 32 bits). Move to using
phys_addr_t to clarify this is a physical address and to ease
any support of LPAE in the future. Also make the flags unsigned
so that we can use the highest bit if necessary.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit efadd5b002a819d0e0213ac10a1e3d1c9463a07b)
Change-Id: I06c5af4093b6fa947a8705364425de2c54464cde
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Fix msm_rpm_wait_for_ack API to return a -ENOMEM when a message id 0 is
passed in. The patch also reserves the message id 1 for cases when the
send message doesn't send duplicate data. This ensures that wait for ack
doesn't return a error code for this scenario.
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
(cherry picked from commit 7ef2aadfe25e756b855861b81a9f21d324a59585)
Change-Id: I7b87fab077b04f76db99eb4446e1526b259950b4
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The 8960ab has two gfx3d iommus one of which was missing.
Also add a dependency on gfx3d_axi_clk for 8960ab.
Signed-off-by: Joel King <joelking@codeaurora.org>
(cherry picked from commit 9af070bb08217aa3668be5a1ff7ab3cc7964c64c)
Change-Id: Ic45910df027a02766a1841b825c16ea7413d65ca
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The current logic checks for only one byte id for device
registration. this is not sufficient to identify all
variants. fix this to check all 4 byte id registers.
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
(cherry picked from commit fbe371bbce2b166e4f651454f00fe4e8ecc2c3b8)
Change-Id: Ife41b16049f9061fc649ad78ed887681c85f5ac1
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Calculate the DDR size available to APPS which can be
used during early boot up time such as reservation
size based on the available RAM.
Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
(cherry picked from commit d71c5f90a6a47801ceedfa37f3d291acd96a0b36)
Change-Id: I6cb7efae40c8e7823aa32de8f7eaacc5dbc7809a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Send device disconnection reason to bluez on receiving the
diconnection complete event so that low energy profiles
such as proximity can decide to reconnect if the reason
is link loss.
CRs-Fixed: 378240
Signed-off-by: Archana Ramachandran <archanar@codeaurora.org>
(cherry picked from commit da09d26a75ee1c7c1911dcfbe0128fd09f6631f4)
Change-Id: Iab1fede47f44342d87be6c3c5aa7590754fd950c
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
SAW v2.2 does not support PMIC_DLY. Remove the incorrect mapping in the
probe method. Also, PMIC_DATA0 is used by L2 SPM for enabling the S5
gang in SAW v2.2. Using this to buffer the S5 gang voltage is
unnecessary and incorrect.
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit 2772d83b3a783d1de5ef52c3d276b3572238309f)
Change-Id: Ia7c928259dd57b2905ede182157d0adafc8dfad7
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The demux is an in-kernel software component whose purpose is to take
an incoming TSIF stream and split it into multiple output channels
based on the PID field in each TS packet. Each output channel can be
used for a different purpose, such as audio, video or channel
information. In order to get good performance when moving such large
data streams around, the demux was placed in kernel-space as to
prevent copying memory buffers between kernel-space and user-space, at
least at this early stage in processing the traffic. Originally the
design of the TSPP driver was based on the earlier TSIF driver, so it
contained only a user-space API.
Signed-off-by: Joel Nider <jnider@codeaurora.org>
(cherry picked from commit 435ad8e2157eec5783a435f1e7ec47f67d759882)
Change-Id: I0dadf04ec2694c82fc8378fbed5fbf81fc889337
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
PMIC-DLY on SPM V2.2 is part of the PMIC_DATAn command. Remove the
incorrect entity from documentation.
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
(cherry picked from commit a5753764bace491d50f09ad7461647dd62f6c20a)
Change-Id: I66f83ed1e594f611154aaa3165ba95e73bda4e63
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
When all the cores are offline, L2 SPM can be programmed to enter power
collapse. Update the L2 sleep vote, when all cores are offline, from
GDHS to Power collapse.
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
(cherry picked from commit c373eb15e6dda9fb73b9a532141e35672ca1b53c)
Change-Id: I5553f312bb98af55f781277b6f95d37aa2c8b8ed
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
1> Output BAM_TEST_BUS content with specified TEST_BUS_SEL value,
which helps HW team's debugging.
2> Support selection of pipes to only output registers' values of
selected pipes.
Signed-off-by: Yan He <yanhe@codeaurora.org>
(cherry picked from commit fc1aa893e95a45a8a55b5ccc0cc01a5a8261f085)
Conflicts:
drivers/platform/msm/sps/sps.c
Change-Id: I78cd4f4f3f847b709d69f973b1d3ae7becab666d
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
To debug crashes allow watchdog to be disabled from userspace
via sysfs.
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
(cherry picked from commit 42ffa44fe6ac67390037ff95be4a16c0ecf145c0)
Conflicts:
arch/arm/mach-msm/msm_watchdog_v2.c
Change-Id: Ia2db8dd6262c9bc518ae736c479ae042d01345b5
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
In revision 1 of the gpio block, the GPIO_STATUS1 GPIO_OK changes
from bit 1 to bit 7. Update the code to reflect this.
Also verify that PMIC pins have valid types and subtypes upon
probe. This allows us to make assumptions about correctness later
on when checking for capabilities of a pin in question.
Signed-off-by: Michael Bohan <mbohan@codeaurora.org>
(cherry picked from commit bfe64c7551275d24cb8eb45ff0b578427d68c2e0)
Change-Id: Idc7464799ff354b83c82e38004aa299356551630
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Enable ipc logging in kernel. It has a minimum impact
on performance and is always on to allow debugging of
an issue either from the command line or from a memory dump.
Signed-off-by: Angshuman Sarkar <angshuman@codeaurora.org>
(cherry picked from commit aa2f66b2474ec0cd9402fc3220aaa6eac9552195)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 33e661dc4c6386fbb35503417b16f305cd2a1b3f)
Change-Id: I15c967739aee9861ca0776d8dafceecb1d646db1
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
By default, HSUART Core CLK frequency is set to 7.37MHz. With this
CLK Frequency, it is not possible to get higher baud rate of 3.2 or
4 Mbps. Hence to set higher baud rate, driver calls clk_set_rate()
to set HSUART Core CLK frequency as ( required baud_rate * 16 ).
clk_set_rate() shouldn't be call from atomic context otherwise below
BUG is seen.
BUG: sleeping function called from invalid context at
mutex.c:85 in_atomic(): 1, irqs_disabled(): 128, pid: 1, name: init
[<c00151c4>] (unwind_backtrace+0x0/0x12c) from
[<c07aebbc>] (mutex_lock+0x18/0x3c)
[<c07aebbc>] (mutex_lock+0x18/0x3c) from
[<c0021258>] (clk_set_rate+0x2c/0x178)
[<c0021258>] (clk_set_rate+0x2c/0x178) from
[<c0364a34>] (msm_hs_set_termios+0x820/0xb9c)
[<c0364a34>] (msm_hs_set_termios+0x820/0xb9c)
from [<c0362170>] (uart_change_speed+0x90/0x94)
[<c0362170>] (uart_change_speed+0x90/0x94)
from [<c03626c0>] (uart_startup+0xc8/0x1a0)
[<c03626c0>] (uart_startup+0xc8/0x1a0)
from [<c0363534>] (uart_open+0xe4/0x13c)
[<c0363534>] (uart_open+0xe4/0x13c)
from [<c0343d64>] (tty_open+0x360/0x4ec)
[<c0343d64>] (tty_open+0x360/0x4ec)
from [<c013787c>] (chrdev_open+0x114/0x134)
[<c013787c>] (chrdev_open+0x114/0x134)
from [<c0132844>] (__dentry_open+0x190/0x29c)
[<c0132844>] (__dentry_open+0x190/0x29c)
from [<c0132a00>] (nameidata_to_filp+0x50/0x5c)
[<c0132a00>] (nameidata_to_filp+0x50/0x5c)
from [<c0141b08>] (do_last+0x7ec/0x928)
[<c0141b08>] (do_last+0x7ec/0x928)
from [<c0141d08>] (path_openat+0xc4/0x390)
[<c0141d08>] (path_openat+0xc4/0x390)
from [<c01420b4>] (do_filp_open+0x30/0x7c)
[<c01420b4>] (do_filp_open+0x30/0x7c)
from [<c0132518>] (do_sys_open+0xd8/0x174)
[<c0132518>] (do_sys_open+0xd8/0x174)
from [<c000e380>] (ret_fast_syscall+0x0/0x30)
Hence use mutex to protect msm_set_termios() allowing clk_set_rate()
to be called from non-atomic context.
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
(cherry picked from commit e672516d9348319af27ff1d11834fffb97dd90af)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit dad1f2594fce0b75695416e93898067bc582d5a3)
Change-Id: Idec64f3d8938148b5c1dd135bde041be5ae3b34d
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Each GSBI has QUP-I2C and UART cores which can be
used independently. However, the AHB clock is
shared by these blocks. So we keep it on if the
cores are used independently from different processors.
CRs-Fixed: 387908
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
(cherry picked from commit 9aa5e91924934035fe0567f02f94a7cd5d0c963f)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 3c11ab97102bd1e713e00ef7d4eae872269cf35e)
Change-Id: I18f139d90f51c773b65bf62ac219ed24c9fc09b9
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
- Pass number of ps string instead of ps length
- Use proper name for radio text length
CRs-Fixed: 388115
Signed-off-by: Ayaz Ahmad <aahmad@codeaurora.org>
(cherry picked from commit 1c0db5273216ea80f3762dc5675daebac16e1e0b)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit d327e591c875450aa8ff157645974aa3fb7c0cc3)
Change-Id: I501af5c175c07f84dc117fc5e8ac410cecc8c35d
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Low pass filter bandwidth is configured to be equal to or greater than
half of the sampling freqency.
Signed-off-by: Wentao Xu <wentaox@codeaurora.org>
(cherry picked from commit 04f4cc9ff3707a39af39c23cc9f3aeb5c344c60c)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit a7d8fe1d40061ec56c938308d8f7265f29b146c1)
Change-Id: I796d30d474aa64c1679781b38ca5f151b37c92fd
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The battery data is incorrect and is causing SOC jumps. The SOC is often
inaccurate and would jump from e.g. 40 to 35 in a few seconds due to a bad
battery profile.
Fix the values to use an accurate battery profile that reflects the
battery resistance and voltage versus percent values which help alleviate
the jumps.
Signed-off-by: Xiaozhe Shi <xiaozhes@codeaurora.org>
(cherry picked from commit 21184fc6fb7820f0cdcc8c9c597013cda75aaf56)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 0001021632a1581b52310e220d67b6d7b2af294e)
Change-Id: I37d148ab50c028db6cd6e27c1d5de40dec93ac81
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Disable hardware clock gating for the SMMU ahb interface as
testing has shown that having it enabled leads to random lock ups
in the multimedia subsystem.
Signed-off-by: David Garibaldi <dgaribal@codeaurora.org>
(cherry picked from commit f69836a0bd51be3071b943e16112e69608c6d15d)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 6bba065fd3d78061a8a043d707eea8eac9b218cb)
Change-Id: Ie1265f10a27e58c19f1bdf5decd503ca1e933cf2
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
DSI controller and the DSI PLL are powered by
these regulators. Fix the memory map region
to include only DSI-0 controller related registers.
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
(cherry picked from commit 7632f672ac493a9e4710f8b688fbf0309cb23021)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 287860aa2eda50956f1102c1793e1194b4d0dbb9)
Change-Id: Ia1a7e0da99eb6ade86e9c04fc11fb794ed95ac3c
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Add new device file to enable this device.
This dtsi file will be included only for supported
platform.
Add this device for 8974 CDP platform.
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
(cherry picked from commit 916bc4f9f9f4121541b933599a54ae7cd7b5fb75)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit a73834031afe52a2c019a7289af99f879cee4b38)
Change-Id: Icd276fc0bed4205bd4e630a4f08a0665026ccd62
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
The 8960ab application processors are able to run up to 1.7 GHz.
Update the frequency table to enable this.
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit c3a19dadf921a19a2f5c2f5c5ab0ae9170653b90)
Change-Id: Ic326f6c6aba73afd5f43ed974a1f5e7306c5fa5a
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Remove the depends on ARCH_* because we shouldn't have to update
this line whenever a new arch is added. Also, expand on the
Kconfig text to describe new functionality that this config
enables.
Unfortunately, this means sysmon is now exposed as default y
everywhere that subsystem restart is enabled, so we must
explicitly enable sysmon for those architectures and remove the
default y from sysmon too.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 0171058cf07ac02eff128c6b9a9a0b3e17f7cdd5)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
(cherry picked from commit 511d0e18787272d557a9d55b987fdb6420978e9c)
Change-Id: I4dd8d44d862c9cc5600026f36017657abe811edd
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Moved the gpio request and configuation to bluetooth power on
sequence as it is required only when bluetooth is turned on.
Signed-off-by: Ram Mohan Korukonda <rkorukon@codeaurora.org>
(cherry picked from commit c4cfb69a1c15a5cc7f407da004a47e7d11a1e3e1)
Change-Id: I1b49063e614ed14387d5106c087534439f244e72
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Content adaptive backlight control (CABC) support is needed to
control backlight by external PWM. It can be enabled by setting
"cabc_en = true" in the platform data wled_cfg structure.
CRs-fixed: 379347
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
(cherry picked from commit c366d5bfc380183e1c4f9877b2c8558098bd4281)
Change-Id: Iae7940d25d8754ab539d5ce1fa3f78972b5222d1
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
CPR(Core Power Reduction) is a new h/w block added in 8x25
2.0 revision. This block reduce the power consumption of
SOC using sensors inside the SOC. Add function callbacks to
PM driver to perform disable, enable, save and restore of
CPR context data when the core do an IdlePC.
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
(cherry picked from commit ff723ece018452e722155daa67ff0fdd65cc5c96)
Change-Id: Ideb6300ce1afe9976853e47ab9f1eec2ef22c77e
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Populate the bypassed irq list to ignore some of the
interrupts which are don't care while system decide to
IdlePC.
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
(cherry picked from commit 613904cef759a9d5ea550610f5bc039fdfc5e719)
Change-Id: Ie6aa79d19e1c4d7c371b5ea17d291faf39811bde
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Declaring completion variables, card_rem_event_var and shutdown_event_var
as global variables, because we observed these completion variables,
getting freed while wait on these variables.
Change-Id: Iec4e913d58fafa4804ae0b2d34e15460b4f7d0b1
CRs-Fixed: 393414
Signed-off-by: c_gowri <deepthi@codeaurora.org>
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Adjust frequency tables and voltage limits for both v2 and ab
changes.
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit b7c777ac16dfff010cb92b5d3347436859d3302f)
Conflicts:
arch/arm/mach-msm/clock-8960.c
Signed-off-by: Dhivya Subramanian <dthiru@codeaurora.org>
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit 40d13ce3afe5771d2b78bfbf862d87459f541e8b)
Conflicts:
arch/arm/mach-msm/clock-8960.c
Change-Id: Id662c9480840f301f4111e8f6744b53869f8e3c7
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
