Refactor the IOMMU clock control code to always require a
core clock as well as an interface clock. Add support for
an optional alternate core clock and update device tree
bindings accordingly. Clean up the probe function to remove
needless enabling / disabling of clocks.
Change-Id: I4d744ffabc1e6fb123bacfda324f64408257cb25
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Use the label property to specify device labels instead of
a vendor-specific property.
Change-Id: I74f3b57db469781f738f0d52c785d992c1e88efb
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
When probing the context devices, dev_info already prints
the device name, so printing it again is redundant. The
context name is more useful anyway, so print this instead.
Change-Id: Ibe2e33501baa1fd53f6ff45943226377eb61fd7e
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Query SMT and SID mapping information at probe-time instead
of attach-time to allow this information to be
error-checked at an earlier time.
Change-Id: Ib2bbdc8374f9c86c3e6013d298fe8b279b53d83b
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The IOMMU hardware blocks are power-gated by GDSCs which
need to be enabled prior to programming the IOMMU hardware.
Change-Id: I5b4e5a0a60ce672c1180faaf3a8344d72a6ebe5e
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
SMMU global address space programming need to be performed
each time the device comes out of power collapse, move the
programming of global address space from driver initialization
to the point where the attach is initiated by the clients.
When the first context is attached, the global address space
is programmed prior to the programming the context.
Change-Id: I36e4f161861823aa43d15c3271f8d9b26214cb84
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
SMMU v2 is based off the ARM SMMU architecture specification.
The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory. In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.
The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.
Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
