The hardware requires a TLB sync operation at the end of
each TLB maintenance operation.
Change-Id: I8102253cfc12af530216346efa5bb9760db25352
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Use the label property to specify device labels instead of
a vendor-specific property.
Change-Id: I74f3b57db469781f738f0d52c785d992c1e88efb
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
When probing the context devices, dev_info already prints
the device name, so printing it again is redundant. The
context name is more useful anyway, so print this instead.
Change-Id: Ibe2e33501baa1fd53f6ff45943226377eb61fd7e
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Query SMT and SID mapping information at probe-time instead
of attach-time to allow this information to be
error-checked at an earlier time.
Change-Id: Ib2bbdc8374f9c86c3e6013d298fe8b279b53d83b
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Since the IOMMU ID registers are only accessible by the
secure environment, specify the SMT sizes in device tree
so that the IOMMU driver knows how many SMRs to initialize.
Change-Id: I614a51069c0304f71b0c7d061d97aca0289c17ea
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
The official name for copper is MSM8974.
Switch to it.
Change-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
The IOMMU hardware blocks are power-gated by GDSCs which
need to be enabled prior to programming the IOMMU hardware.
Change-Id: I5b4e5a0a60ce672c1180faaf3a8344d72a6ebe5e
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Enable and disable the IOMMU clocks for each high-level
mapping operation rather than leaving the clocks enabled
between attach-time and detach-time even if no IOMMU
operations are being done.
Change-Id: I4cde881992b8cd77fb4ea7e8dc1c003f639d15b6
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
SMMU global address space programming need to be performed
each time the device comes out of power collapse, move the
programming of global address space from driver initialization
to the point where the attach is initiated by the clients.
When the first context is attached, the global address space
is programmed prior to the programming the context.
Change-Id: I36e4f161861823aa43d15c3271f8d9b26214cb84
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
Do not return a context pointer if the context does not
have driver data associated with it to ensure that IOMMU
functions fail gracefully on targets where the IOMMU
hardware could not be found.
Change-Id: Ibf915251a4a133c2baaf9fb5b01145fb3c419347
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
SMMU v2 is based off the ARM SMMU architecture specification.
The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory. In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.
The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.
Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
Refactor clean_pte to accept a redirection attribute, which
allows for cleaner code at the caller.
Change-Id: Iff77abdced1fa6ea295a4bf6ec76f644b9922e63
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
If L2 redirection is disabled, clean page tables upon
allocation to prevent hardware table walks into unmapped
areas from accessing stale data.
Change-Id: If1e70bfa52f86d9ddc5a001a699050667b075631
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Provide the ability to report IOMMU fault events through
the IOMMU API. The driver will fall back on the previous
behavior of printing the fault information registers if no
domain fault handler is registered, or if the handler
returns -ENOSYS.
Change-Id: I9144e9b4bba117b67c7d81609e986ea716b34882
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Fail to look up IOMMU context devices if there is no driver
data associated with them, as this would imply that the
device did not pass the hardware sanity check.
Change-Id: If2998a96dea9342850092344c4ad70eebf965229
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Support for the proprietary clk_set_min_rate() API is being removed from
the clock driver. Replace it with a clk_round_rate() and clk_set_rate().
Change-Id: Icd62a8768d99cf007cf899c705626f8eacbaa7c8
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
A threaded interrupt handler for IOMMU page faults will
allow the use of the new clock APIs from the interrupt
handler.
Change-Id: I381df3974daa7fbc4bc4ec0558434959597b4f24
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
With the secure environment configuration in place, switch
to using the non-secure interrupts for page faults.
Change-Id: I133e82b5c3c10a408fb0894abfe81621fd2cdfd7
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add support for the IOMMU_READ and IOMMU_WRITE attributes
for mappings. Read-only and read-write mappings are fully
supported. Write-only mappings are not supported in
hardware and will fall back to read-write. Specifying
neither attribute in iommu_map will result in a warning on
the first call, and the mapping will be treated as
read-write.
Change-Id: Ibe9bd340d0743f37c91580c7db4f199fb4afba8b
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add a new platform data in iommu devices to indicate whether ttbr1
should be used which also dictates how the address space should be
split between ttbr0 and ttbr1.
Change-Id: Iab3aac74256bd4d49f47f89e6638f014e6e539e9
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Ion carveout and content protect buffers do not have
a struct page and thus sg_phys() cannot be used on them.
Try sg_dma_address() first and if it returns 0 then
use sg_phys().
Change-Id: I95ccb8f5a3c86cd09ecf2a2737c260f4996059ac
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Use a mutex to protect the IOMMU data structures to allow
use of the new clock APIs from within lock-protected
regions.
Change-Id: I89a932d42e37d7860485add1b857288fd5947aea
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Instead of specifying a shareability attribute and a cache
policy, add support for the IOMMU_CACHE attribute to allow
cacheable mappings using the default memory cache policy.
Change-Id: I78442770e4e64fd72d9314d343223757593d3529
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Allow specifying the cacheability flags for IOMMU page
tables on a per-domain basis.
Change-Id: I03c4c1b08b03bbc5a1ba9931ed117518ff772ce5
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
In addition to not registering IOMMU devices, do not
register the IOMMU API on SoC versions which do not support
it. This will allow iommu_found to work properly.
Change-Id: I103fc4ff910bee3eb4039e19de52f36cd1778861
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add support for new SMMUs found on the APQ8064
target and enable the iommu driver for 8064.
Change-Id: I0b4d42f5b47dd5299c44e381dd4320b7570c3ce5
Signed-off-by: Joel King <joelking@codeaurora.org>
Don't flush the entire TLB on attach/detach. Only flush the
TLB entries associated with a specific context when the
domain is detached from that context.
Change-Id: I1690f0f7a01598e67edf76472645abf6e15ef4ad
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
When mapping or unmapping within a domain, only invalidate
the TLB entries associated with the VA of the mapping being
modified (and the ASID associated with the related context)
rather than invalidating the entire TLB.
Change-Id: Ic2002a4a0edc14a01a29bedde2b7e2903cd74ffe
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
When modifying the page tables, only clean the modified
entries in the cache, rather than cleaning the entire
first-level page table and all second-level tables.
Change-Id: I53f38eacf88a0864b20b3c87ea4ecb35f913e19d
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Reuse ASID values within an SMMU if multiple contexts
within that SMMU are using the same page table. This
should improve TLB performance by eliminating duplicate
TLB entries for the same page table but with different ASID
tags.
Change-Id: I61e3c4c3edcbc42abab0e64dcecab3d8744dc3d6
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add the human readable name of the iommu device to drvdata.
This makes debugging iommu page faults much easier since
the faulting device name is immediately present. The
context where the fault occured can the be derived from
existing information.
Change-Id: I63b6f05dea155e40f1176f2bebb5eb3cee69a412
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Forbid mappings that overwrite previous mappings,
regardless of size, unless they had been unmapped first.
Change-Id: I54577ce3a34c7f753fc893471ce11e9ac4dd0f1d
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Use the relaxed versions of readl/writel for IOMMU register
access, inserting barriers where appropriate.
Change-Id: I06b54c3eb327a7fe3d9d3850d7906164b96f4363
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Create a new iommu api to return the base address of the domain's
pagetable.
Change-Id: Ibf5425fa7ae253b16bfe795614bd7943efd7e3e3
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Add the ability to pass flags into the iommu_domain_alloc
function to specify domain attributes.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Add IOMMU ops functions to allow mapping and unmapping
whole ranges of address space based on a scatterlist.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Merge batch of fixes from Andrew Morton:
"The simple_open() cleanup was held back while I wanted for laggards to
merge things.
I still need to send a few checkpoint/restore patches. I've been
wobbly about merging them because I'm wobbly about the overall
prospects for success of the project. But after speaking with Pavel
at the LSF conference, it sounds like they're further toward
completion than I feared - apparently davem is at the "has stopped
complaining" stage regarding the net changes. So I need to go back
and re-review those patchs and their (lengthy) discussion."
* emailed from Andrew Morton <akpm@linux-foundation.org>: (16 patches)
memcg swap: use mem_cgroup_uncharge_swap fix
backlight: add driver for DA9052/53 PMIC v1
C6X: use set_current_blocked() and block_sigmask()
MAINTAINERS: add entry for sparse checker
MAINTAINERS: fix REMOTEPROC F: typo
alpha: use set_current_blocked() and block_sigmask()
simple_open: automatically convert to simple_open()
scripts/coccinelle/api/simple_open.cocci: semantic patch for simple_open()
libfs: add simple_open()
hugetlbfs: remove unregister_filesystem() when initializing module
drivers/rtc/rtc-88pm860x.c: fix rtc irq enable callback
fs/xattr.c:setxattr(): improve handling of allocation failures
fs/xattr.c:listxattr(): fall back to vmalloc() if kmalloc() failed
fs/xattr.c: suppress page allocation failure warnings from sys_listxattr()
sysrq: use SEND_SIG_FORCED instead of force_sig()
proc: fix mount -t proc -o AAA
Many users of debugfs copy the implementation of default_open() when
they want to support a custom read/write function op. This leads to a
proliferation of the default_open() implementation across the entire
tree.
Now that the common implementation has been consolidated into libfs we
can replace all the users of this function with simple_open().
This replacement was done with the following semantic patch:
<smpl>
@ open @
identifier open_f != simple_open;
identifier i, f;
@@
-int open_f(struct inode *i, struct file *f)
-{
(
-if (i->i_private)
-f->private_data = i->i_private;
|
-f->private_data = i->i_private;
)
-return 0;
-}
@ has_open depends on open @
identifier fops;
identifier open.open_f;
@@
struct file_operations fops = {
...
-.open = open_f,
+.open = simple_open,
...
};
</smpl>
[akpm@linux-foundation.org: checkpatch fixes]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull DMA mapping branch from Marek Szyprowski:
"Short summary for the whole series:
A few limitations have been identified in the current dma-mapping
design and its implementations for various architectures. There exist
more than one function for allocating and freeing the buffers:
currently these 3 are used dma_{alloc, free}_coherent,
dma_{alloc,free}_writecombine, dma_{alloc,free}_noncoherent.
For most of the systems these calls are almost equivalent and can be
interchanged. For others, especially the truly non-coherent ones
(like ARM), the difference can be easily noticed in overall driver
performance. Sadly not all architectures provide implementations for
all of them, so the drivers might need to be adapted and cannot be
easily shared between different architectures. The provided patches
unify all these functions and hide the differences under the already
existing dma attributes concept. The thread with more references is
available here:
http://www.spinics.net/lists/linux-sh/msg09777.html
These patches are also a prerequisite for unifying DMA-mapping
implementation on ARM architecture with the common one provided by
dma_map_ops structure and extending it with IOMMU support. More
information is available in the following thread:
http://thread.gmane.org/gmane.linux.kernel.cross-arch/12819
More works on dma-mapping framework are planned, especially in the
area of buffer sharing and managing the shared mappings (together with
the recently introduced dma_buf interface: commit d15bd7ee44
"dma-buf: Introduce dma buffer sharing mechanism").
The patches in the current set introduce a new alloc/free methods
(with support for memory attributes) in dma_map_ops structure, which
will later replace dma_alloc_coherent and dma_alloc_writecombine
functions."
People finally started piping up with support for merging this, so I'm
merging it as the last of the pending stuff from the merge window.
Looks like pohmelfs is going to wait for 3.5 and more external support
for merging.
* 'for-linus' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
common: DMA-mapping: add NON-CONSISTENT attribute
common: DMA-mapping: add WRITE_COMBINE attribute
common: dma-mapping: introduce mmap method
common: dma-mapping: remove old alloc_coherent and free_coherent methods
Hexagon: adapt for dma_map_ops changes
Unicore32: adapt for dma_map_ops changes
Microblaze: adapt for dma_map_ops changes
SH: adapt for dma_map_ops changes
Alpha: adapt for dma_map_ops changes
SPARC: adapt for dma_map_ops changes
PowerPC: adapt for dma_map_ops changes
MIPS: adapt for dma_map_ops changes
X86 & IA64: adapt for dma_map_ops changes
common: dma-mapping: introduce generic alloc() and free() methods
Adapt core x86 and IA64 architecture code for dma_map_ops changes: replace
alloc/free_coherent with generic alloc/free methods.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
[removed swiotlb related changes and replaced it with wrappers,
merged with IA64 patch to avoid inter-patch dependences in intel-iommu code]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Luck <tony.luck@intel.com>
they contain two new IOMMU drivers for the ARM Tegra 2 and 3 platforms.
Besides that there are also a few patches for the AMD IOMMU which
prepare the driver for adding intr-remapping support and a couple of
fixes.
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Merge tag 'iommu-updates-v3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
"The IOMMU updates for this round are not very large patch-wise. But
they contain two new IOMMU drivers for the ARM Tegra 2 and 3
platforms. Besides that there are also a few patches for the AMD
IOMMU which prepare the driver for adding intr-remapping support and a
couple of fixes."
* tag 'iommu-updates-v3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu:
iommu/amd: Fix section mismatch
iommu/amd: Move interrupt setup code into seperate function
iommu/amd: Make sure IOMMU interrupts are re-enabled on resume
iommu/amd: Fix section warning for prealloc_protection_domains
iommu/amd: Don't initialize IOMMUv2 resources when not required
iommu/amd: Update git-tree in MAINTAINERS
iommu/tegra-gart: fix spin_unlock in map failure path
iommu/amd: Fix double free of mem-region in error-path
iommu/amd: Split amd_iommu_init function
ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver
ARM: IOMMU: Tegra20: Add iommu_ops for GART driver
