Commit graph

17 commits

Author SHA1 Message Date
Stepan Moskovchenko
c7e84a73f8 msm: iommu: Fix error handling for uninitialized contexts
Do not return a context pointer if the context does not
have driver data associated with it to ensure that IOMMU
functions fail gracefully on targets where the IOMMU
hardware could not be found.

Change-Id: Ibf915251a4a133c2baaf9fb5b01145fb3c419347
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:15 -08:00
Stephen Boyd
04e3747cfe iommu: Update MSM iommu driver license text
Remove the spurious address which may or may not be up to date.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2013-02-25 11:40:14 -08:00
Sathish Ambley
b1193b5632 msm: iommu: Add support for SMMU v2
SMMU v2 is based off the ARM SMMU architecture specification.

The SMMUs primary purpose is to provide virtual address translation
and abstract the physical view of system memory.  In doing so,
discontiguous physical memory appears virtually contiguous to
hardware cores.

The SMMU instances are now represented in device tree with each
instance having multiple translation context banks.

Change-Id: If4733500e5226984d26f1c8a97ae98603c2f75f9
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>
2013-02-25 11:40:12 -08:00
Stepan Moskovchenko
e6b397c193 msm: iommu: Support IOMMU page fault reporting
Provide the ability to report IOMMU fault events through
the IOMMU API. The driver will fall back on the previous
behavior of printing the fault information registers if no
domain fault handler is registered, or if the handler
returns -ENOSYS.

Change-Id: I9144e9b4bba117b67c7d81609e986ea716b34882
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:09 -08:00
Stepan Moskovchenko
2d71f5b988 msm: iommu: Avoid using unprobed devices
Fail to look up IOMMU context devices if there is no driver
data associated with them, as this would imply that the
device did not pass the hardware sanity check.

Change-Id: If2998a96dea9342850092344c4ad70eebf965229
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:08 -08:00
Matt Wagantall
8850c53091 msm: iommu: Cleanup clocks to match new naming convention
Change-Id: Id859d3dabe2f9851473210fe03e8642b55629fa8
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2013-02-25 11:40:07 -08:00
Stepan Moskovchenko
8c0dc59363 msm: iommu: Add TLB MHF workaround
Perform a context TLBIVA operation following a TLBIALL
operation.

Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:06 -08:00
Matt Wagantall
8e300ab8c6 msm: iommu: Discontinue use of clk_set_min_rate()
Support for the proprietary clk_set_min_rate() API is being removed from
the clock driver. Replace it with a clk_round_rate() and clk_set_rate().

Change-Id: Icd62a8768d99cf007cf899c705626f8eacbaa7c8
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2013-02-25 11:40:05 -08:00
Stepan Moskovchenko
ca45ffe27a msm: iommu: Use threaded IRQ handler for page faults
A threaded interrupt handler for IOMMU page faults will
allow the use of the new clock APIs from the interrupt
handler.

Change-Id: I381df3974daa7fbc4bc4ec0558434959597b4f24
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:05 -08:00
Stepan Moskovchenko
b1ba6c1035 msm: iommu: Switch to non-secure interrupts
With the secure environment configuration in place, switch
to using the non-secure interrupts for page faults.

Change-Id: I133e82b5c3c10a408fb0894abfe81621fd2cdfd7
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:40:04 -08:00
Shubhraprakash Das
afc49f2eab msm: iommu: Enable use of TTBR1 register of IOMMU
Add a new platform data in iommu devices to indicate whether ttbr1
should be used which also dictates how the address space should be
split between ttbr0 and ttbr1.

Change-Id: Iab3aac74256bd4d49f47f89e6638f014e6e539e9
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
2013-02-25 11:40:01 -08:00
Stepan Moskovchenko
91f92f6db6 msm: iommu: Switch to the new clock APIs
Change-Id: I26521f28bc0217eaf394ff4c133bb3266b7582b5
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:39:56 -08:00
Stepan Moskovchenko
3d28e708a1 msm: iommu: Use the non-secure interrupts for page faults
Configure page faults to trigger the non-secure interrupt
line.

Change-Id: I094cd1cfbed9e71d4f714adc938594bbb54fa89c
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:39:50 -08:00
Stepan Moskovchenko
5d404c5861 msm: iommu: Re-use ASIDs within an IOMMU
Reuse ASID values within an SMMU if multiple contexts
within that SMMU are using the same page table. This
should improve TLB performance by eliminating duplicate
TLB entries for the same page table but with different ASID
tags.

Change-Id: I61e3c4c3edcbc42abab0e64dcecab3d8744dc3d6
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:39:45 -08:00
Laura Abbott
12ee374a2f msm: iommu: Add device name to drvdata
Add the human readable name of the iommu device to drvdata.
This makes debugging iommu page faults much easier since
the faulting device name is immediately present. The
context where the fault occured can the be derived from
existing information.

Change-Id: I63b6f05dea155e40f1176f2bebb5eb3cee69a412
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
2013-02-25 11:39:44 -08:00
Stepan Moskovchenko
eea04ff5a0 msm: iommu: Use relaxed register access functions
Use the relaxed versions of readl/writel for IOMMU register
access, inserting barriers where appropriate.

Change-Id: I06b54c3eb327a7fe3d9d3850d7906164b96f4363
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2013-02-25 11:39:42 -08:00
Ohad Ben-Cohen
b10f127e1a msm: iommu: move to drivers/iommu/
This should ease finding similarities with different platforms,
with the intention of solving problems once in a generic framework
which everyone can use.

Compile-tested for MSM8X60.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2011-06-21 10:48:50 +02:00
Renamed from arch/arm/mach-msm/iommu_dev.c (Browse further)