Client has ability to request delay per transfer through SPI
framework. SPI controller driver needs to put this delay after every
transfer. However, this also means that multiple transfers per message
cannot be combined to be able to insert this delay per transfer.
CS will be de-asserted after completion of each transfer
on older version of QUP/SPI core.
CRs-fixed: 416186
Change-Id: Id9266ce7043e020fa7e1233c66baba30ba3d496c
Signed-off-by: Gilad Avidov <gavidov@codeaurora.org>
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
(cherry picked from commit 525593d47c425c666bdbe73c592fd5ff37cf622e)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Support to transfer 64K bytes in a single SPI
transfer in DMA mode on targets which support
16 bits in QUP_MX_OUTPUT_CNT register. Earlier
if the application sends more than 4K data it is
split up in to 4K chunks, irrespective of the size
of the QUP_MX_OUTPUT_CNT register.
CRs-Fixed: 383120
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
(cherry picked from commit c5fbd7f2dccf52e95e6c1504a28b19d1dc622028)
Change-Id: Idb27c651e0a81a4efe363feabc44e26c5b61fb0f
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
Configure the spi clk, mosi, miso, cs gpio's on per
transaction basis and unconfigure otherwise.
It will remove the conflicts if same gpio's are
being used by different modules if no SPI device
is present.
CRs-Fixed: 387043
Change-Id: Ib5c3bfbd13681f4aee0c4a815b19f423c586e160
Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
(cherry picked from commit 66554a1317d40fbacd1a7e1e3210de8fb947ad57)
Signed-off-by: Sudhir Sharma <sudsha@codeaurora.org>
When using device tree, the bus number needs to be set based on the
cell-index property rather than the 'id' from the platform device.
This makes sure that the SPI bus number is set correctly.
Change-Id: I4489c28363a7fd79f3bc3db76207a1bc8ef507cb
Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org>
If infinite mode is not supported, chip select goes
high after every 4k bytes. Make sure the same behavior
does not happen on targets that support infinite mode.
CRs-Fixed: 361961
Change-Id: I5cfea96202718214a8edd060e06fbb7fb2fa90a2
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
The spidev module is not being removed cleanly since
the SPI device is not being unregistered.
Change-Id: I1f97163b3eef585b420a474cdd2aacc7657e6254
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Change-Id: I4d5d611a64d8fac4c643e8eb454056ab939eff99
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Adding a seperate rx buffer for spidev. This allows errors
in transmission to be noticed.
Change-Id: I02258bccf1a4a5543b94c30f51294185498c3c40
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Adding parameters to spidev module, to allow it to be
added dynamically to the SPI bus. This allows a test
application to insmod it whenever needed and test the
SPI core.
Change-Id: Ifdb7b0c7a67f58d46ebcdc1032f0a654b6c53080
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Including the following patches:
commit 0f7723bb09440ae69743fed38cf558a838aa9bdf
Author: Bryan Huntsman <bryanh@codeaurora.org>
Date: Thu Oct 6 23:13:56 2011 -0700
Revert "spi_qsd: GPIO configuration changes for SPI chip-select line"
This reverts commit 7eaa08b75995289a91c7dd1f3616f79227f5f923.
Signed-off-by: Bryan Huntsman <bryanh@codeaurora.org>
commit 7eaa08b75995289a91c7dd1f3616f79227f5f923
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 28 16:26:39 2011 -0600
spi_qsd: GPIO configuration changes for SPI chip-select line
The chip-select GPIO's pertaining to each slave remains in suspended
configuration until the first transfer is intiated by the slave.
Change-Id: I3aa8555289be7ce457b91a969cf03909be0965d7
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e47df9f9b932968152ab2908153e60adab4402d7
Author: Jordan Crouse <jcrouse@codeaurora.org>
Date: Mon Sep 19 11:21:16 2011 -0600
spi_qsd: Fix possible uninitialized variable
Change-Id: Ic0dedbad184046e9835cde015ad5d592f33e82a6
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
commit 4ae02c76b98f2b96bfb8c4fa02f40cfda2f16f97
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Sep 20 17:28:50 2011 -0600
spi_qsd: Fix Klocwork errors in SPI driver
Change-Id: I1fe6632e68ea625966aced37a1b140b30534e101
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 52e065ba3d86977b59937693ac7e85836cf4eca8
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Sep 1 12:12:58 2011 -0600
spi_qsd: Fix for SPI Operational State Invalid error
This error is reproted randomly when the SPI core is put
into RUN state and occurs when the ACPU clock is low.
When the timer expires, we check again to ensure that the
STATE_VALID bit is set before returning.
Change-Id: Ic8912534f4924efd999b8aa1d75a9fd19749e870
CRs-fixed: 304672
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a9a8816913e5466e06b443c42cbf8ae866b95fd1
Author: Jeff Ohlstein <johlstei@codeaurora.org>
Date: Fri Sep 2 13:55:16 2011 -0700
msm: dma: remove crci conflict checking
The crci conflict checking code was designed for a system where a crci's
mux could be changed at runtime. In reality, our chips configure these
statically, so it is not necessary.
Change-Id: I4d5f32cd8728d3c78fca8f64aed0e02b57b6afba
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
commit 36c6f1bb48af3e65db281cc7ccb913a8e81a598e
Author: Matt Wagantall <mattw@codeaurora.org>
Date: Wed Aug 17 15:44:58 2011 -0700
msm: clock: Rename all I2C/SPI clocks to 'core_clk' or "iface_clk"
Drivers should now use their device names to distinguish between
clocks of the same type rather than the clock name.
Change-Id: Iab12caf4eab163773d68f1b2adc1bb4c72c69e83
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
commit 55e656e68cac78eaa367341df2e693a483a53f84
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon Jun 6 14:34:38 2011 -0700
drivers: barriers: Replace dsb() with mb()
Replace explicit dsb() calls with mb(). Now that the
generic ARM implementation defines mb() to mean (at least)
dsb(), it is appropriate to switch back to the generic
kernel version of the barriers. This is also needed for
correctness on certain targets (such as 7x27) where dsb()
is insufficient and other operations (such as outer cache
sync or writing to strongly-ordered memory) are required to
ensure proper I/O operations ordering. In some cases,
remove explicit calls to outer_sync following a barrier
since the barrier will now have an explicit outer_sync
call.
Change-Id: I2c53b8534af9c3cbac4d4d77b322f897a39e7758
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit 17194a32164b868f80ce84e313f9148d1dc77e7b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 3 18:10:09 2011 -0600
spi_qsd: GPIO configuration changes
On suspend, the SPI related GPIO's enter a low power configuration
and on resume they move to an active configuration. This helps
conserving power during power collapse.
Change-Id: I0911867e10fadcfc6950f6dddf74226bd6321c16
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 1777d88688511cd59bad7674c6a2246e0c93142b
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Jun 1 16:54:07 2011 -0600
spi_qsd: Remove restriction on SPI clock speed.
When multiple slaves are connected to the SPI controller,
the driver does not allow the clock to go from lower speed
to a higher speed. This restriction is not required since
there can only be one slave listening at a time. Also,
there are no hardware limitations in doing so.
Change-Id: I4ecabfb3a1515416f050c18678cf0987dcde9d1e
CRs-fixed: 290127
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 4b7c7bfc546cb02141da9d034421aefe5635f857
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 7 14:18:42 2011 -0600
spi_qsd: Add null pointer check before dereferencing
During probe, there is no cur_msg to set the status.
Change-Id: I82e00b9d74d45c36b70078b171db1bb150d1bfac
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit bf514c766fcc2bdee680f80a2ea16c7fead0be96
Author: Stepan Moskovchenko <stepanm@codeaurora.org>
Date: Mon May 16 13:37:11 2011 -0700
msm: spi: Fix access to unclocked registers
Don't program the GSBI configuration until the clocks have
been turned on.
Change-Id: Idee5f5dffcb5ed0f7de18f1e508ee8c76b618894
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
commit d9c248213f4cd025f3d3586f0de81e4bc44a5a54
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon May 16 16:43:08 2011 -0600
spi_qsd: Fix for SPI input overrun error
This error occurs due to a bug in the controller.
This bogus error is reported when a transition from run
to reset state occurs and if the input FIFO has an odd number
of entries.
Change-Id: I555864d4855ac6d416997da69d8bc6aee7a82178
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e99ceb5b3da7bec51be853809c25df8e32b2c1e6
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Apr 14 18:36:34 2011 -0600
spi_qsd: Multi-transfer handling
When there are mulitple SPI transfers in a message, we
default to using FIFO mode for all the transfers. As special
case, we handle a WR-WR or WR-RD transfer where we choose
between FIFO mode and DM mode based on the total length of
the transaction.
Change-Id: I6fbc1a06a22f9782db5b97c9b87cc53392a8c2fa
CRs-fixed: 276666
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 8f3d3aaa51603a929027bc820fe2d3515e959779
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Apr 19 14:19:29 2011 -0600
spi_qsd: Ensure IO operation ordering
Adding memory barriers to ensure that the writes and reads
to the SPI and QUP registers happen in the correct order.
Change-Id: I86d8f63b0e9547a2339ee4ab5c713cf8864fef04
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 36b3fae5f54230cd1e4ca072d1f55cb2f79d8945
Author: Laura Abbott <lauraa@codeaurora.org>
Date: Thu Oct 14 12:48:16 2010 -0700
spi_qsd: Fix section mismatch
The function msm_spi_probe is referenced outside of the __init section.
This fixes the problem by calling platform_driver_probe instead of
platform_driver_register since this device is not hotplugable.
Change-Id: I3a563c6fc562ada959317b54ff60a38f9ce517d8
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
commit dc2e36eecefb6628031afeff28afd9d97f2f3f6f
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Wed Sep 29 16:58:20 2010 -0600
spi_qsd: Changes to support DM mode.
The dma_config function may not always be present.
This change makes sure the driver gets DM resources
irrespective of the dma_config function.
Change-Id: I25a2497d20e973f22b76f2b5d6f68c86bd4d5f1d
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit a39bd4a398674c320925540eec91d94d2b7d53f3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Thu Aug 19 17:48:01 2010 -0600
spi_qsd: Modify timeout mechanism to check SPI state valid bit.
In order to allow sufficient time for the SPI state
transition to occur, calculate the timeout based on
the SPI clock speed.
Change-Id: I3d6955b2a64a8bf8980590e352fbd564250210fb
CRs-fixed: 250998
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b5887b644ba9545672d637985713c7e0e2e5bb50
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Aug 3 16:57:33 2010 -0600
spi_qsd: Use FIFO mode when DM mode configuration fails.
When the Data Mover configuration fails, the driver
uses FIFO mode.
Change-Id: Iaf83e50fe725654c58260c5cd1150cdeb56f51c8
CRs-fixed: 249238
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit ced8ad320d480006643a3aa3474f5c0d77457454
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Mon Jun 28 16:01:33 2010 -0600
spi_qsd: Use SW timeout instead of SPI_TIME_OUT register.
Since the software timeout is already present in the driver,
the hardware SPI_TIME_OUT register is being removed.It is just
redundant and used only for debugging purposes.
Change-Id: I829cb944444fc3e5053bc810adffe2b87f511b63
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit 35e9155f59317e8ef63b8ce5190f26f5cae6a8ee
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Fri Jun 25 16:48:25 2010 -0600
spi_qsd: Disable irqs in the probe function.
The irqs are disabled at all times in the probe function
irrespective of the use of remote lock.
Change-Id: I0997d07b93c97a12bca6d80a9bba59682b1bec3e
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit e6af92d74a35ba267125bc61c2c6c18034c03af3
Author: Harini Jayaraman <harinij@codeaurora.org>
Date: Tue Jun 22 12:20:46 2010 -0600
spi_qsd: Disable clocks and irqs when SPI bus is not in use.
The SPI clocks and irqs are enabled per workqueue and correspondingly
disabled once the workqueue is completed.
Change-Id: Ib22b7e3b946eb4c829940e43327caaf5aff7721b
CRs-fixed: 242866
Signed-off-by: Harini Jayaraman <harinij@codeaurora.org>
commit b25e4220efdacc231cb150fc263af1e3f525b165
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Jun 8 15:25:47 2010 +0300
spi_qsd: Add usage of MX_WRITE_COUNT register
Use MX_WRITE_COUNT register to reduce the amount of TX interrupts in
FIFO mode for transfers smaller than FIFO size.
Change-Id: I7208fdc85b626a31a8b781ee5c56f73beee6c427
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 7ed56f3441c5ebe7fd8107fb8468207a88bc743f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Jun 9 16:14:44 2010 +0300
spi_qsd: Minor changes to support Data Mover mode on QUPe core
Minor changes to support Data Mover made on QUPe core.
Change-Id: I54663115a43f7fd9b52a2ddee796b5499d5f239a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a85fd0ab6484eb2ef404c062adffce1ee22337f1
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Jun 3 13:57:02 2010 +0300
spi_qsd: Add support for QUPe controller
QUPe controller is a new version of Qualcomm SPI controller. The
controller also supports other peripheral protocols, however its SPI
functionality is very similar to previous SPI core, supported by spi_qsd.
Therefore the same driver is being utilized with some register address
modification and minor flow change.
Change-Id: Ic091ef2c2ed699b43f786c278b613e69a7e9039b
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit ce270f6f9198cf40ee5638b35e595da81116241e
Author: Jeff Ohlstein <johlstei@quicinc.com>
Date: Thu Apr 29 13:40:53 2010 -0700
drivers: spi: Support ADM3 in spi_qsd driver
Change-Id: I6dfa38a4c33a8e4619d56ce30787e1aeafc8356d
Signed-off-by: Jeff Ohlstein <johlstei@quicinc.com>
commit 47346fa611773ef92d12d9145ea33a7f2c79052f
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 28 11:33:15 2010 +0300
spi_qsd: Add disable/enable of pclk to suspend/resume functions
Add disable/enable of pclk to suspend/resume functions to improve
power performance.
Change-Id: I871e5ac90a998f2942778bb1e8c2c9d583a9ae00
CRs-fixed: 235046
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit a96eba98fbbd21ac657f5d551466909352766ead
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:40:37 2010 +0300
spi_qsd: Making irq code implicit for the core mode in use
Make code clear regarding what mode is in use in the irq.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 6a02d85f8f48cf6f86cddc38c9fce9c1179208b4
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Apr 13 21:16:45 2010 +0300
spi_qsd: Separate tx/rx/error statistics between contexts
To improve SMP safety, separate the tx/error statistics between
contexts. This protects the statistics from accidentally being
access from another context at the same time.
Change-Id: Ibc52406e7b06a4bb5142f8a09a2f35442cb9df8a
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 31f301c171aab8e42f8b6abe9b7866412cb546a8
Author: Lena Salman <esalman@qualcomm.com>
Date: Tue Mar 23 14:51:00 2010 +0200
spi_qsd: Add better handling for pending transfers during suspend
To improve SMP safety, add better handling in suspend function to wait
for graceful closure of pending transfers. This graceful closure waits
for all the pending transfers to finish or timeout, while not allowing new
ones to queue up. This allows correct handling of all the resources
involved in a transfer before suspend.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 8fbf6e4c5371520b5f9de2001e2ebd15773e918b
Author: Lena Salman <esalman@qualcomm.com>
Date: Thu Mar 25 10:44:10 2010 +0200
spi_qsd: Add mutex to get exclusive access to controller registers
To improve SMP safety, add mutex to get exclusive access to controller
registers.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 9405adda67d8c6a856243e599f09d806b4bc6de5
Author: Kenneth Heitke <kheitke@quicinc.com>
Date: Thu Apr 15 16:33:16 2010 -0600
spi_qsd: Move global input_fifo_size to device context.
Fix reference to device data input_fifo_size which is missing from the
previous patch.
Change-Id: Ia469896edd0fd90d7ded2b8ec44f9075474b3ec8
Signed-off-by: Kenneth Heitke <kheitke@quicinc.com>
commit 6031094ca6a940a47437bc6a092e813b4bc41d2a
Author: Lena Salman <esalman@qualcomm.com>
Date: Sun Apr 11 10:34:48 2010 +0300
spi_qsd: Move global input_fifo_size to device context.
To improve SMP safety move global variable input_fifo_size to device
context.
Signed-off-by: Lena Salman <esalman@qualcomm.com>
commit 97f585033413b1f8ae210bbffd617a4af3462982
Author: Lena Salman <esalman@qualcomm.com>
Date: Wed Apr 14 18:35:54 2010 +0300
spi_qsd: Initial contribution of the MSM SPI driver
This adds MSM SPI controller driver. The driver is SPI master, and
allows slave connections. Current version of the driver supports
FIFO and DM modes chosen upon the message size. The driver also
supports loopback mode which can be used for testing purposes.
This is a squashed version of all the MSM SPI driver changes on the QuIC
MSM 2.6.29 kernel which can be found at www.codeaurora.org.
It also contains all relevant adaptations to SPI core changes in 2.6.32
kernel.
https://www.codeaurora.org/gitweb/quic/la/?p=kernel/msm.git;a=blob;f=drivers/spi/spi_qsd.c;h=1c8e3ec727b29040648ef9a4949396f7109528ae;hb=refs/heads/android-msm-2.6.29b
Change-Id: Ibc1e71deb662af87deed77f10dcc8a3a46a8f012
Signed-off-by: Lena Salman <esalman@qualcomm.com>
Signed-off-by: David Brown <davidb@codeaurora.org>
This patch ensures that the last bit of a transfer gets correctly
flushed out of the register.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This condition is used to determine 8 bits or 16 and 32 bits transfer.
Obviously it is reversed.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Since the member was dropped from the common Blackfin header, we need
to stop using it in the SPORT driver too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
No other SPI controller has this field, and SPI clients should be setting
this up in their own drivers. So drop it from the Blackfin controller to
keep people from using it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Each transfer may have its own bits per word.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This controller is only for blackfin 5xx soc, so rename it to BFIN5XX
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Currently, if we request for frequency greater than maximum possible, spi driver
returns error.
For example, if the spi block src frequency is 333/4 MHz, i.e. 83.33.. MHz,
maximum frequency programmable would be src/2. Which would come around 41.6...
It is difficult to pass frequency in these figures. We normally try to program
in round figures, like 42 MHz and it should get programmed to <=
requested_frequency, i.e. 41.6...
For this to happen, we must not return error even if requested freq is higher
than max possible. But should program it to max possible.
Reported-by: Vinit Kamalaksha Shenoy <vinit.shenoy@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We were not properly advertising the MODE bits supported by this driver, fix
that.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We do not need to use a flag to indicate if the master driver is stopping
it is sufficient to perform spi master unregistering in the platform
driver's remove function.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch converts the bcm63xx SPI driver to use the SPI infrastructure
pump message queue. Since we were previously sleeping in the SPI
driver's transfer() function (which is not allowed) this is now fixed as well.
To complete that conversion a certain number of changes have been made:
- the transfer len is split into multiple hardware transfers in case its
size is bigger than the hardware FIFO size
- the FIFO refill is no longer done in the interrupt context, which was a
bad idea leading to quick interrupt handler re-entrancy
Tested-by: Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
A new enum indicating the dma channel direction was introduced by:
commit 49920bc669
dmaengine: add new enum dma_transfer_direction
The following commit changed spi-ep93xx to use the new enum:
commit a485df4b44
spi, serial: move to dma_transfer_direction
In doing so a sparse warning was introduced:
warning: mixing different enum types
int enum dma_data_direction versus
int enum dma_transfer_direction
This is produced because the 'dir' passed in ep93xx_spi_dma_prepare
is an enum dma_data_direction and is being used to set the
dma_slave_config 'direction' which is now an enum dma_transfer_direction.
Fix this by converting spi-ep93xx to use the new enum type in all
places.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mika Westerberg <mika.westerberg@iki.fi>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
calculate_effective_freq() was still not optimized and there were cases when it
returned without error and with values of cpsr and scr as zero.
Also, the variable named found is not used well.
This patch targets to optimize and correct this routine. Tested for SPEAr.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Vinit Kamalaksha Shenoy <vinit.shenoy@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
pl022 ssp controller supports word lengths from 4 to 16 (or 32) bits.
Currently implemented checks were incorrect. It has following check
if (pl022->vendor->max_bpw >= 32)
which must be checking for <=.
Also error print message is incorrect, that prints "range is from 1 to
16".
Fix both these issues.
Signed-off-by: Vinit Shenoy <vinit.shenoy@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Pull ARM fixes from Russell King:
"Nothing too disasterous, the biggest thing being the removal of the
regulator support for vcore in the AMBA driver; only one SoC was using
this and it got broken during the last merge window, which then
started causing problems for other people. Mutual agreement was
reached for it to be removed."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7386/1: jump_label: fixup for rename to static_key
ARM: 7384/1: ThumbEE: Disable userspace TEEHBR access for !CONFIG_ARM_THUMBEE
ARM: 7382/1: mm: truncate memory banks to fit in 4GB space for classic MMU
ARM: 7359/2: smp_twd: Only wait for reprogramming on active cpus
ARM: 7383/1: nommu: populate vectors page from paging_init
ARM: 7381/1: nommu: fix typo in mm/Kconfig
ARM: 7380/1: DT: do not add a zero-sized memory property
ARM: 7379/1: DT: fix atags_to_fdt() second call site
ARM: 7366/3: amba: Remove AMBA level regulator support
ARM: 7377/1: vic: re-read status register before dispatching each IRQ handler
ARM: 7368/1: fault.c: correct how the tsk->[maj|min]_flt gets incremented
Miscellaneous driver bug fixes. No major changes in this branch.
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Merge tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull SPI bug fixes from Grant Likely:
"Miscellaneous driver bug fixes. No major changes in this branch."
* tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6:
spi/imx: prevent NULL pointer dereference in spi_imx_probe()
spi/imx: mark base member in spi_imx_data as __iomem
spi/mpc83xx: fix NULL pdata dereference bug
spi/davinci: Fix DMA API usage in davinci
spi/pL022: include types.h to remove compilation warnings
The AMBA bus regulator support is being used to model on/off switches
for power domains which isn't terribly idiomatic for modern kernels with
the generic power domain code and creates integration problems on platforms
which don't use regulators for their power domains as it's hard to tell
the difference between a regulator that is needed but failed to be provided
and one that isn't supposed to be there (though DT does make that easier).
Platforms that wish to use the regulator API to manage their power domains
can indirect via the power domain interface.
This feature is only used with the vape supply of the db8500 PRCMU
driver which supplies the UARTs and MMC controllers, none of which have
support for managing vcore at runtime in mainline (only pl022 SPI
controller does). Update that supply to have an always_on constraint
until the power domain support for the system is updated so that it is
enabled for these users, this is likely to have no impact on practical
systems as probably at least one of these devices will be active and
cause AMBA to hold the supply on anyway.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When no platform_data is present and either 'spi-num-chipselects' is
not defined in the DT or 'cs-gpios' has less entries than
'spi-num-chipselects' specifies, the NULL platform_data pointer is
being dereferenced.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Merge batch of fixes from Andrew Morton:
"The simple_open() cleanup was held back while I wanted for laggards to
merge things.
I still need to send a few checkpoint/restore patches. I've been
wobbly about merging them because I'm wobbly about the overall
prospects for success of the project. But after speaking with Pavel
at the LSF conference, it sounds like they're further toward
completion than I feared - apparently davem is at the "has stopped
complaining" stage regarding the net changes. So I need to go back
and re-review those patchs and their (lengthy) discussion."
* emailed from Andrew Morton <akpm@linux-foundation.org>: (16 patches)
memcg swap: use mem_cgroup_uncharge_swap fix
backlight: add driver for DA9052/53 PMIC v1
C6X: use set_current_blocked() and block_sigmask()
MAINTAINERS: add entry for sparse checker
MAINTAINERS: fix REMOTEPROC F: typo
alpha: use set_current_blocked() and block_sigmask()
simple_open: automatically convert to simple_open()
scripts/coccinelle/api/simple_open.cocci: semantic patch for simple_open()
libfs: add simple_open()
hugetlbfs: remove unregister_filesystem() when initializing module
drivers/rtc/rtc-88pm860x.c: fix rtc irq enable callback
fs/xattr.c:setxattr(): improve handling of allocation failures
fs/xattr.c:listxattr(): fall back to vmalloc() if kmalloc() failed
fs/xattr.c: suppress page allocation failure warnings from sys_listxattr()
sysrq: use SEND_SIG_FORCED instead of force_sig()
proc: fix mount -t proc -o AAA
Many users of debugfs copy the implementation of default_open() when
they want to support a custom read/write function op. This leads to a
proliferation of the default_open() implementation across the entire
tree.
Now that the common implementation has been consolidated into libfs we
can replace all the users of this function with simple_open().
This replacement was done with the following semantic patch:
<smpl>
@ open @
identifier open_f != simple_open;
identifier i, f;
@@
-int open_f(struct inode *i, struct file *f)
-{
(
-if (i->i_private)
-f->private_data = i->i_private;
|
-f->private_data = i->i_private;
)
-return 0;
-}
@ has_open depends on open @
identifier fops;
identifier open.open_f;
@@
struct file_operations fops = {
...
-.open = open_f,
+.open = simple_open,
...
};
</smpl>
[akpm@linux-foundation.org: checkpatch fixes]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Commit 178db7d3, "spi: Fix device unregistration when unregistering
the bus master", changed device initialization to be children of the
bus master, not children of the bus masters parent device. The pdata
pointer used in fsl_spi_chipselect must updated to reflect the changed
initialization.
Signed-off-by: Kenth Eriksson <kenth.eriksson@transmode.com>
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The driver uses NULL for dma_unmap_single instead of
the struct device that the API expects.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Tested-by: Akshay Shankarmurthy <akshay.s@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Pull slave-dmaengine update from Vinod Koul:
"This includes the cookie cleanup by Russell, the addition of context
parameter for dmaengine APIs, more arm dmaengine driver cleanup by
moving code to dmaengine, this time for imx by Javier and pl330 by
Boojin along with the usual driver fixes."
Fix up some fairly trivial conflicts with various other cleanups.
* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (67 commits)
dmaengine: imx: fix the build failure on x86_64
dmaengine: i.MX: Fix merge of cookie branch.
dmaengine: i.MX: Add support for interleaved transfers.
dmaengine: imx-dma: use 'dev_dbg' and 'dev_warn' for messages.
dmaengine: imx-dma: remove 'imx_dmav1_baseaddr' and 'dma_clk'.
dmaengine: imx-dma: remove unused arg of imxdma_sg_next.
dmaengine: imx-dma: remove internal structure.
dmaengine: imx-dma: remove 'resbytes' field of 'internal' structure.
dmaengine: imx-dma: remove 'in_use' field of 'internal' structure.
dmaengine: imx-dma: remove sg member from internal structure.
dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function.
dmaengine: imx-dma: remove 'imxdma_config_channel_hw' function.
dmaengine: imx-dma: remove 'imxdma_setup_mem2mem_hw' function.
dmaengine: imx-dma: remove dma_mode member of internal structure.
dmaengine: imx-dma: remove data member from internal structure.
dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c
dmaengine: at_hdmac: add slave config operation
dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic
dmaengine/dma_slave: introduce inline wrappers
dma: imx-sdma: Treat firmware messages as warnings instead of erros
...
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Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system
Pull "Disintegrate and delete asm/system.h" from David Howells:
"Here are a bunch of patches to disintegrate asm/system.h into a set of
separate bits to relieve the problem of circular inclusion
dependencies.
I've built all the working defconfigs from all the arches that I can
and made sure that they don't break.
The reason for these patches is that I recently encountered a circular
dependency problem that came about when I produced some patches to
optimise get_order() by rewriting it to use ilog2().
This uses bitops - and on the SH arch asm/bitops.h drags in
asm-generic/get_order.h by a circuituous route involving asm/system.h.
The main difficulty seems to be asm/system.h. It holds a number of
low level bits with no/few dependencies that are commonly used (eg.
memory barriers) and a number of bits with more dependencies that
aren't used in many places (eg. switch_to()).
These patches break asm/system.h up into the following core pieces:
(1) asm/barrier.h
Move memory barriers here. This already done for MIPS and Alpha.
(2) asm/switch_to.h
Move switch_to() and related stuff here.
(3) asm/exec.h
Move arch_align_stack() here. Other process execution related bits
could perhaps go here from asm/processor.h.
(4) asm/cmpxchg.h
Move xchg() and cmpxchg() here as they're full word atomic ops and
frequently used by atomic_xchg() and atomic_cmpxchg().
(5) asm/bug.h
Move die() and related bits.
(6) asm/auxvec.h
Move AT_VECTOR_SIZE_ARCH here.
Other arch headers are created as needed on a per-arch basis."
Fixed up some conflicts from other header file cleanups and moving code
around that has happened in the meantime, so David's testing is somewhat
weakened by that. We'll find out anything that got broken and fix it..
* tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits)
Delete all instances of asm/system.h
Remove all #inclusions of asm/system.h
Add #includes needed to permit the removal of asm/system.h
Move all declarations of free_initmem() to linux/mm.h
Disintegrate asm/system.h for OpenRISC
Split arch_align_stack() out from asm-generic/system.h
Split the switch_to() wrapper out of asm-generic/system.h
Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h
Create asm-generic/barrier.h
Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h
Disintegrate asm/system.h for Xtensa
Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt]
Disintegrate asm/system.h for Tile
Disintegrate asm/system.h for Sparc
Disintegrate asm/system.h for SH
Disintegrate asm/system.h for Score
Disintegrate asm/system.h for S390
Disintegrate asm/system.h for PowerPC
Disintegrate asm/system.h for PA-RISC
Disintegrate asm/system.h for MN10300
...
This branch contains a number of updates for device tree support on
several ARM platforms, in particular:
* AT91 continues the device tree conversion adding support for a number of
on-chip drivers and other functionality
* ux500 adds probing of some of the core SoC blocks through device tree
* Initial device tree support for ST SPEAr600 platforms
* kirkwood continues the conversion to device-tree probing
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Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: More device tree support updates" from Olof Johansson:
"This branch contains a number of updates for device tree support on
several ARM platforms, in particular:
* AT91 continues the device tree conversion adding support for a
number of on-chip drivers and other functionality
* ux500 adds probing of some of the core SoC blocks through device
tree
* Initial device tree support for ST SPEAr600 platforms
* kirkwood continues the conversion to device-tree probing"
Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and
drivers/usb/gadget/at91_udc.c due to header file include cleanups.
Also do an "evil merge" for the MACH_U8500 config option rename that the
affected RMI4 touchscreen driver in staging. It's called MACH_MOP500
now, and it was missed during previous merges.
* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
ARM: SPEAr600: Add device-tree support to SPEAr600 boards
ARM: ux500: Provide local timer support for Device Tree
ARM: ux500: Enable PL022 SSP Controller in Device Tree
ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree
ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
ARM: ux500: db8500: list most devices in the snowball device tree
ARM: ux500: split dts file for snowball into generic part
ARM: ux500: combine the board init functions for DT boot
ARM: ux500: Initial Device Tree support for Snowball
ARM: ux500: CONFIG: Enable Device Tree support for future endeavours
ARM: kirkwood: use devicetree for rtc-mv
ARM: kirkwood: rtc-mv devicetree bindings
ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0
ARM: kirkwood: fdt: facilitate new boards during fdt migration
ARM: kirkwood: fdt: absorb kirkwood_init()
ARM: kirkwood: fdt: use mrvl ticker symbol
ARM: orion: wdt: use resource vice direct access
ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.
ARM: orion: spi: remove enable_clock_fix which is not used
...
Remove all #inclusions of asm/system.h preparatory to splitting and killing
it. Performed with the following command:
perl -p -i -e 's!^#\s*include\s*<asm/system[.]h>.*\n!!' `grep -Irl '^#\s*include\s*<asm/system[.]h>' *`
Signed-off-by: David Howells <dhowells@redhat.com>
Quite a bit of code gets removed, and some stuff moved around, mostly
the old samsung s3c24xx stuff. There should be no functional changes
in this series otherwise. Some cleanups have dependencies on other
arm-soc branches and will be sent in the second round.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: global cleanups" from Arnd Bergmann:
"Quite a bit of code gets removed, and some stuff moved around, mostly
the old samsung s3c24xx stuff. There should be no functional changes
in this series otherwise. Some cleanups have dependencies on other
arm-soc branches and will be sent in the second round.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>"
Fixed up trivial conflicts mainly due to #include's being changes on
both sides.
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (121 commits)
ep93xx: Remove unnecessary includes of ep93xx-regs.h
ep93xx: Move EP93XX_SYSCON defines to SoC private header
ep93xx: Move crunch code to mach-ep93xx directory
ep93xx: Make syscon access functions private to SoC
ep93xx: Configure GPIO ports in core code
ep93xx: Move peripheral defines to local SoC header
ep93xx: Convert the watchdog driver into a platform device.
ep93xx: Use ioremap for backlight driver
ep93xx: Move GPIO defines to gpio-ep93xx.h
ep93xx: Don't use system controller defines in audio drivers
ep93xx: Move PHYS_BASE defines to local SoC header file
ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver
ARM: EXYNOS: add clock registers for exynos4x12-cpufreq
PM / devfreq: update the name of EXYNOS clock registers that were omitted
PM / devfreq: update the name of EXYNOS clock register
ARM: EXYNOS: change the prefix S5P_ to EXYNOS4_ for clock
ARM: EXYNOS: use static declaration on regarding clock
ARM: EXYNOS: replace clock.c for other new EXYNOS SoCs
ARM: OMAP2+: Fix build error after merge
ARM: S3C24XX: remove call to s3c24xx_setup_clocks
...
Mostly a bunch of new drivers and driver bug fixes; but this also
includes a few patches that create a core message queue infrastructure
for the spi subsystem instead of making each driver open code it.
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Merge tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull SPI changes for v3.4 from Grant Likely:
"Mostly a bunch of new drivers and driver bug fixes; but this also
includes a few patches that create a core message queue infrastructure
for the spi subsystem instead of making each driver open code it."
* tag 'spi-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
spi/fsl-espi: Make sure pm is within 2..32
spi/fsl-espi: make the clock computation easier to read
spi: sh-hspi: modify write/read method
spi: sh-hspi: control spi clock more correctly
spi: sh-hspi: convert to using core message queue
spi: s3c64xx: Fix build
spi: s3c64xx: remove unnecessary callback msg->complete
spi: remove redundant variable assignment
spi: release lock on error path in spi_pump_messages()
spi: Compatibility with direction which is used in samsung DMA operation
spi-topcliff-pch: add recovery processing in case wait-event timeout
spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
spi-topcliff-pch: Fix issue for transmitting over 4KByte
spi-topcliff-pch: Modify pci-bus number dynamically to get DMA device info
spi/imx: simplify error handling to free gpios
spi: Convert to DEFINE_PCI_DEVICE_TABLE
spi: add Broadcom BCM63xx SPI controller driver
SPI: add CSR SiRFprimaII SPI controller driver
spi-topcliff-pch: fix -Wuninitialized warning
spi: Mark spi_register_board_info() __devinit
...
Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to hide new parameter from current users of affected interfaces.
Convert current users to use new wrappers instead of direct calls.
Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269].
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
* 'kirkwood_dt_for_3.4_v3' of git://git.infradead.org/users/jcooper/linux-kirkwood:
ARM: kirkwood: use devicetree for rtc-mv
ARM: kirkwood: rtc-mv devicetree bindings
ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0
ARM: kirkwood: fdt: facilitate new boards during fdt migration
ARM: kirkwood: fdt: absorb kirkwood_init()
ARM: kirkwood: fdt: use mrvl ticker symbol
ARM: orion: wdt: use resource vice direct access
ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.
ARM: orion: spi: remove enable_clock_fix which is not used
The reference manual says that pm has to stay within 2 and 32. So the
lowest frequency is 32 and DIV16 set, the highest is 2 and DIV16 unset.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The -1 +1 thingy should probably do what DIV_ROUND_UP does. The 4 is 2
the "platform_clock => sysclock" and 2 from the computation part. The 64
is the same 4 times 16.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'ep93xx-for-arm-soc' of git://github.com/RyanMallon/linux-2.6:
ep93xx: Remove unnecessary includes of ep93xx-regs.h
ep93xx: Move EP93XX_SYSCON defines to SoC private header
ep93xx: Move crunch code to mach-ep93xx directory
ep93xx: Make syscon access functions private to SoC
ep93xx: Configure GPIO ports in core code
ep93xx: Move peripheral defines to local SoC header
ep93xx: Convert the watchdog driver into a platform device.
ep93xx: Use ioremap for backlight driver
ep93xx: Move GPIO defines to gpio-ep93xx.h
ep93xx: Don't use system controller defines in audio drivers
ep93xx: Move PHYS_BASE defines to local SoC header file
(update to v3.3-rc7)
Conflicts:
arch/arm/mach-s3c2440/common.h
Current sh-hspi had wrong write/read method which was not linux standard.
If spi_transfer requests tx[2], rx[2] len=2,
then, driver should run tx[0], rx[0], tx[1], rx[1].
But current sh-hspi runs tx[0], tx[1], rx[0], rx[1].
This patch fixes it up.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Current sh-hspi had used platform-specific speed.
This patch remove it, and use spi_transfer specific speed.
It removes unnecessary flags from struct sh_hspi_info,
but struct sh_hspi_info is still exist, since sh-hspi needs
platform info in the future.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Commit 054ebc (spi: Compatibility with direction which is used in samsung
DMA operation) does not build as one hunk adds a brace to the first branch
of an if statement without adding at least the correspoding close. Remove
the unwanted brace.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
msg->complete will be called in spi_finalize_current_message().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
