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https://github.com/followmsi/android_kernel_google_msm.git
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5ea52c07d7
Refactor AVS API to a cleaner C implementation. The new implementation uses C assembly functions and provides a cleaner way for future targets to add new AVS functionality. Also fixed a possible issue with the earlier AVS_ENABLE and AVS_DISABLE implementations. The earlier implementation did a get_cpu() and compared it against the cpu for which AVS was to to be disabled, if the cpu's did not match then it did not return an error and avs could have been left enabled during the voltage change. In this new implementation, enable and disable use smp_call_function_single() to ensure that the enable and disable indeed happen on the core requested. If acpuclock_set_rate() was called on the right core correctly during cpufreq frequency change, there would have been no issue, but newer implementation of mach-msm/cpufreq.c does not gaurantee that. Change-Id: I94db3fc70341ceb79d747d54c7f525056b377755 Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org> (cherry picked from commit 5e6141182f2a3638aaa04ed399643c013e414a65)
96 lines
1.9 KiB
C
96 lines
1.9 KiB
C
/*
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* Copyright (c) 2012, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <asm/mach-types.h>
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#include <asm/cputype.h>
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#include "avs.h"
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u32 avs_get_avscsr(void)
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{
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u32 val = 0;
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asm volatile ("mrc p15, 7, %[avscsr], c15, c1, 7\n\t"
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: [avscsr]"=r" (val)
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);
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return val;
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}
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EXPORT_SYMBOL(avs_get_avscsr);
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void avs_set_avscsr(u32 avscsr)
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{
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asm volatile ("mcr p15, 7, %[avscsr], c15, c1, 7\n\t"
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"isb\n\t"
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:
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: [avscsr]"r" (avscsr)
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);
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}
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EXPORT_SYMBOL(avs_set_avscsr);
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u32 avs_get_avsdscr(void)
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{
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u32 val = 0;
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asm volatile ("mrc p15, 7, %[avsdscr], c15, c0, 6\n\t"
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: [avsdscr]"=r" (val)
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);
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return val;
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}
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EXPORT_SYMBOL(avs_get_avsdscr);
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void avs_set_avsdscr(u32 avsdscr)
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{
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asm volatile("mcr p15, 7, %[avsdscr], c15, c0, 6\n\t"
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"isb\n\t"
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:
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: [avsdscr]"r" (avsdscr)
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);
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}
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EXPORT_SYMBOL(avs_set_avsdscr);
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static void avs_enable_local(void *data)
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{
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u32 avsdscr = (u32) data;
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u32 avscsr_enable = 0x61;
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avs_set_avsdscr(avsdscr);
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avs_set_avscsr(avscsr_enable);
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}
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static void avs_disable_local(void *data)
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{
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avs_set_avscsr(0);
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}
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void avs_enable(int cpu, u32 avsdscr)
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{
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int ret;
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ret = smp_call_function_single(cpu, avs_enable_local,
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(void *)avsdscr, true);
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WARN_ON(ret);
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}
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EXPORT_SYMBOL(avs_enable);
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void avs_disable(int cpu)
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{
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int ret;
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ret = smp_call_function_single(cpu, avs_disable_local,
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(void *) 0, true);
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WARN_ON(ret);
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}
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EXPORT_SYMBOL(avs_disable);
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