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91777f102b
commit2cfda637e2upstream. Matthew found that 3.8.3 is having problems with an old (ancient) PCI-to-EISA bridge, the Intel 82375. It worked with the 3.2 kernel. He identified the 82375, but doesn't assign the struct resource *res pointer inside the struct eisa_root_device, and panics. pci_eisa_init() was using bus->resource[] directly instead of pci_bus_resource_n(). The bus->resource[] array is a PCI-internal implementation detail, and after commit45ca9e97(PCI: add helpers for building PCI bus resource lists) and commit0efd5aab(PCI: add struct pci_host_bridge_window with CPU/bus address offset), bus->resource[] is not used for PCI root buses any more. The 82375 is a subtractive-decode PCI device, so handle it the same way we handle PCI-PCI bridges in subtractive-decode mode in pci_read_bridge_bases(). [bhelgaas: changelog] Reported-by: Matthew Whitehead <mwhitehe@redhat.com> Tested-by: Matthew Whitehead <mwhitehe@redhat.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
91 lines
2.4 KiB
C
91 lines
2.4 KiB
C
/*
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* Minimalist driver for a generic PCI-to-EISA bridge.
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*
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* (C) 2003 Marc Zyngier <maz@wild-wind.fr.eu.org>
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*
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* This code is released under the GPL version 2.
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*
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* Ivan Kokshaysky <ink@jurassic.park.msu.ru> :
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* Generalisation from i82375 to PCI_CLASS_BRIDGE_EISA.
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/eisa.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <linux/init.h>
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/* There is only *one* pci_eisa device per machine, right ? */
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static struct eisa_root_device pci_eisa_root;
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static int __init pci_eisa_init(struct pci_dev *pdev)
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{
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int rc, i;
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struct resource *res, *bus_res = NULL;
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if ((rc = pci_enable_device (pdev))) {
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printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
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pci_name(pdev));
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return rc;
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}
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/*
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* The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
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* device, so the resources available on EISA are the same as those
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* available on the 82375 bus. This works the same as a PCI-PCI
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* bridge in subtractive-decode mode (see pci_read_bridge_bases()).
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* We assume other PCI-EISA bridges are similar.
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*
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* eisa_root_register() can only deal with a single io port resource,
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* so we use the first valid io port resource.
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*/
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pci_bus_for_each_resource(pdev->bus, res, i)
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if (res && (res->flags & IORESOURCE_IO)) {
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bus_res = res;
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break;
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}
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if (!bus_res) {
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dev_err(&pdev->dev, "No resources available\n");
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return -1;
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}
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pci_eisa_root.dev = &pdev->dev;
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pci_eisa_root.res = bus_res;
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pci_eisa_root.bus_base_addr = bus_res->start;
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pci_eisa_root.slots = EISA_MAX_SLOTS;
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pci_eisa_root.dma_mask = pdev->dma_mask;
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dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
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if (eisa_root_register (&pci_eisa_root)) {
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printk (KERN_ERR "pci_eisa : Could not register EISA root\n");
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return -1;
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}
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return 0;
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}
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/*
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* We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
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* Otherwise pnp resource will get enabled early and could prevent eisa
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* to be initialized.
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* Also need to make sure pci_eisa_init_early() is called after
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* x86/pci_subsys_init().
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* So need to use subsys_initcall_sync with it.
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*/
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static int __init pci_eisa_init_early(void)
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{
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struct pci_dev *dev = NULL;
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int ret;
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for_each_pci_dev(dev)
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
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ret = pci_eisa_init(dev);
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if (ret)
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return ret;
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}
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return 0;
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}
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subsys_initcall_sync(pci_eisa_init_early);
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