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https://github.com/followmsi/android_kernel_google_msm.git
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04e554807c
Change-Id: Ibead64ce2e901dede2ddd1b86088b88f2350ce92 Signed-off-by: Duy Truong <dtruong@codeaurora.org>
90 lines
3.4 KiB
C
90 lines
3.4 KiB
C
/* Copyright (c) 2012 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_IOMMU_PAGETABLE_H
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#define __ARCH_ARM_MACH_MSM_IOMMU_PAGETABLE_H
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#define NUM_FL_PTE 4096
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#define NUM_SL_PTE 256
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#define NUM_TEX_CLASS 8
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/* First-level page table bits */
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#define FL_BASE_MASK 0xFFFFFC00
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#define FL_TYPE_TABLE (1 << 0)
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#define FL_TYPE_SECT (2 << 0)
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#define FL_SUPERSECTION (1 << 18)
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#define FL_AP0 (1 << 10)
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#define FL_AP1 (1 << 11)
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#define FL_AP2 (1 << 15)
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#define FL_SHARED (1 << 16)
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#define FL_BUFFERABLE (1 << 2)
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#define FL_CACHEABLE (1 << 3)
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#define FL_TEX0 (1 << 12)
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#define FL_OFFSET(va) (((va) & 0xFFF00000) >> 20)
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#define FL_NG (1 << 17)
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/* Second-level page table bits */
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#define SL_BASE_MASK_LARGE 0xFFFF0000
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#define SL_BASE_MASK_SMALL 0xFFFFF000
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#define SL_TYPE_LARGE (1 << 0)
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#define SL_TYPE_SMALL (2 << 0)
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#define SL_AP0 (1 << 4)
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#define SL_AP1 (2 << 4)
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#define SL_AP2 (1 << 9)
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#define SL_SHARED (1 << 10)
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#define SL_BUFFERABLE (1 << 2)
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#define SL_CACHEABLE (1 << 3)
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#define SL_TEX0 (1 << 6)
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#define SL_OFFSET(va) (((va) & 0xFF000) >> 12)
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#define SL_NG (1 << 11)
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/* Memory type and cache policy attributes */
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#define MT_SO 0
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#define MT_DEV 1
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#define MT_NORMAL 2
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#define CP_NONCACHED 0
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#define CP_WB_WA 1
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#define CP_WT 2
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#define CP_WB_NWA 3
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/* TEX Remap Registers */
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#define NMRR_ICP(nmrr, n) (((nmrr) & (3 << ((n) * 2))) >> ((n) * 2))
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#define NMRR_OCP(nmrr, n) (((nmrr) & (3 << ((n) * 2 + 16))) >> ((n) * 2 + 16))
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#define PRRR_NOS(prrr, n) ((prrr) & (1 << ((n) + 24)) ? 1 : 0)
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#define PRRR_MT(prrr, n) ((((prrr) & (3 << ((n) * 2))) >> ((n) * 2)))
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#define MRC(reg, processor, op1, crn, crm, op2) \
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__asm__ __volatile__ ( \
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" mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \
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: "=r" (reg))
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#define RCP15_PRRR(reg) MRC(reg, p15, 0, c10, c2, 0)
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#define RCP15_NMRR(reg) MRC(reg, p15, 0, c10, c2, 1)
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struct iommu_pt {
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unsigned long *fl_table;
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int redirect;
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};
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void msm_iommu_pagetable_init(void);
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int msm_iommu_pagetable_alloc(struct iommu_pt *pt);
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void msm_iommu_pagetable_free(struct iommu_pt *pt);
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int msm_iommu_pagetable_map(struct iommu_pt *pt, unsigned long va,
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phys_addr_t pa, size_t len, int prot);
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size_t msm_iommu_pagetable_unmap(struct iommu_pt *pt, unsigned long va,
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size_t len);
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int msm_iommu_pagetable_map_range(struct iommu_pt *pt, unsigned int va,
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struct scatterlist *sg, unsigned int len, int prot);
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void msm_iommu_pagetable_unmap_range(struct iommu_pt *pt, unsigned int va,
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unsigned int len);
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#endif
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