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6b35f924b8
On a mx28evk board the following errors happens on mxs-sgtl5000 probe: [ 0.660000] saif0_clk_set_rate: divider writing timeout [ 0.670000] mxs-sgtl5000: probe of mxs-sgtl5000.0 failed with error -110 [ 0.670000] ALSA device list: [ 0.680000] No soundcards found. This timeout happens because clk_set_rate will result in writing to the DIV bits of register HW_CLKCTRL_SAIF0 with the saif clock gated (CLKGATE bit set to one). MX28 Reference states the following about CLKGATE: "The DIV field can change ONLY when this clock gate bit field is low." So call clk_prepare_enable prior to clk_set_rate to fix this problem. After this change the mxs-saif driver can be correctly probed and audio is functional. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> |
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atmel | ||
au1x | ||
blackfin | ||
codecs | ||
davinci | ||
ep93xx | ||
fsl | ||
imx | ||
jz4740 | ||
kirkwood | ||
mid-x86 | ||
mxs | ||
nuc900 | ||
omap | ||
pxa | ||
s6000 | ||
samsung | ||
sh | ||
tegra | ||
txx9 | ||
Kconfig | ||
Makefile | ||
soc-cache.c | ||
soc-core.c | ||
soc-dapm.c | ||
soc-io.c | ||
soc-jack.c | ||
soc-pcm.c | ||
soc-utils.c |