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f08399a804
For 8625 2.0 PLL4 is capable to run at 1.4GHz. Add acpuclock table for the same and also add support to dynamically re-program the PLL4 assuming 801.6MHz jump is fine from H/W perspective. Change-Id: I3712907d4aa3f4c085f874652797e9e7d4203598 Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
/*
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* MSM architecture CPU clock driver header
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007-2012, Code Aurora Forum. All rights reserved.
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* Author: San Mehat <san@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_MSM_ACPUCLOCK_H
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#define __ARCH_ARM_MACH_MSM_ACPUCLOCK_H
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/**
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* enum setrate_reason - Reasons for use with acpuclk_set_rate()
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*/
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enum setrate_reason {
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SETRATE_CPUFREQ = 0,
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SETRATE_SWFI,
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SETRATE_PC,
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SETRATE_HOTPLUG,
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SETRATE_INIT,
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};
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/**
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* struct acpuclk_pdata - Platform data for acpuclk
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*/
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struct acpuclk_pdata {
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unsigned long max_speed_delta_khz;
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unsigned int max_axi_khz;
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};
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/**
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* struct acpuclk_data - Function pointers and data for function implementations
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*/
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struct acpuclk_data {
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unsigned long (*get_rate)(int cpu);
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int (*set_rate)(int cpu, unsigned long rate, enum setrate_reason);
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uint32_t switch_time_us;
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unsigned long power_collapse_khz;
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unsigned long wait_for_irq_khz;
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};
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/**
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* acpulock_get_rate() - Get a CPU's clock rate in KHz
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* @cpu: CPU to query the rate of
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*/
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unsigned long acpuclk_get_rate(int cpu);
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/**
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* acpuclk_set_rate() - Set a CPU's clock rate
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* @cpu: CPU to set rate of
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* @rate: Desired rate in KHz
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* @setrate_reason: Reason for the rate switch
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*
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* Returns 0 for success.
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*/
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int acpuclk_set_rate(int cpu, unsigned long rate, enum setrate_reason);
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/**
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* acpuclk_get_switch_time() - Query estimated time in us for a CPU rate switch
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*/
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uint32_t acpuclk_get_switch_time(void);
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/**
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* acpuclk_power_collapse() - Prepare current CPU clocks for power-collapse
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*
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* Returns the previous rate of the CPU in KHz.
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*/
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unsigned long acpuclk_power_collapse(void);
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/**
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* acpuclk_wait_for_irq() - Prepare current CPU clocks for SWFI
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*
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* Returns the previous rate of the CPU in KHz.
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*/
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unsigned long acpuclk_wait_for_irq(void);
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/**
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* acpuclk_register() - Register acpuclk_data function implementations
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* @data: acpuclock API implementations and data
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*/
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void acpuclk_register(struct acpuclk_data *data);
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#endif /*__ARCH_ARM_MACH_MSM_ACPUCLOCK_H*/
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