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7c8254362f
Add warmboot entry/exit counters for each core on a non-cacheable always on IMEM memory. This is a useful feature during debug to understand if the system has correctly warmbooted after a power collapse. The debug counters start at a memory offset of 0x664 on the IMEM. Each core reserves 4 words for events, of which 3 are being used to monitor the following events, 1) power collapse entry 2) warmboot exit 3) failed power collapse when wfi returns with a pending interrupt. Change-Id: I45aac8e4a4d3421d586790b3b66fd71a8d88ea9d Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
143 lines
4.7 KiB
C
143 lines
4.7 KiB
C
/* arch/arm/mach-msm/pm.h
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
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* Author: San Mehat <san@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ARCH_ARM_MACH_MSM_PM_H
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#define __ARCH_ARM_MACH_MSM_PM_H
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#include <linux/types.h>
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#include <linux/cpuidle.h>
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#ifdef CONFIG_SMP
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extern void msm_secondary_startup(void);
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#else
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#define msm_secondary_startup NULL
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#endif
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extern int power_collapsed;
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struct msm_pm_irq_calls {
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unsigned int (*irq_pending)(void);
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int (*idle_sleep_allowed)(void);
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void (*enter_sleep1)(bool modem_wake, int from_idle, uint32_t
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*irq_mask);
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int (*enter_sleep2)(bool modem_wake, int from_idle);
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void (*exit_sleep1)(uint32_t irq_mask, uint32_t wakeup_reason,
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uint32_t pending_irqs);
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void (*exit_sleep2)(uint32_t irq_mask, uint32_t wakeup_reason,
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uint32_t pending_irqs);
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void (*exit_sleep3)(uint32_t irq_mask, uint32_t wakeup_reason,
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uint32_t pending_irqs);
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};
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enum msm_pm_sleep_mode {
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MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT = 0,
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MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT = 1,
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MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE = 2,
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MSM_PM_SLEEP_MODE_POWER_COLLAPSE = 3,
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MSM_PM_SLEEP_MODE_APPS_SLEEP = 4,
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MSM_PM_SLEEP_MODE_RETENTION = MSM_PM_SLEEP_MODE_APPS_SLEEP,
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MSM_PM_SLEEP_MODE_POWER_COLLAPSE_SUSPEND = 5,
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MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN = 6,
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MSM_PM_SLEEP_MODE_NR
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};
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#define MSM_PM_MODE(cpu, mode_nr) ((cpu) * MSM_PM_SLEEP_MODE_NR + (mode_nr))
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struct msm_pm_time_params {
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uint32_t latency_us;
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uint32_t sleep_us;
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uint32_t next_event_us;
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uint32_t modified_time_us;
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};
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struct msm_pm_platform_data {
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u8 idle_supported; /* Allow device to enter mode during idle */
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u8 suspend_supported; /* Allow device to enter mode during suspend */
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u8 suspend_enabled; /* enabled for suspend */
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u8 idle_enabled; /* enabled for idle low power */
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u32 latency; /* interrupt latency in microseconds when entering
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and exiting the low power mode */
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u32 residency; /* time threshold in microseconds beyond which
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staying in the low power mode saves power */
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};
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extern struct msm_pm_platform_data msm_pm_sleep_modes[];
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struct msm_pm_sleep_ops {
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void *(*lowest_limits)(bool from_idle,
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enum msm_pm_sleep_mode sleep_mode,
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struct msm_pm_time_params *time_param, uint32_t *power);
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int (*enter_sleep)(uint32_t sclk_count, void *limits,
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bool from_idle, bool notify_rpm);
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void (*exit_sleep)(void *limits, bool from_idle,
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bool notify_rpm, bool collapsed);
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};
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struct msm_pm_cpr_ops {
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void (*cpr_suspend)(void);
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void (*cpr_resume)(void);
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};
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void msm_pm_set_platform_data(struct msm_pm_platform_data *data, int count);
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int msm_pm_idle_prepare(struct cpuidle_device *dev,
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struct cpuidle_driver *drv, int index);
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void msm_pm_set_irq_extns(struct msm_pm_irq_calls *irq_calls);
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int msm_pm_idle_enter(enum msm_pm_sleep_mode sleep_mode);
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void msm_pm_cpu_enter_lowpower(unsigned int cpu);
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void __init msm_pm_set_tz_retention_flag(unsigned int flag);
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#ifdef CONFIG_MSM_PM8X60
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void msm_pm_set_rpm_wakeup_irq(unsigned int irq);
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void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops);
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#else
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static inline void msm_pm_set_rpm_wakeup_irq(unsigned int irq) {}
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static inline void msm_pm_set_sleep_ops(struct msm_pm_sleep_ops *ops) {}
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#endif
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#ifdef CONFIG_HOTPLUG_CPU
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int msm_platform_secondary_init(unsigned int cpu);
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#else
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static inline int msm_platform_secondary_init(unsigned int cpu) { return 0; }
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#endif
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enum msm_pm_time_stats_id {
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MSM_PM_STAT_REQUESTED_IDLE = 0,
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MSM_PM_STAT_IDLE_SPIN,
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MSM_PM_STAT_IDLE_WFI,
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MSM_PM_STAT_RETENTION,
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MSM_PM_STAT_IDLE_STANDALONE_POWER_COLLAPSE,
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MSM_PM_STAT_IDLE_FAILED_STANDALONE_POWER_COLLAPSE,
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MSM_PM_STAT_IDLE_POWER_COLLAPSE,
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MSM_PM_STAT_IDLE_FAILED_POWER_COLLAPSE,
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MSM_PM_STAT_SUSPEND,
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MSM_PM_STAT_FAILED_SUSPEND,
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MSM_PM_STAT_NOT_IDLE,
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MSM_PM_STAT_COUNT
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};
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#ifdef CONFIG_MSM_IDLE_STATS
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void msm_pm_add_stats(enum msm_pm_time_stats_id *enable_stats, int size);
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void msm_pm_add_stat(enum msm_pm_time_stats_id id, int64_t t);
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#else
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static inline void msm_pm_add_stats(enum msm_pm_time_stats_id *enable_stats,
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int size) {}
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static inline void msm_pm_add_stat(enum msm_pm_time_stats_id id, int64_t t) {}
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#endif
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void msm_pm_set_cpr_ops(struct msm_pm_cpr_ops *ops);
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extern void *msm_pc_debug_counters;
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extern unsigned long msm_pc_debug_counters_phys;
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#endif /* __ARCH_ARM_MACH_MSM_PM_H */
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