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6dbd07cf20
Switching from a MAX to a MIN power constraint in the same context is broken. So is switching from a MAX context constraint to a MIN constraint on a different context. Clarify constraint ownership, update the timestamps accordingly, and reset constraints when changed by the context. Change-Id: Id27dbc20e2aac994101817af3857451c1703219e Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
154 lines
5.3 KiB
C
154 lines
5.3 KiB
C
/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __KGSL_PWRCTRL_H
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#define __KGSL_PWRCTRL_H
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/*****************************************************************************
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** power flags
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*****************************************************************************/
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#define KGSL_PWRFLAGS_ON 1
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#define KGSL_PWRFLAGS_OFF 0
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#define KGSL_PWRLEVEL_TURBO 0
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#define KGSL_PWRLEVEL_NOMINAL 1
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#define KGSL_PWRLEVEL_LAST_OFFSET 2
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#define KGSL_PWR_ON 0xFFFF
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#define KGSL_MAX_CLKS 6
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/* Only two supported levels, min & max */
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#define KGSL_CONSTRAINT_PWR_MAXLEVELS 2
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/* Symbolic table for the constraint type */
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#define KGSL_CONSTRAINT_TYPES \
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{ KGSL_CONSTRAINT_NONE, "None" }, \
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{ KGSL_CONSTRAINT_PWRLEVEL, "Pwrlevel" }
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/* Symbolic table for the constraint sub type */
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#define KGSL_CONSTRAINT_PWRLEVEL_SUBTYPES \
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{ KGSL_CONSTRAINT_PWR_MIN, "Min" }, \
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{ KGSL_CONSTRAINT_PWR_MAX, "Max" }
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struct platform_device;
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struct kgsl_clk_stats {
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unsigned int old_clock_time[KGSL_MAX_PWRLEVELS];
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unsigned int clock_time[KGSL_MAX_PWRLEVELS];
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unsigned int on_time_old;
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ktime_t start;
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ktime_t stop;
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unsigned int no_nap_cnt;
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unsigned int elapsed;
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unsigned int elapsed_old;
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};
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struct kgsl_pwr_constraint {
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unsigned int type;
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unsigned int sub_type;
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union {
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struct {
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unsigned int level;
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} pwrlevel;
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} hint;
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unsigned long expires;
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uint32_t owner_id;
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};
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/**
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* struct kgsl_pwrctrl - Power control settings for a KGSL device
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* @interrupt_num - The interrupt number for the device
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* @ebi1_clk - Pointer to the EBI clock structure
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* @grp_clks - Array of clocks structures that we control
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* @power_flags - Control flags for power
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* @pwrlevels - List of supported power levels
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* @active_pwrlevel - The currently active power level
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* @thermal_pwrlevel - maximum powerlevel constraint from thermal
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* @default_pwrlevel - device wake up power level
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* @init_pwrlevel - device inital power level
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* @max_pwrlevel - maximum allowable powerlevel per the user
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* @min_pwrlevel - minimum allowable powerlevel per the user
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* @num_pwrlevels - number of available power levels
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* @interval_timeout - timeout in jiffies to be idle before a power event
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* @strtstp_sleepwake - true if the device supports low latency GPU start/stop
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* @gpu_reg - pointer to the regulator structure for gpu_reg
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* @gpu_cx - pointer to the regulator structure for gpu_cx
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* @pcl - bus scale identifier
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* @idle_needed - true if the device needs a idle before clock change
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* @irq_name - resource name for the IRQ
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* @clk_stats - structure of clock statistics
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* @pm_qos_req_dma - the power management quality of service structure
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* @pm_qos_latency - allowed CPU latency in microseconds
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* @step_mul - multiplier for moving between power levels
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* @constraint - currently active power constraint
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*/
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struct kgsl_pwrctrl {
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int interrupt_num;
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struct clk *ebi1_clk;
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struct clk *grp_clks[KGSL_MAX_CLKS];
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unsigned long power_flags;
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unsigned long ctrl_flags;
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struct kgsl_pwrlevel pwrlevels[KGSL_MAX_PWRLEVELS];
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unsigned int active_pwrlevel;
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int thermal_pwrlevel;
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unsigned int default_pwrlevel;
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unsigned int init_pwrlevel;
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unsigned int max_pwrlevel;
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unsigned int min_pwrlevel;
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unsigned int num_pwrlevels;
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unsigned int interval_timeout;
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bool strtstp_sleepwake;
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struct regulator *gpu_reg;
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struct regulator *gpu_cx;
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uint32_t pcl;
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unsigned int idle_needed;
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const char *irq_name;
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s64 time;
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struct kgsl_clk_stats clk_stats;
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struct pm_qos_request pm_qos_req_dma;
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unsigned int pm_qos_latency;
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unsigned int step_mul;
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unsigned int irq_last;
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struct kgsl_pwr_constraint constraint;
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};
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void kgsl_pwrctrl_irq(struct kgsl_device *device, int state);
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int kgsl_pwrctrl_init(struct kgsl_device *device);
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void kgsl_pwrctrl_close(struct kgsl_device *device);
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void kgsl_timer(unsigned long data);
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void kgsl_idle_check(struct work_struct *work);
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void kgsl_pre_hwaccess(struct kgsl_device *device);
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int kgsl_pwrctrl_sleep(struct kgsl_device *device);
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int kgsl_pwrctrl_wake(struct kgsl_device *device);
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void kgsl_pwrctrl_pwrlevel_change(struct kgsl_device *device,
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unsigned int level);
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int kgsl_pwrctrl_init_sysfs(struct kgsl_device *device);
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void kgsl_pwrctrl_uninit_sysfs(struct kgsl_device *device);
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void kgsl_pwrctrl_enable(struct kgsl_device *device);
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void kgsl_pwrctrl_disable(struct kgsl_device *device);
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bool kgsl_pwrctrl_isenabled(struct kgsl_device *device);
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static inline unsigned long kgsl_get_clkrate(struct clk *clk)
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{
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return (clk != NULL) ? clk_get_rate(clk) : 0;
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}
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void kgsl_pwrctrl_set_state(struct kgsl_device *device, unsigned int state);
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void kgsl_pwrctrl_request_state(struct kgsl_device *device, unsigned int state);
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int __must_check kgsl_active_count_get(struct kgsl_device *device);
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int __must_check kgsl_active_count_get_light(struct kgsl_device *device);
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void kgsl_active_count_put(struct kgsl_device *device);
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int kgsl_active_count_wait(struct kgsl_device *device, int count);
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#endif /* __KGSL_PWRCTRL_H */
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