mirror of
https://github.com/followmsi/android_kernel_google_msm.git
synced 2024-11-06 23:17:41 +00:00
04e554807c
Change-Id: Ibead64ce2e901dede2ddd1b86088b88f2350ce92 Signed-off-by: Duy Truong <dtruong@codeaurora.org>
178 lines
4 KiB
C
178 lines
4 KiB
C
/* Copyright (c) 2008-2012, The Linux Foundation. All rights reserved.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 and
|
|
* only version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
*/
|
|
|
|
#ifndef MDSS_PANEL_H
|
|
#define MDSS_PANEL_H
|
|
|
|
#include <linux/platform_device.h>
|
|
#include <linux/types.h>
|
|
|
|
/* panel id type */
|
|
struct panel_id {
|
|
u16 id;
|
|
u16 type;
|
|
};
|
|
|
|
/* panel type list */
|
|
#define NO_PANEL 0xffff /* No Panel */
|
|
#define MDDI_PANEL 1 /* MDDI */
|
|
#define EBI2_PANEL 2 /* EBI2 */
|
|
#define LCDC_PANEL 3 /* internal LCDC type */
|
|
#define EXT_MDDI_PANEL 4 /* Ext.MDDI */
|
|
#define TV_PANEL 5 /* TV */
|
|
#define HDMI_PANEL 6 /* HDMI TV */
|
|
#define DTV_PANEL 7 /* DTV */
|
|
#define MIPI_VIDEO_PANEL 8 /* MIPI */
|
|
#define MIPI_CMD_PANEL 9 /* MIPI */
|
|
#define WRITEBACK_PANEL 10 /* Wifi display */
|
|
#define LVDS_PANEL 11 /* LVDS */
|
|
#define EDP_PANEL 12 /* LVDS */
|
|
|
|
/* panel class */
|
|
enum {
|
|
DISPLAY_LCD = 0, /* lcd = ebi2/mddi */
|
|
DISPLAY_LCDC, /* lcdc */
|
|
DISPLAY_TV, /* TV Out */
|
|
DISPLAY_EXT_MDDI, /* External MDDI */
|
|
DISPLAY_WRITEBACK,
|
|
};
|
|
|
|
/* panel device locaiton */
|
|
enum {
|
|
DISPLAY_1 = 0, /* attached as first device */
|
|
DISPLAY_2, /* attached on second device */
|
|
DISPLAY_3, /* attached on third writeback device */
|
|
MAX_PHYS_TARGET_NUM,
|
|
};
|
|
|
|
/* panel info type */
|
|
struct lcd_panel_info {
|
|
u32 vsync_enable;
|
|
u32 refx100;
|
|
u32 v_back_porch;
|
|
u32 v_front_porch;
|
|
u32 v_pulse_width;
|
|
u32 hw_vsync_mode;
|
|
u32 vsync_notifier_period;
|
|
u32 rev;
|
|
};
|
|
|
|
struct lcdc_panel_info {
|
|
u32 h_back_porch;
|
|
u32 h_front_porch;
|
|
u32 h_pulse_width;
|
|
u32 v_back_porch;
|
|
u32 v_front_porch;
|
|
u32 v_pulse_width;
|
|
u32 border_clr;
|
|
u32 underflow_clr;
|
|
u32 hsync_skew;
|
|
/* Pad width */
|
|
u32 xres_pad;
|
|
/* Pad height */
|
|
u32 yres_pad;
|
|
};
|
|
|
|
struct mipi_panel_info {
|
|
char mode; /* video/cmd */
|
|
char interleave_mode;
|
|
char crc_check;
|
|
char ecc_check;
|
|
char dst_format; /* shared by video and command */
|
|
char data_lane0;
|
|
char data_lane1;
|
|
char data_lane2;
|
|
char data_lane3;
|
|
char dlane_swap; /* data lane swap */
|
|
char rgb_swap;
|
|
char b_sel;
|
|
char g_sel;
|
|
char r_sel;
|
|
char rx_eot_ignore;
|
|
char tx_eot_append;
|
|
char t_clk_post; /* 0xc0, DSI_CLKOUT_TIMING_CTRL */
|
|
char t_clk_pre; /* 0xc0, DSI_CLKOUT_TIMING_CTRL */
|
|
char vc; /* virtual channel */
|
|
struct mipi_dsi_phy_ctrl *dsi_phy_db;
|
|
/* video mode */
|
|
char pulse_mode_hsa_he;
|
|
char hfp_power_stop;
|
|
char hbp_power_stop;
|
|
char hsa_power_stop;
|
|
char eof_bllp_power_stop;
|
|
char bllp_power_stop;
|
|
char traffic_mode;
|
|
char frame_rate;
|
|
/* command mode */
|
|
char interleave_max;
|
|
char insert_dcs_cmd;
|
|
char wr_mem_continue;
|
|
char wr_mem_start;
|
|
char te_sel;
|
|
char stream; /* 0 or 1 */
|
|
char mdp_trigger;
|
|
char dma_trigger;
|
|
u32 dsi_pclk_rate;
|
|
/* The packet-size should not bet changed */
|
|
char no_max_pkt_size;
|
|
/* Clock required during LP commands */
|
|
char force_clk_lane_hs;
|
|
};
|
|
|
|
enum lvds_mode {
|
|
LVDS_SINGLE_CHANNEL_MODE,
|
|
LVDS_DUAL_CHANNEL_MODE,
|
|
};
|
|
|
|
struct lvds_panel_info {
|
|
enum lvds_mode channel_mode;
|
|
/* Channel swap in dual mode */
|
|
char channel_swap;
|
|
};
|
|
|
|
struct mdss_panel_info {
|
|
u32 xres;
|
|
u32 yres;
|
|
u32 bpp;
|
|
u32 type;
|
|
u32 wait_cycle;
|
|
u32 pdest;
|
|
u32 bl_max;
|
|
u32 bl_min;
|
|
u32 fb_num;
|
|
u32 clk_rate;
|
|
u32 clk_min;
|
|
u32 clk_max;
|
|
u32 frame_count;
|
|
u32 is_3d_panel;
|
|
u32 out_format;
|
|
|
|
struct lcd_panel_info lcd;
|
|
struct lcdc_panel_info lcdc;
|
|
struct mipi_panel_info mipi;
|
|
struct lvds_panel_info lvds;
|
|
struct fb_info *fbi;
|
|
};
|
|
|
|
struct mdss_panel_data {
|
|
struct mdss_panel_info panel_info;
|
|
void (*set_backlight) (u32 bl_level);
|
|
unsigned char *dsi_base;
|
|
|
|
/* function entry chain */
|
|
int (*on) (struct mdss_panel_data *pdata);
|
|
int (*off) (struct mdss_panel_data *pdata);
|
|
};
|
|
|
|
int mdss_register_panel(struct mdss_panel_data *pdata);
|
|
#endif /* MDSS_PANEL_H */
|