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c5036e4eb2
Add runtime control for enabling/disabling program counter save feature. Enabling program counter save feature will enable pc to be saved on reset but implies ETM being left powered on. So we provide user runtime control to enable the feature when debugging or disable it while taking power measurements. Change-Id: Ib007da851ee7f3b0fac195da62aac7def68cc67a Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
135 lines
4.6 KiB
Text
135 lines
4.6 KiB
Text
menuconfig CORESIGHT
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bool "CoreSight Tracing Support"
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help
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CoreSight components are compliant with the ARM CoreSight
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architecture specification and can be connected in various
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topologies to suite a particular SoCs tracing needs. These trace
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components can generally be classified as sources, links and
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sinks. Trace data produced by one or more sources flows through
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the intermediate links connecting the source to the currently
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selected sink.
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This framework provides an interface for the CoreSight debug and
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trace drivers to register themselves with. It's intended to build
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up a topological view of the CoreSight components and configure
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the right series of components on user input via sysfs. It also
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provides status information to user space applications through
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sysfs interface.
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If unsure, say 'N' here to avoid potential power, performance and
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memory penalty.
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if CORESIGHT
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config HAVE_CORESIGHT_SINK
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bool
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config CORESIGHT_CSR
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bool "CoreSight Slave Register driver"
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help
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This driver provides support for CoreSight Slave Register block
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that hosts miscellaneous configuration registers.
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config CORESIGHT_TMC
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bool "CoreSight Trace Memory Controller driver"
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select CORESIGHT_CSR
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select HAVE_CORESIGHT_SINK
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help
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This driver provides support for Trace Memory Controller which
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can be configured as either an ETB (Embedded Trace Buffer),
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ETR (Embedded Trace Router) or ETF (Embedded Trace Fifo). It acts
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as sink when configured as ETB, ETR or ETF in circular buffer mode
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whereas it is a link when configured as ETF in hardware fifo mode.
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ETB collects trace data in a circular buffer whereas ETR can be
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used to route trace data to memory allocated in RAM. ETF in
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circular buffer mode is like an ETB whereas in hardware fifo mode
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it is a fifo link.
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config CORESIGHT_TPIU
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bool "CoreSight Trace Port Interface Unit driver"
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select HAVE_CORESIGHT_SINK
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help
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This driver provides support for Trace Port Interface Unit which
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acts as a conduit for offchip trace collection.
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config CORESIGHT_ETB
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bool "CoreSight Embedded Trace Buffer driver"
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select HAVE_CORESIGHT_SINK
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help
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This driver provides support for the legacy Embedded Trace Buffer
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which is a circular buffer.
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if HAVE_CORESIGHT_SINK
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config CORESIGHT_FUNNEL
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bool "CoreSight Funnel driver"
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help
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This driver provides support for Funnel which is a link that
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typically has multiple input ports and a single output port. Input
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trace data streams from the input ports are interleaved into a
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single output trace data stream coming out of the output port.
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config CORESIGHT_REPLICATOR
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bool "CoreSight Replicator driver"
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help
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This driver provides support for Replicator that typically has
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a single input port and two output ports. Single trace data
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stream on the input port is replicated to produce two identical
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trace data output streams coming out of the two output ports.
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config CORESIGHT_STM
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bool "CoreSight System Trace Macrocell driver"
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help
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This driver provides support for hardware assisted software
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instrumentation based tracing. This is primarily useful for
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logging useful software events or data.
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config CORESIGHT_STM_DEFAULT_ENABLE
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bool "Turn on STM tracing by default"
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depends on CORESIGHT_STM
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help
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Turns on CoreSight STM tracing (hardware assisted software
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instrumentation based tracing) by default. Otherwise, tracing is
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disabled by default but can be enabled via sysfs.
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If unsure, say 'N' here to avoid potential power and performance
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penalty.
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config CORESIGHT_ETM
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bool "CoreSight Embedded Trace Macrocell driver"
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help
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This driver provides support for processor tracing which allows
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tracing the instructions that the processor is executing. This is
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primarily useful for instruction level tracing.
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config CORESIGHT_ETM_DEFAULT_ENABLE
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bool "Turn on ETM tracing by default"
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depends on CORESIGHT_ETM
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help
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Turns on CoreSight ETM tracing (processor tracing) by default.
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Otherwise, tracing is disabled by default but can be enabled via
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sysfs.
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If unsure, say 'N' here to avoid potential power and performance
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penalty.
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config CORESIGHT_ETM_PCSAVE_DEFAULT_ENABLE
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bool "Turn on PC saving by default"
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depends on CORESIGHT_ETM
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help
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Turns on program counter saving on reset by default. Otherwise,
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PC saving is disabled by default but can be enabled via sysfs.
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If unsure, say 'N' here to avoid potential power penalty.
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endif
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config CORESIGHT_EVENT
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tristate "CoreSight Event driver"
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help
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This driver provides support for registering with various events
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and performing CoreSight actions like aborting trace on their
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occurrence.
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endif
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