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df95e42e1f
If I only ack the detection register after a error have been detected
I'm unable to reliably detect errors. I have verified this behavior
using both an error injection DIMM and software to inject errors.
I can't find any documentation supporting this behavior in Intel 5100
Memory Controller Hub Chipset, see 1. So this is all based on
experimentation.
[1] Intel® 5100 Memory Controller Hub Chipset
http://www.intel.com/content/dam/doc/datasheet/5100-
memory-controller-hub-chipset-datasheet.pdf
Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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| .. | ||
| amd64_edac.c | ||
| amd64_edac.h | ||
| amd64_edac_dbg.c | ||
| amd64_edac_inj.c | ||
| amd76x_edac.c | ||
| amd8111_edac.c | ||
| amd8111_edac.h | ||
| amd8131_edac.c | ||
| amd8131_edac.h | ||
| cell_edac.c | ||
| cpc925_edac.c | ||
| e7xxx_edac.c | ||
| e752x_edac.c | ||
| edac_core.h | ||
| edac_device.c | ||
| edac_device_sysfs.c | ||
| edac_mc.c | ||
| edac_mc_sysfs.c | ||
| edac_module.c | ||
| edac_module.h | ||
| edac_pci.c | ||
| edac_pci_sysfs.c | ||
| edac_stub.c | ||
| i7core_edac.c | ||
| i3000_edac.c | ||
| i3200_edac.c | ||
| i5000_edac.c | ||
| i5100_edac.c | ||
| i5400_edac.c | ||
| i7300_edac.c | ||
| i82443bxgx_edac.c | ||
| i82860_edac.c | ||
| i82875p_edac.c | ||
| i82975x_edac.c | ||
| Kconfig | ||
| Makefile | ||
| mce_amd.c | ||
| mce_amd.h | ||
| mce_amd_inj.c | ||
| mpc85xx_edac.c | ||
| mpc85xx_edac.h | ||
| mv64x60_edac.c | ||
| mv64x60_edac.h | ||
| pasemi_edac.c | ||
| ppc4xx_edac.c | ||
| ppc4xx_edac.h | ||
| r82600_edac.c | ||
| sb_edac.c | ||
| tile_edac.c | ||
| x38_edac.c | ||