mirror of
https://github.com/S3NEO/android_kernel_samsung_msm8226.git
synced 2024-11-07 03:47:13 +00:00
Merge tag 'v3.4.113' into lineage-16.0
This is the 3.4.113 stable release Change-Id: I80791430656359c5447a675cbff4431362d18df0 Signed-off-by: Kevin F. Haggerty <haggertk@lineageos.org>
This commit is contained in:
Kevin F. Haggerty
Francescodario Cuzzocrea
parent
36738e5d0d
commit
238a0fb5ad
3036 changed files with 50545 additions and 24060 deletions
|
|
@ -51,12 +51,6 @@ current_snap
|
|||
|
||||
The current snapshot for which the device is mapped.
|
||||
|
||||
create_snap
|
||||
|
||||
Create a snapshot:
|
||||
|
||||
$ echo <snap-name> > /sys/bus/rbd/devices/<dev-id>/snap_create
|
||||
|
||||
snap_*
|
||||
|
||||
A directory per each snapshot
|
||||
|
|
|
|||
|
|
@ -218,16 +218,16 @@ The development process
|
|||
Linux kernel development process currently consists of a few different
|
||||
main kernel "branches" and lots of different subsystem-specific kernel
|
||||
branches. These different branches are:
|
||||
- main 2.6.x kernel tree
|
||||
- 2.6.x.y -stable kernel tree
|
||||
- 2.6.x -git kernel patches
|
||||
- main 3.x kernel tree
|
||||
- 3.x.y -stable kernel tree
|
||||
- 3.x -git kernel patches
|
||||
- subsystem specific kernel trees and patches
|
||||
- the 2.6.x -next kernel tree for integration tests
|
||||
- the 3.x -next kernel tree for integration tests
|
||||
|
||||
2.6.x kernel tree
|
||||
3.x kernel tree
|
||||
-----------------
|
||||
2.6.x kernels are maintained by Linus Torvalds, and can be found on
|
||||
kernel.org in the pub/linux/kernel/v2.6/ directory. Its development
|
||||
3.x kernels are maintained by Linus Torvalds, and can be found on
|
||||
kernel.org in the pub/linux/kernel/v3.x/ directory. Its development
|
||||
process is as follows:
|
||||
- As soon as a new kernel is released a two weeks window is open,
|
||||
during this period of time maintainers can submit big diffs to
|
||||
|
|
@ -262,20 +262,20 @@ mailing list about kernel releases:
|
|||
released according to perceived bug status, not according to a
|
||||
preconceived timeline."
|
||||
|
||||
2.6.x.y -stable kernel tree
|
||||
3.x.y -stable kernel tree
|
||||
---------------------------
|
||||
Kernels with 4-part versions are -stable kernels. They contain
|
||||
Kernels with 3-part versions are -stable kernels. They contain
|
||||
relatively small and critical fixes for security problems or significant
|
||||
regressions discovered in a given 2.6.x kernel.
|
||||
regressions discovered in a given 3.x kernel.
|
||||
|
||||
This is the recommended branch for users who want the most recent stable
|
||||
kernel and are not interested in helping test development/experimental
|
||||
versions.
|
||||
|
||||
If no 2.6.x.y kernel is available, then the highest numbered 2.6.x
|
||||
If no 3.x.y kernel is available, then the highest numbered 3.x
|
||||
kernel is the current stable kernel.
|
||||
|
||||
2.6.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
|
||||
3.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and
|
||||
are released as needs dictate. The normal release period is approximately
|
||||
two weeks, but it can be longer if there are no pressing problems. A
|
||||
security-related problem, instead, can cause a release to happen almost
|
||||
|
|
@ -285,7 +285,7 @@ The file Documentation/stable_kernel_rules.txt in the kernel tree
|
|||
documents what kinds of changes are acceptable for the -stable tree, and
|
||||
how the release process works.
|
||||
|
||||
2.6.x -git patches
|
||||
3.x -git patches
|
||||
------------------
|
||||
These are daily snapshots of Linus' kernel tree which are managed in a
|
||||
git repository (hence the name.) These patches are usually released
|
||||
|
|
@ -317,13 +317,13 @@ revisions to it, and maintainers can mark patches as under review,
|
|||
accepted, or rejected. Most of these patchwork sites are listed at
|
||||
http://patchwork.kernel.org/.
|
||||
|
||||
2.6.x -next kernel tree for integration tests
|
||||
3.x -next kernel tree for integration tests
|
||||
---------------------------------------------
|
||||
Before updates from subsystem trees are merged into the mainline 2.6.x
|
||||
Before updates from subsystem trees are merged into the mainline 3.x
|
||||
tree, they need to be integration-tested. For this purpose, a special
|
||||
testing repository exists into which virtually all subsystem trees are
|
||||
pulled on an almost daily basis:
|
||||
http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git
|
||||
http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git
|
||||
http://linux.f-seidel.de/linux-next/pmwiki/
|
||||
|
||||
This way, the -next kernel gives a summary outlook onto what will be
|
||||
|
|
|
|||
|
|
@ -345,14 +345,14 @@ the named feature on.
|
|||
The implementation is simple.
|
||||
|
||||
Setting the flag 'cpuset.memory_spread_page' turns on a per-process flag
|
||||
PF_SPREAD_PAGE for each task that is in that cpuset or subsequently
|
||||
PFA_SPREAD_PAGE for each task that is in that cpuset or subsequently
|
||||
joins that cpuset. The page allocation calls for the page cache
|
||||
is modified to perform an inline check for this PF_SPREAD_PAGE task
|
||||
is modified to perform an inline check for this PFA_SPREAD_PAGE task
|
||||
flag, and if set, a call to a new routine cpuset_mem_spread_node()
|
||||
returns the node to prefer for the allocation.
|
||||
|
||||
Similarly, setting 'cpuset.memory_spread_slab' turns on the flag
|
||||
PF_SPREAD_SLAB, and appropriately marked slab caches will allocate
|
||||
PFA_SPREAD_SLAB, and appropriately marked slab caches will allocate
|
||||
pages from the node returned by cpuset_mem_spread_node().
|
||||
|
||||
The cpuset_mem_spread_node() routine is also simple. It uses the
|
||||
|
|
|
|||
|
|
@ -466,6 +466,10 @@ Note:
|
|||
5.3 swappiness
|
||||
|
||||
Similar to /proc/sys/vm/swappiness, but affecting a hierarchy of groups only.
|
||||
Please note that unlike the global swappiness, memcg knob set to 0
|
||||
really prevents from any swapping even if there is a swap storage
|
||||
available. This might lead to memcg OOM killer if there are no file
|
||||
pages to reclaim.
|
||||
|
||||
Following cgroups' swappiness can't be changed.
|
||||
- root cgroup (uses /proc/sys/vm/swappiness).
|
||||
|
|
|
|||
|
|
@ -7,39 +7,39 @@ This target is read-only.
|
|||
|
||||
Construction Parameters
|
||||
=======================
|
||||
<version> <dev> <hash_dev> <hash_start>
|
||||
<version> <dev> <hash_dev>
|
||||
<data_block_size> <hash_block_size>
|
||||
<num_data_blocks> <hash_start_block>
|
||||
<algorithm> <digest> <salt>
|
||||
|
||||
<version>
|
||||
This is the version number of the on-disk format.
|
||||
This is the type of the on-disk hash format.
|
||||
|
||||
0 is the original format used in the Chromium OS.
|
||||
The salt is appended when hashing, digests are stored continuously and
|
||||
the rest of the block is padded with zeros.
|
||||
The salt is appended when hashing, digests are stored continuously and
|
||||
the rest of the block is padded with zeros.
|
||||
|
||||
1 is the current format that should be used for new devices.
|
||||
The salt is prepended when hashing and each digest is
|
||||
padded with zeros to the power of two.
|
||||
The salt is prepended when hashing and each digest is
|
||||
padded with zeros to the power of two.
|
||||
|
||||
<dev>
|
||||
This is the device containing the data the integrity of which needs to be
|
||||
This is the device containing data, the integrity of which needs to be
|
||||
checked. It may be specified as a path, like /dev/sdaX, or a device number,
|
||||
<major>:<minor>.
|
||||
|
||||
<hash_dev>
|
||||
This is the device that that supplies the hash tree data. It may be
|
||||
This is the device that supplies the hash tree data. It may be
|
||||
specified similarly to the device path and may be the same device. If the
|
||||
same device is used, the hash_start should be outside of the dm-verity
|
||||
configured device size.
|
||||
same device is used, the hash_start should be outside the configured
|
||||
dm-verity device.
|
||||
|
||||
<data_block_size>
|
||||
The block size on a data device. Each block corresponds to one digest on
|
||||
the hash device.
|
||||
The block size on a data device in bytes.
|
||||
Each block corresponds to one digest on the hash device.
|
||||
|
||||
<hash_block_size>
|
||||
The size of a hash block.
|
||||
The size of a hash block in bytes.
|
||||
|
||||
<num_data_blocks>
|
||||
The number of data blocks on the data device. Additional blocks are
|
||||
|
|
@ -65,7 +65,7 @@ Construction Parameters
|
|||
Theory of operation
|
||||
===================
|
||||
|
||||
dm-verity is meant to be setup as part of a verified boot path. This
|
||||
dm-verity is meant to be set up as part of a verified boot path. This
|
||||
may be anything ranging from a boot using tboot or trustedgrub to just
|
||||
booting from a known-good device (like a USB drive or CD).
|
||||
|
||||
|
|
@ -73,20 +73,20 @@ When a dm-verity device is configured, it is expected that the caller
|
|||
has been authenticated in some way (cryptographic signatures, etc).
|
||||
After instantiation, all hashes will be verified on-demand during
|
||||
disk access. If they cannot be verified up to the root node of the
|
||||
tree, the root hash, then the I/O will fail. This should identify
|
||||
tree, the root hash, then the I/O will fail. This should detect
|
||||
tampering with any data on the device and the hash data.
|
||||
|
||||
Cryptographic hashes are used to assert the integrity of the device on a
|
||||
per-block basis. This allows for a lightweight hash computation on first read
|
||||
into the page cache. Block hashes are stored linearly-aligned to the nearest
|
||||
block the size of a page.
|
||||
per-block basis. This allows for a lightweight hash computation on first read
|
||||
into the page cache. Block hashes are stored linearly, aligned to the nearest
|
||||
block size.
|
||||
|
||||
Hash Tree
|
||||
---------
|
||||
|
||||
Each node in the tree is a cryptographic hash. If it is a leaf node, the hash
|
||||
is of some block data on disk. If it is an intermediary node, then the hash is
|
||||
of a number of child nodes.
|
||||
of some data block on disk is calculated. If it is an intermediary node,
|
||||
the hash of a number of child nodes is calculated.
|
||||
|
||||
Each entry in the tree is a collection of neighboring nodes that fit in one
|
||||
block. The number is determined based on block_size and the size of the
|
||||
|
|
@ -110,63 +110,23 @@ alg = sha256, num_blocks = 32768, block_size = 4096
|
|||
On-disk format
|
||||
==============
|
||||
|
||||
Below is the recommended on-disk format. The verity kernel code does not
|
||||
read the on-disk header. It only reads the hash blocks which directly
|
||||
follow the header. It is expected that a user-space tool will verify the
|
||||
integrity of the verity_header and then call dmsetup with the correct
|
||||
parameters. Alternatively, the header can be omitted and the dmsetup
|
||||
parameters can be passed via the kernel command-line in a rooted chain
|
||||
of trust where the command-line is verified.
|
||||
The verity kernel code does not read the verity metadata on-disk header.
|
||||
It only reads the hash blocks which directly follow the header.
|
||||
It is expected that a user-space tool will verify the integrity of the
|
||||
verity header.
|
||||
|
||||
The on-disk format is especially useful in cases where the hash blocks
|
||||
are on a separate partition. The magic number allows easy identification
|
||||
of the partition contents. Alternatively, the hash blocks can be stored
|
||||
in the same partition as the data to be verified. In such a configuration
|
||||
the filesystem on the partition would be sized a little smaller than
|
||||
the full-partition, leaving room for the hash blocks.
|
||||
|
||||
struct superblock {
|
||||
uint8_t signature[8]
|
||||
"verity\0\0";
|
||||
|
||||
uint8_t version;
|
||||
1 - current format
|
||||
|
||||
uint8_t data_block_bits;
|
||||
log2(data block size)
|
||||
|
||||
uint8_t hash_block_bits;
|
||||
log2(hash block size)
|
||||
|
||||
uint8_t pad1[1];
|
||||
zero padding
|
||||
|
||||
uint16_t salt_size;
|
||||
big-endian salt size
|
||||
|
||||
uint8_t pad2[2];
|
||||
zero padding
|
||||
|
||||
uint32_t data_blocks_hi;
|
||||
big-endian high 32 bits of the 64-bit number of data blocks
|
||||
|
||||
uint32_t data_blocks_lo;
|
||||
big-endian low 32 bits of the 64-bit number of data blocks
|
||||
|
||||
uint8_t algorithm[16];
|
||||
cryptographic algorithm
|
||||
|
||||
uint8_t salt[384];
|
||||
salt (the salt size is specified above)
|
||||
|
||||
uint8_t pad3[88];
|
||||
zero padding to 512-byte boundary
|
||||
}
|
||||
Alternatively, the header can be omitted and the dmsetup parameters can
|
||||
be passed via the kernel command-line in a rooted chain of trust where
|
||||
the command-line is verified.
|
||||
|
||||
Directly following the header (and with sector number padded to the next hash
|
||||
block boundary) are the hash blocks which are stored a depth at a time
|
||||
(starting from the root), sorted in order of increasing index.
|
||||
|
||||
The full specification of kernel parameters and on-disk metadata format
|
||||
is available at the cryptsetup project's wiki page
|
||||
http://code.google.com/p/cryptsetup/wiki/DMVerity
|
||||
|
||||
Status
|
||||
======
|
||||
V (for Valid) is returned if every check performed so far was valid.
|
||||
|
|
@ -174,21 +134,22 @@ If any check failed, C (for Corruption) is returned.
|
|||
|
||||
Example
|
||||
=======
|
||||
|
||||
Setup a device:
|
||||
dmsetup create vroot --table \
|
||||
"0 2097152 "\
|
||||
"verity 1 /dev/sda1 /dev/sda2 4096 4096 2097152 1 "\
|
||||
Set up a device:
|
||||
# dmsetup create vroot --readonly --table \
|
||||
"0 2097152 verity 1 /dev/sda1 /dev/sda2 4096 4096 262144 1 sha256 "\
|
||||
"4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076 "\
|
||||
"1234000000000000000000000000000000000000000000000000000000000000"
|
||||
|
||||
A command line tool veritysetup is available to compute or verify
|
||||
the hash tree or activate the kernel driver. This is available from
|
||||
the LVM2 upstream repository and may be supplied as a package called
|
||||
device-mapper-verity-tools:
|
||||
git://sources.redhat.com/git/lvm2
|
||||
http://sourceware.org/git/?p=lvm2.git
|
||||
http://sourceware.org/cgi-bin/cvsweb.cgi/LVM2/verity?cvsroot=lvm2
|
||||
the hash tree or activate the kernel device. This is available from
|
||||
the cryptsetup upstream repository http://code.google.com/p/cryptsetup/
|
||||
(as a libcryptsetup extension).
|
||||
|
||||
veritysetup -a vroot /dev/sda1 /dev/sda2 \
|
||||
4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
Create hash on the device:
|
||||
# veritysetup format /dev/sda1 /dev/sda2
|
||||
...
|
||||
Root hash: 4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
|
||||
Activate the device:
|
||||
# veritysetup create vroot /dev/sda1 /dev/sda2 \
|
||||
4392712ba01368efdf14b05c76f9e4df0d53664630b5d48632ed17a137f39076
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ PIT Timer required properties:
|
|||
shared across all System Controller members.
|
||||
|
||||
TC/TCLIB Timer required properties:
|
||||
- compatible: Should be "atmel,<chip>-pit".
|
||||
- compatible: Should be "atmel,<chip>-tcb".
|
||||
<chip> can be "at91rm9200" or "at91sam9x5"
|
||||
- reg: Should contain registers location and length
|
||||
- interrupts: Should contain all interrupts for the TC block
|
||||
|
|
|
|||
|
|
@ -10,8 +10,8 @@ Required properties:
|
|||
|
||||
Optional properties:
|
||||
- fsl,card-wired : Indicate the card is wired to host permanently
|
||||
- fsl,cd-internal : Indicate to use controller internal card detection
|
||||
- fsl,wp-internal : Indicate to use controller internal write protection
|
||||
- fsl,cd-controller : Indicate to use controller internal card detection
|
||||
- fsl,wp-controller : Indicate to use controller internal write protection
|
||||
- cd-gpios : Specify GPIOs for card detection
|
||||
- wp-gpios : Specify GPIOs for write protection
|
||||
|
||||
|
|
@ -21,8 +21,8 @@ esdhc@70004000 {
|
|||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70004000 0x4000>;
|
||||
interrupts = <1>;
|
||||
fsl,cd-internal;
|
||||
fsl,wp-internal;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
};
|
||||
|
||||
esdhc@70008000 {
|
||||
|
|
|
|||
|
|
@ -10,6 +10,9 @@ Required properties:
|
|||
- "ns16850"
|
||||
- "nvidia,tegra20-uart"
|
||||
- "ibm,qpace-nwp-serial"
|
||||
- "altr,16550-FIFO32"
|
||||
- "altr,16550-FIFO64"
|
||||
- "altr,16550-FIFO128"
|
||||
- "serial" if the port type is unknown.
|
||||
- reg : offset and length of the register set for the device.
|
||||
- interrupts : should contain uart interrupt.
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ sub tda10045 {
|
|||
|
||||
sub tda10046 {
|
||||
my $sourcefile = "TT_PCI_2.19h_28_11_2006.zip";
|
||||
my $url = "http://www.tt-download.com/download/updates/219/$sourcefile";
|
||||
my $url = "http://technotrend.com.ua/download/software/219/$sourcefile";
|
||||
my $hash = "6a7e1e2f2644b162ff0502367553c72d";
|
||||
my $outfile = "dvb-fe-tda10046.fw";
|
||||
my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1);
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ Supported chips:
|
|||
Prefix: 'coretemp'
|
||||
CPUID: family 0x6, models 0xe (Pentium M DC), 0xf (Core 2 DC 65nm),
|
||||
0x16 (Core 2 SC 65nm), 0x17 (Penryn 45nm),
|
||||
0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield)
|
||||
0x1a (Nehalem), 0x1c (Atom), 0x1e (Lynnfield),
|
||||
0x26 (Tunnel Creek Atom), 0x27 (Medfield Atom),
|
||||
0x36 (Cedar Trail Atom)
|
||||
Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
|
||||
Volume 3A: System Programming Guide
|
||||
http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
|
||||
|
|
@ -65,6 +67,11 @@ Process Processor TjMax(C)
|
|||
U3400 105
|
||||
P4505/P4500 90
|
||||
|
||||
32nm Atom Processors
|
||||
Z2460 90
|
||||
D2700/2550/2500 100
|
||||
N2850/2800/2650/2600 100
|
||||
|
||||
45nm Xeon Processors 5400 Quad-Core
|
||||
X5492, X5482, X5472, X5470, X5460, X5450 85
|
||||
E5472, E5462, E5450/40/30/20/10/05 85
|
||||
|
|
@ -85,6 +92,9 @@ Process Processor TjMax(C)
|
|||
N475/470/455/450 100
|
||||
N280/270 90
|
||||
330/230 125
|
||||
E680/660/640/620 90
|
||||
E680T/660T/640T/620T 110
|
||||
CE4170/4150/4110 110
|
||||
|
||||
45nm Core2 Processors
|
||||
Solo ULV SU3500/3300 100
|
||||
|
|
|
|||
|
|
@ -21,6 +21,8 @@ Supported adapters:
|
|||
* Intel DH89xxCC (PCH)
|
||||
* Intel Panther Point (PCH)
|
||||
* Intel Lynx Point (PCH)
|
||||
* Intel Lynx Point-LP (PCH)
|
||||
* Intel Avoton (SOC)
|
||||
Datasheets: Publicly available at the Intel website
|
||||
|
||||
On Intel Patsburg and later chipsets, both the normal host SMBus controller
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ Supported adapters:
|
|||
Datasheet: Only available via NDA from ServerWorks
|
||||
* ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
|
||||
Datasheet: Not publicly available
|
||||
* AMD Hudson-2
|
||||
* AMD Hudson-2, CZ
|
||||
Datasheet: Not publicly available
|
||||
* Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
|
||||
Datasheet: Publicly available at the SMSC website http://www.smsc.com
|
||||
|
|
|
|||
|
|
@ -315,7 +315,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
|
|||
もし、2.6.x.y カーネルが存在しない場合には、番号が一番大きい 2.6.x が
|
||||
最新の安定版カーネルです。
|
||||
|
||||
2.6.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
|
||||
2.6.x.y は "stable" チーム <stable@vger.kernel.org> でメンテされており、必
|
||||
要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ
|
||||
た問題がなければもう少し長くなることもあります。セキュリティ関連の問題
|
||||
の場合はこれに対してだいたいの場合、すぐにリリースがされます。
|
||||
|
|
|
|||
|
|
@ -50,16 +50,16 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt
|
|||
|
||||
-stable ツリーにパッチを送付する手続き-
|
||||
|
||||
- 上記の規則に従っているかを確認した後に、stable@kernel.org にパッチ
|
||||
- 上記の規則に従っているかを確認した後に、stable@vger.kernel.org にパッチ
|
||||
を送る。
|
||||
- 送信者はパッチがキューに受け付けられた際には ACK を、却下された場合
|
||||
には NAK を受け取る。この反応は開発者たちのスケジュールによって、数
|
||||
日かかる場合がある。
|
||||
- もし受け取られたら、パッチは他の開発者たちと関連するサブシステムの
|
||||
メンテナーによるレビューのために -stable キューに追加される。
|
||||
- パッチに stable@kernel.org のアドレスが付加されているときには、それ
|
||||
- パッチに stable@vger.kernel.org のアドレスが付加されているときには、それ
|
||||
が Linus のツリーに入る時に自動的に stable チームに email される。
|
||||
- セキュリティパッチはこのエイリアス (stable@kernel.org) に送られるべ
|
||||
- セキュリティパッチはこのエイリアス (stable@vger.kernel.org) に送られるべ
|
||||
きではなく、代わりに security@kernel.org のアドレスに送られる。
|
||||
|
||||
レビューサイクル-
|
||||
|
|
|
|||
|
|
@ -566,6 +566,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
UART at the specified I/O port or MMIO address,
|
||||
switching to the matching ttyS device later. The
|
||||
options are the same as for ttyS, above.
|
||||
hvc<n> Use the hypervisor console device <n>. This is for
|
||||
both Xen and PowerPC hypervisors.
|
||||
|
||||
If the device connected to the port is not a TTY but a braille
|
||||
device, prepend "brl," before the device type, for instance
|
||||
|
|
@ -751,6 +753,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
|
||||
earlyprintk= [X86,SH,BLACKFIN]
|
||||
earlyprintk=vga
|
||||
earlyprintk=xen
|
||||
earlyprintk=serial[,ttySn[,baudrate]]
|
||||
earlyprintk=ttySn[,baudrate]
|
||||
earlyprintk=dbgp[debugController#]
|
||||
|
|
@ -768,6 +771,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
The VGA output is eventually overwritten by the real
|
||||
console.
|
||||
|
||||
The xen output can only be used by Xen PV guests.
|
||||
|
||||
ekgdboc= [X86,KGDB] Allow early kernel console debugging
|
||||
ekgdboc=kbd
|
||||
|
||||
|
|
@ -777,6 +782,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
edd= [EDD]
|
||||
Format: {"off" | "on" | "skip[mbr]"}
|
||||
|
||||
efi_no_storage_paranoia [EFI; X86]
|
||||
Using this parameter you can use more than 50% of
|
||||
your efi variable storage. Use this parameter only if
|
||||
you are really sure that your UEFI does sane gc and
|
||||
fulfills the spec otherwise your board may brick.
|
||||
|
||||
eisa_irq_edge= [PARISC,HW]
|
||||
See header of drivers/parisc/eisa.c.
|
||||
|
||||
|
|
@ -977,6 +988,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
i8042.notimeout [HW] Ignore timeout condition signalled by controller
|
||||
i8042.reset [HW] Reset the controller during init and cleanup
|
||||
i8042.unlock [HW] Unlock (ignore) the keylock
|
||||
i8042.kbdreset [HW] Reset device connected to KBD port
|
||||
|
||||
i810= [HW,DRM]
|
||||
|
||||
|
|
@ -991,6 +1003,20 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
i8k.restricted [HW] Allow controlling fans only if SYS_ADMIN
|
||||
capability is set.
|
||||
|
||||
i915.invert_brightness=
|
||||
[DRM] Invert the sense of the variable that is used to
|
||||
set the brightness of the panel backlight. Normally a
|
||||
brightness value of 0 indicates backlight switched off,
|
||||
and the maximum of the brightness value sets the backlight
|
||||
to maximum brightness. If this parameter is set to 0
|
||||
(default) and the machine requires it, or this parameter
|
||||
is set to 1, a brightness value of 0 sets the backlight
|
||||
to maximum brightness, and the maximum of the brightness
|
||||
value switches the backlight off.
|
||||
-1 -- never invert brightness
|
||||
0 -- machine default
|
||||
1 -- force brightness inversion
|
||||
|
||||
icn= [HW,ISDN]
|
||||
Format: <io>[,<membase>[,<icn_id>[,<icn_id2>]]]
|
||||
|
||||
|
|
|
|||
164
Documentation/lzo.txt
Normal file
164
Documentation/lzo.txt
Normal file
|
|
@ -0,0 +1,164 @@
|
|||
|
||||
LZO stream format as understood by Linux's LZO decompressor
|
||||
===========================================================
|
||||
|
||||
Introduction
|
||||
|
||||
This is not a specification. No specification seems to be publicly available
|
||||
for the LZO stream format. This document describes what input format the LZO
|
||||
decompressor as implemented in the Linux kernel understands. The file subject
|
||||
of this analysis is lib/lzo/lzo1x_decompress_safe.c. No analysis was made on
|
||||
the compressor nor on any other implementations though it seems likely that
|
||||
the format matches the standard one. The purpose of this document is to
|
||||
better understand what the code does in order to propose more efficient fixes
|
||||
for future bug reports.
|
||||
|
||||
Description
|
||||
|
||||
The stream is composed of a series of instructions, operands, and data. The
|
||||
instructions consist in a few bits representing an opcode, and bits forming
|
||||
the operands for the instruction, whose size and position depend on the
|
||||
opcode and on the number of literals copied by previous instruction. The
|
||||
operands are used to indicate :
|
||||
|
||||
- a distance when copying data from the dictionary (past output buffer)
|
||||
- a length (number of bytes to copy from dictionary)
|
||||
- the number of literals to copy, which is retained in variable "state"
|
||||
as a piece of information for next instructions.
|
||||
|
||||
Optionally depending on the opcode and operands, extra data may follow. These
|
||||
extra data can be a complement for the operand (eg: a length or a distance
|
||||
encoded on larger values), or a literal to be copied to the output buffer.
|
||||
|
||||
The first byte of the block follows a different encoding from other bytes, it
|
||||
seems to be optimized for literal use only, since there is no dictionary yet
|
||||
prior to that byte.
|
||||
|
||||
Lengths are always encoded on a variable size starting with a small number
|
||||
of bits in the operand. If the number of bits isn't enough to represent the
|
||||
length, up to 255 may be added in increments by consuming more bytes with a
|
||||
rate of at most 255 per extra byte (thus the compression ratio cannot exceed
|
||||
around 255:1). The variable length encoding using #bits is always the same :
|
||||
|
||||
length = byte & ((1 << #bits) - 1)
|
||||
if (!length) {
|
||||
length = ((1 << #bits) - 1)
|
||||
length += 255*(number of zero bytes)
|
||||
length += first-non-zero-byte
|
||||
}
|
||||
length += constant (generally 2 or 3)
|
||||
|
||||
For references to the dictionary, distances are relative to the output
|
||||
pointer. Distances are encoded using very few bits belonging to certain
|
||||
ranges, resulting in multiple copy instructions using different encodings.
|
||||
Certain encodings involve one extra byte, others involve two extra bytes
|
||||
forming a little-endian 16-bit quantity (marked LE16 below).
|
||||
|
||||
After any instruction except the large literal copy, 0, 1, 2 or 3 literals
|
||||
are copied before starting the next instruction. The number of literals that
|
||||
were copied may change the meaning and behaviour of the next instruction. In
|
||||
practice, only one instruction needs to know whether 0, less than 4, or more
|
||||
literals were copied. This is the information stored in the <state> variable
|
||||
in this implementation. This number of immediate literals to be copied is
|
||||
generally encoded in the last two bits of the instruction but may also be
|
||||
taken from the last two bits of an extra operand (eg: distance).
|
||||
|
||||
End of stream is declared when a block copy of distance 0 is seen. Only one
|
||||
instruction may encode this distance (0001HLLL), it takes one LE16 operand
|
||||
for the distance, thus requiring 3 bytes.
|
||||
|
||||
IMPORTANT NOTE : in the code some length checks are missing because certain
|
||||
instructions are called under the assumption that a certain number of bytes
|
||||
follow because it has already been garanteed before parsing the instructions.
|
||||
They just have to "refill" this credit if they consume extra bytes. This is
|
||||
an implementation design choice independant on the algorithm or encoding.
|
||||
|
||||
Byte sequences
|
||||
|
||||
First byte encoding :
|
||||
|
||||
0..17 : follow regular instruction encoding, see below. It is worth
|
||||
noting that codes 16 and 17 will represent a block copy from
|
||||
the dictionary which is empty, and that they will always be
|
||||
invalid at this place.
|
||||
|
||||
18..21 : copy 0..3 literals
|
||||
state = (byte - 17) = 0..3 [ copy <state> literals ]
|
||||
skip byte
|
||||
|
||||
22..255 : copy literal string
|
||||
length = (byte - 17) = 4..238
|
||||
state = 4 [ don't copy extra literals ]
|
||||
skip byte
|
||||
|
||||
Instruction encoding :
|
||||
|
||||
0 0 0 0 X X X X (0..15)
|
||||
Depends on the number of literals copied by the last instruction.
|
||||
If last instruction did not copy any literal (state == 0), this
|
||||
encoding will be a copy of 4 or more literal, and must be interpreted
|
||||
like this :
|
||||
|
||||
0 0 0 0 L L L L (0..15) : copy long literal string
|
||||
length = 3 + (L ?: 15 + (zero_bytes * 255) + non_zero_byte)
|
||||
state = 4 (no extra literals are copied)
|
||||
|
||||
If last instruction used to copy between 1 to 3 literals (encoded in
|
||||
the instruction's opcode or distance), the instruction is a copy of a
|
||||
2-byte block from the dictionary within a 1kB distance. It is worth
|
||||
noting that this instruction provides little savings since it uses 2
|
||||
bytes to encode a copy of 2 other bytes but it encodes the number of
|
||||
following literals for free. It must be interpreted like this :
|
||||
|
||||
0 0 0 0 D D S S (0..15) : copy 2 bytes from <= 1kB distance
|
||||
length = 2
|
||||
state = S (copy S literals after this block)
|
||||
Always followed by exactly one byte : H H H H H H H H
|
||||
distance = (H << 2) + D + 1
|
||||
|
||||
If last instruction used to copy 4 or more literals (as detected by
|
||||
state == 4), the instruction becomes a copy of a 3-byte block from the
|
||||
dictionary from a 2..3kB distance, and must be interpreted like this :
|
||||
|
||||
0 0 0 0 D D S S (0..15) : copy 3 bytes from 2..3 kB distance
|
||||
length = 3
|
||||
state = S (copy S literals after this block)
|
||||
Always followed by exactly one byte : H H H H H H H H
|
||||
distance = (H << 2) + D + 2049
|
||||
|
||||
0 0 0 1 H L L L (16..31)
|
||||
Copy of a block within 16..48kB distance (preferably less than 10B)
|
||||
length = 2 + (L ?: 7 + (zero_bytes * 255) + non_zero_byte)
|
||||
Always followed by exactly one LE16 : D D D D D D D D : D D D D D D S S
|
||||
distance = 16384 + (H << 14) + D
|
||||
state = S (copy S literals after this block)
|
||||
End of stream is reached if distance == 16384
|
||||
|
||||
0 0 1 L L L L L (32..63)
|
||||
Copy of small block within 16kB distance (preferably less than 34B)
|
||||
length = 2 + (L ?: 31 + (zero_bytes * 255) + non_zero_byte)
|
||||
Always followed by exactly one LE16 : D D D D D D D D : D D D D D D S S
|
||||
distance = D + 1
|
||||
state = S (copy S literals after this block)
|
||||
|
||||
0 1 L D D D S S (64..127)
|
||||
Copy 3-4 bytes from block within 2kB distance
|
||||
state = S (copy S literals after this block)
|
||||
length = 3 + L
|
||||
Always followed by exactly one byte : H H H H H H H H
|
||||
distance = (H << 3) + D + 1
|
||||
|
||||
1 L L D D D S S (128..255)
|
||||
Copy 5-8 bytes from block within 2kB distance
|
||||
state = S (copy S literals after this block)
|
||||
length = 5 + L
|
||||
Always followed by exactly one byte : H H H H H H H H
|
||||
distance = (H << 3) + D + 1
|
||||
|
||||
Authors
|
||||
|
||||
This document was written by Willy Tarreau <w@1wt.eu> on 2014/07/19 during an
|
||||
analysis of the decompression code available in Linux 3.16-rc5. The code is
|
||||
tricky, it is possible that this document contains mistakes or that a few
|
||||
corner cases were overlooked. In any case, please report any doubt, fix, or
|
||||
proposed updates to the author(s) so that the document can be updated.
|
||||
|
|
@ -544,6 +544,11 @@ tcp_thin_dupack - BOOLEAN
|
|||
Documentation/networking/tcp-thin.txt
|
||||
Default: 0
|
||||
|
||||
tcp_challenge_ack_limit - INTEGER
|
||||
Limits number of Challenge ACK sent per second, as recommended
|
||||
in RFC 5961 (Improving TCP's Robustness to Blind In-Window Attacks)
|
||||
Default: 100
|
||||
|
||||
UDP variables:
|
||||
|
||||
udp_mem - vector of 3 INTEGERs: min, pressure, max
|
||||
|
|
|
|||
|
|
@ -24,17 +24,33 @@ For monitoring and control pktgen creates:
|
|||
/proc/net/pktgen/ethX
|
||||
|
||||
|
||||
Viewing threads
|
||||
===============
|
||||
/proc/net/pktgen/kpktgend_0
|
||||
Name: kpktgend_0 max_before_softirq: 10000
|
||||
Running:
|
||||
Stopped: eth1
|
||||
Result: OK: max_before_softirq=10000
|
||||
Kernel threads
|
||||
==============
|
||||
Pktgen creates a thread for each CPU with affinity to that CPU.
|
||||
Which is controlled through procfile /proc/net/pktgen/kpktgend_X.
|
||||
|
||||
Most important the devices assigned to thread. Note! A device can only belong
|
||||
to one thread.
|
||||
Example: /proc/net/pktgen/kpktgend_0
|
||||
|
||||
Running:
|
||||
Stopped: eth4@0
|
||||
Result: OK: add_device=eth4@0
|
||||
|
||||
Most important are the devices assigned to the thread.
|
||||
|
||||
The two basic thread commands are:
|
||||
* add_device DEVICE@NAME -- adds a single device
|
||||
* rem_device_all -- remove all associated devices
|
||||
|
||||
When adding a device to a thread, a corrosponding procfile is created
|
||||
which is used for configuring this device. Thus, device names need to
|
||||
be unique.
|
||||
|
||||
To support adding the same device to multiple threads, which is useful
|
||||
with multi queue NICs, a the device naming scheme is extended with "@":
|
||||
device@something
|
||||
|
||||
The part after "@" can be anything, but it is custom to use the thread
|
||||
number.
|
||||
|
||||
Viewing devices
|
||||
===============
|
||||
|
|
@ -42,29 +58,32 @@ Viewing devices
|
|||
Parm section holds configured info. Current hold running stats.
|
||||
Result is printed after run or after interruption. Example:
|
||||
|
||||
/proc/net/pktgen/eth1
|
||||
/proc/net/pktgen/eth4@0
|
||||
|
||||
Params: count 10000000 min_pkt_size: 60 max_pkt_size: 60
|
||||
frags: 0 delay: 0 clone_skb: 1000000 ifname: eth1
|
||||
Params: count 100000 min_pkt_size: 60 max_pkt_size: 60
|
||||
frags: 0 delay: 0 clone_skb: 64 ifname: eth4@0
|
||||
flows: 0 flowlen: 0
|
||||
dst_min: 10.10.11.2 dst_max:
|
||||
src_min: src_max:
|
||||
src_mac: 00:00:00:00:00:00 dst_mac: 00:04:23:AC:FD:82
|
||||
udp_src_min: 9 udp_src_max: 9 udp_dst_min: 9 udp_dst_max: 9
|
||||
src_mac_count: 0 dst_mac_count: 0
|
||||
Flags:
|
||||
Current:
|
||||
pkts-sofar: 10000000 errors: 39664
|
||||
started: 1103053986245187us stopped: 1103053999346329us idle: 880401us
|
||||
seq_num: 10000011 cur_dst_mac_offset: 0 cur_src_mac_offset: 0
|
||||
cur_saddr: 0x10a0a0a cur_daddr: 0x20b0a0a
|
||||
cur_udp_dst: 9 cur_udp_src: 9
|
||||
queue_map_min: 0 queue_map_max: 0
|
||||
dst_min: 192.168.81.2 dst_max:
|
||||
src_min: src_max:
|
||||
src_mac: 90:e2:ba:0a:56:b4 dst_mac: 00:1b:21:3c:9d:f8
|
||||
udp_src_min: 9 udp_src_max: 109 udp_dst_min: 9 udp_dst_max: 9
|
||||
src_mac_count: 0 dst_mac_count: 0
|
||||
Flags: UDPSRC_RND NO_TIMESTAMP QUEUE_MAP_CPU
|
||||
Current:
|
||||
pkts-sofar: 100000 errors: 0
|
||||
started: 623913381008us stopped: 623913396439us idle: 25us
|
||||
seq_num: 100001 cur_dst_mac_offset: 0 cur_src_mac_offset: 0
|
||||
cur_saddr: 192.168.8.3 cur_daddr: 192.168.81.2
|
||||
cur_udp_dst: 9 cur_udp_src: 42
|
||||
cur_queue_map:
|
||||
flows: 0
|
||||
Result: OK: 13101142(c12220741+d880401) usec, 10000000 (60byte,0frags)
|
||||
763292pps 390Mb/sec (390805504bps) errors: 39664
|
||||
Result: OK: 15430(c15405d25) usec, 100000 (60byte,0frags)
|
||||
6480562pps 3110Mb/sec (3110669760bps) errors: 0
|
||||
|
||||
Configuring threads and devices
|
||||
================================
|
||||
|
||||
Configuring devices
|
||||
===================
|
||||
This is done via the /proc interface easiest done via pgset in the scripts
|
||||
|
||||
Examples:
|
||||
|
|
@ -177,6 +196,8 @@ Note when adding devices to a specific CPU there good idea to also assign
|
|||
/proc/irq/XX/smp_affinity so the TX-interrupts gets bound to the same CPU.
|
||||
as this reduces cache bouncing when freeing skb's.
|
||||
|
||||
Plus using the device flag QUEUE_MAP_CPU, which maps the SKBs TX queue
|
||||
to the running threads CPU (directly from smp_processor_id()).
|
||||
|
||||
Current commands and configuration options
|
||||
==========================================
|
||||
|
|
|
|||
|
|
@ -62,11 +62,10 @@ Socket Interface
|
|||
================
|
||||
|
||||
AF_RDS, PF_RDS, SOL_RDS
|
||||
These constants haven't been assigned yet, because RDS isn't in
|
||||
mainline yet. Currently, the kernel module assigns some constant
|
||||
and publishes it to user space through two sysctl files
|
||||
/proc/sys/net/rds/pf_rds
|
||||
/proc/sys/net/rds/sol_rds
|
||||
AF_RDS and PF_RDS are the domain type to be used with socket(2)
|
||||
to create RDS sockets. SOL_RDS is the socket-level to be used
|
||||
with setsockopt(2) and getsockopt(2) for RDS specific socket
|
||||
options.
|
||||
|
||||
fd = socket(PF_RDS, SOCK_SEQPACKET, 0);
|
||||
This creates a new, unbound RDS socket.
|
||||
|
|
|
|||
|
|
@ -72,7 +72,6 @@ static struct pinctrl_desc foo_desc = {
|
|||
.name = "foo",
|
||||
.pins = foo_pins,
|
||||
.npins = ARRAY_SIZE(foo_pins),
|
||||
.maxpin = 63,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
|
@ -164,8 +163,8 @@ static const char *foo_get_group_name(struct pinctrl_dev *pctldev,
|
|||
}
|
||||
|
||||
static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
|
||||
unsigned ** const pins,
|
||||
unsigned * const num_pins)
|
||||
const unsigned **pins,
|
||||
unsigned *num_pins)
|
||||
{
|
||||
*pins = (unsigned *) foo_groups[selector].pins;
|
||||
*num_pins = foo_groups[selector].num_pins;
|
||||
|
|
@ -1060,7 +1059,7 @@ The semantics of the pinctrl APIs are:
|
|||
|
||||
Usually the pin control core handled the get/put pair and call out to the
|
||||
device drivers bookkeeping operations, like checking available functions and
|
||||
the associated pins, whereas the enable/disable pass on to the pin controller
|
||||
the associated pins, whereas select_state pass on to the pin controller
|
||||
driver which takes care of activating and/or deactivating the mux setting by
|
||||
quickly poking some registers.
|
||||
|
||||
|
|
@ -1157,8 +1156,9 @@ function, but with different named in the mapping as described under
|
|||
"Advanced mapping" above. So that for an SPI device, we have two states named
|
||||
"pos-A" and "pos-B".
|
||||
|
||||
This snippet first muxes the function in the pins defined by group A, enables
|
||||
it, disables and releases it, and muxes it in on the pins defined by group B:
|
||||
This snippet first initializes a state object for both groups (in foo_probe()),
|
||||
then muxes the function in the pins defined by group A, and finally muxes it in
|
||||
on the pins defined by group B:
|
||||
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -21,10 +21,11 @@ ALC267/268
|
|||
==========
|
||||
N/A
|
||||
|
||||
ALC269
|
||||
ALC269/270/275/276/280/282
|
||||
======
|
||||
laptop-amic Laptops with analog-mic input
|
||||
laptop-dmic Laptops with digital-mic input
|
||||
lenovo-dock Enables docking station I/O for some Lenovos
|
||||
|
||||
ALC662/663/272
|
||||
==============
|
||||
|
|
@ -46,6 +47,7 @@ ALC882/883/885/888/889
|
|||
acer-aspire-4930g Acer Aspire 4930G/5930G/6530G/6930G/7730G
|
||||
acer-aspire-8930g Acer Aspire 8330G/6935G
|
||||
acer-aspire Acer Aspire others
|
||||
no-primary-hp VAIO Z workaround (for fixed speaker DAC)
|
||||
|
||||
ALC861/660
|
||||
==========
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
Everything you ever wanted to know about Linux 2.6 -stable releases.
|
||||
Everything you ever wanted to know about Linux -stable releases.
|
||||
|
||||
Rules on what kind of patches are accepted, and which ones are not, into the
|
||||
"-stable" tree:
|
||||
|
|
@ -12,6 +12,12 @@ Rules on what kind of patches are accepted, and which ones are not, into the
|
|||
marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
|
||||
security issue, or some "oh, that's not good" issue. In short, something
|
||||
critical.
|
||||
- Serious issues as reported by a user of a distribution kernel may also
|
||||
be considered if they fix a notable performance or interactivity issue.
|
||||
As these fixes are not as obvious and have a higher risk of a subtle
|
||||
regression they should only be submitted by a distribution kernel
|
||||
maintainer and include an addendum linking to a bugzilla entry if it
|
||||
exists and additional information on the user-visible impact.
|
||||
- New device IDs and quirks are also accepted.
|
||||
- No "theoretical race condition" issues, unless an explanation of how the
|
||||
race can be exploited is also provided.
|
||||
|
|
@ -23,6 +29,9 @@ Rules on what kind of patches are accepted, and which ones are not, into the
|
|||
|
||||
Procedure for submitting patches to the -stable tree:
|
||||
|
||||
- If the patch covers files in net/ or drivers/net please follow netdev stable
|
||||
submission guidelines as described in
|
||||
Documentation/networking/netdev-FAQ.txt
|
||||
- Send the patch, after verifying that it follows the above rules, to
|
||||
stable@vger.kernel.org. You must note the upstream commit ID in the
|
||||
changelog of your submission, as well as the kernel version you wish
|
||||
|
|
@ -36,10 +45,10 @@ Procedure for submitting patches to the -stable tree:
|
|||
cherry-picked than this can be specified in the following format in
|
||||
the sign-off area:
|
||||
|
||||
Cc: <stable@vger.kernel.org> # .32.x: a1f84a3: sched: Check for idle
|
||||
Cc: <stable@vger.kernel.org> # .32.x: 1b9508f: sched: Rate-limit newidle
|
||||
Cc: <stable@vger.kernel.org> # .32.x: fd21073: sched: Fix affinity logic
|
||||
Cc: <stable@vger.kernel.org> # .32.x
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x: a1f84a3: sched: Check for idle
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x: 1b9508f: sched: Rate-limit newidle
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x: fd21073: sched: Fix affinity logic
|
||||
Cc: <stable@vger.kernel.org> # 3.3.x
|
||||
Signed-off-by: Ingo Molnar <mingo@elte.hu>
|
||||
|
||||
The tag sequence has the meaning of:
|
||||
|
|
@ -73,6 +82,15 @@ Review cycle:
|
|||
security kernel team, and not go through the normal review cycle.
|
||||
Contact the kernel security team for more details on this procedure.
|
||||
|
||||
Trees:
|
||||
|
||||
- The queues of patches, for both completed versions and in progress
|
||||
versions can be found at:
|
||||
http://git.kernel.org/?p=linux/kernel/git/stable/stable-queue.git
|
||||
- The finalized and tagged releases of all stable kernels can be found
|
||||
in separate branches per version at:
|
||||
http://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git
|
||||
|
||||
|
||||
Review committee:
|
||||
|
||||
|
|
|
|||
|
|
@ -310,13 +310,24 @@ Default value is "/sbin/hotplug".
|
|||
kptr_restrict:
|
||||
|
||||
This toggle indicates whether restrictions are placed on
|
||||
exposing kernel addresses via /proc and other interfaces. When
|
||||
kptr_restrict is set to (0), there are no restrictions. When
|
||||
kptr_restrict is set to (1), the default, kernel pointers
|
||||
printed using the %pK format specifier will be replaced with 0's
|
||||
unless the user has CAP_SYSLOG. When kptr_restrict is set to
|
||||
(2), kernel pointers printed using %pK will be replaced with 0's
|
||||
regardless of privileges.
|
||||
exposing kernel addresses via /proc and other interfaces.
|
||||
|
||||
When kptr_restrict is set to (0), the default, there are no restrictions.
|
||||
|
||||
When kptr_restrict is set to (1), kernel pointers printed using the %pK
|
||||
format specifier will be replaced with 0's unless the user has CAP_SYSLOG
|
||||
and effective user and group ids are equal to the real ids. This is
|
||||
because %pK checks are done at read() time rather than open() time, so
|
||||
if permissions are elevated between the open() and the read() (e.g via
|
||||
a setuid binary) then %pK will not leak kernel pointers to unprivileged
|
||||
users. Note, this is a temporary solution only. The correct long-term
|
||||
solution is to do the permission checks at open() time. Consider removing
|
||||
world read permissions from files that use %pK, and using dmesg_restrict
|
||||
to protect against uses of %pK in dmesg(8) if leaking kernel pointer
|
||||
values to unprivileged users is a concern.
|
||||
|
||||
When kptr_restrict is set to (2), kernel pointers printed using
|
||||
%pK will be replaced with 0's regardless of privileges.
|
||||
|
||||
==============================================================
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,8 @@ ffffc90000000000 - ffffe8ffffffffff (=45 bits) vmalloc/ioremap space
|
|||
ffffe90000000000 - ffffe9ffffffffff (=40 bits) hole
|
||||
ffffea0000000000 - ffffeaffffffffff (=40 bits) virtual memory map (1TB)
|
||||
... unused hole ...
|
||||
ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks
|
||||
... unused hole ...
|
||||
ffffffff80000000 - ffffffffa0000000 (=512 MB) kernel text mapping, from phys 0
|
||||
ffffffffa0000000 - fffffffffff00000 (=1536 MB) module mapping space
|
||||
|
||||
|
|
|
|||
|
|
@ -237,7 +237,7 @@ kernel.org网站的pub/linux/kernel/v2.6/目录下找到它。它的开发遵循
|
|||
如果没有2.6.x.y版本内核存在，那么最新的2.6.x版本内核就相当于是当前的稳定
|
||||
版内核。
|
||||
|
||||
2.6.x.y版本由“稳定版”小组（邮件地址<stable@kernel.org>）维护，一般隔周发
|
||||
2.6.x.y版本由“稳定版”小组（邮件地址<stable@vger.kernel.org>）维护，一般隔周发
|
||||
布新版本。
|
||||
|
||||
内核源码中的Documentation/stable_kernel_rules.txt文件具体描述了可被稳定
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ Documentation/stable_kernel_rules.txt 的中文翻译
|
|||
|
||||
向稳定版代码树提交补丁的过程：
|
||||
|
||||
- 在确认了补丁符合以上的规则后，将补丁发送到stable@kernel.org。
|
||||
- 在确认了补丁符合以上的规则后，将补丁发送到stable@vger.kernel.org。
|
||||
- 如果补丁被接受到队列里，发送者会收到一个ACK回复，如果没有被接受，收
|
||||
到的是NAK回复。回复需要几天的时间，这取决于开发者的时间安排。
|
||||
- 被接受的补丁会被加到稳定版本队列里，等待其他开发者的审查。
|
||||
|
|
|
|||
|
|
@ -2627,7 +2627,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/i825xx/eexpress.*
|
||||
|
||||
ETHERNET BRIDGE
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: bridge@lists.linux-foundation.org
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net:Bridge
|
||||
|
|
@ -4319,7 +4319,7 @@ S: Maintained
|
|||
|
||||
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
|
||||
M: Mirko Lindner <mlindner@marvell.com>
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/ethernet/marvell/sk*
|
||||
|
|
@ -4570,7 +4570,7 @@ S: Supported
|
|||
F: drivers/infiniband/hw/nes/
|
||||
|
||||
NETEM NETWORK EMULATOR
|
||||
M: Stephen Hemminger <shemminger@vyatta.com>
|
||||
M: Stephen Hemminger <stephen@networkplumber.org>
|
||||
L: netem@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: net/sched/sch_netem.c
|
||||
|
|
@ -5573,7 +5573,7 @@ F: Documentation/blockdev/ramdisk.txt
|
|||
F: drivers/block/brd.c
|
||||
|
||||
RANDOM NUMBER DRIVER
|
||||
M: Matt Mackall <mpm@selenic.com>
|
||||
M: Theodore Ts'o" <tytso@mit.edu>
|
||||
S: Maintained
|
||||
F: drivers/char/random.c
|
||||
|
||||
|
|
@ -6397,6 +6397,7 @@ STABLE BRANCH
|
|||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
L: stable@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/stable_kernel_rules.txt
|
||||
|
||||
STAGING SUBSYSTEM
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,6 +1,6 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
SUBLEVEL = 113
|
||||
EXTRAVERSION =
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
|
|
@ -599,6 +599,8 @@ KBUILD_CFLAGS += -fomit-frame-pointer
|
|||
endif
|
||||
endif
|
||||
|
||||
KBUILD_CFLAGS += $(call cc-option, -fno-var-tracking-assignments)
|
||||
|
||||
ifdef CONFIG_DEBUG_INFO
|
||||
KBUILD_CFLAGS += -g
|
||||
KBUILD_AFLAGS += -gdwarf-2
|
||||
|
|
|
|||
|
|
@ -489,6 +489,11 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
|
|||
}
|
||||
#endif
|
||||
|
||||
#define ioread16be(p) be16_to_cpu(ioread16(p))
|
||||
#define ioread32be(p) be32_to_cpu(ioread32(p))
|
||||
#define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))
|
||||
#define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))
|
||||
|
||||
#define inb_p inb
|
||||
#define inw_p inw
|
||||
#define inl_p inl
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@ static int pci_mmap_resource(struct kobject *kobj,
|
|||
if (iomem_is_exclusive(res->start))
|
||||
return -EINVAL;
|
||||
|
||||
pcibios_resource_to_bus(pdev, &bar, res);
|
||||
pcibios_resource_to_bus(pdev->bus, &bar, res);
|
||||
vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
|
||||
mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
|
||||
|
||||
|
|
@ -140,7 +140,7 @@ static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
|
|||
long dense_offset;
|
||||
unsigned long sparse_size;
|
||||
|
||||
pcibios_resource_to_bus(pdev, &bar, &pdev->resource[num]);
|
||||
pcibios_resource_to_bus(pdev->bus, &bar, &pdev->resource[num]);
|
||||
|
||||
/* All core logic chips have 4G sparse address space, except
|
||||
CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
|
||||
|
|
|
|||
|
|
@ -149,6 +149,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
if (unlikely(fault & VM_FAULT_ERROR)) {
|
||||
if (fault & VM_FAULT_OOM)
|
||||
goto out_of_memory;
|
||||
else if (fault & VM_FAULT_SIGSEGV)
|
||||
goto bad_area;
|
||||
else if (fault & VM_FAULT_SIGBUS)
|
||||
goto do_sigbus;
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/special_insns.h>
|
||||
|
||||
#include "op_impl.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
config ARM
|
||||
bool
|
||||
default y
|
||||
select HAVE_AOUT
|
||||
select HAVE_DMA_API_DEBUG
|
||||
select HAVE_IDE if PCI || ISA || PCMCIA
|
||||
select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
|
||||
|
|
@ -619,7 +618,7 @@ config ARCH_IXP4XX
|
|||
select ARCH_HAS_DMA_SET_COHERENT_MASK
|
||||
select CLKSRC_MMIO
|
||||
select CPU_XSCALE
|
||||
select GENERIC_GPIO
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select MIGHT_HAVE_PCI
|
||||
select NEED_MACH_IO_H
|
||||
|
|
@ -642,6 +641,7 @@ config ARCH_KIRKWOOD
|
|||
bool "Marvell Kirkwood"
|
||||
select CPU_FEROCEON
|
||||
select PCI
|
||||
select PCI_QUIRKS
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select NEED_MACH_IO_H
|
||||
|
|
@ -1498,6 +1498,16 @@ config KSAPI
|
|||
Scorpion processor supported hardware performance counters on a per
|
||||
thread basis or AXI counters on an overall system basis.
|
||||
|
||||
config ARM_ERRATA_775420
|
||||
bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 775420 Cortex-A9 (r2p2,
|
||||
r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
|
||||
operation aborts with MMU exception, it might cause the processor
|
||||
to deadlock. This workaround puts DSB before executing ISB if
|
||||
an abort may occur on cache maintenance.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
|
@ -2294,6 +2304,7 @@ source "drivers/cpufreq/Kconfig"
|
|||
config CPU_FREQ_IMX
|
||||
tristate "CPUfreq driver for i.MX CPUs"
|
||||
depends on ARCH_MXC && CPU_FREQ
|
||||
select CPU_FREQ_TABLE
|
||||
help
|
||||
This enables the CPUfreq driver for i.MX CPUs.
|
||||
|
||||
|
|
|
|||
|
|
@ -53,6 +53,14 @@ endif
|
|||
|
||||
comma = ,
|
||||
|
||||
#
|
||||
# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and
|
||||
# later may result in code being generated that handles signed short and signed
|
||||
# char struct members incorrectly. So disable it.
|
||||
# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932)
|
||||
#
|
||||
KBUILD_CFLAGS += $(call cc-option,-fno-ipa-sra)
|
||||
|
||||
# This selects which instruction set is used.
|
||||
# Note that GCC does not numerically define an architecture version
|
||||
# macro, but instead defines a whole series of macros which makes
|
||||
|
|
|
|||
|
|
@ -131,7 +131,6 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
|
|||
endif
|
||||
|
||||
ccflags-y := -fpic -fno-builtin -I$(obj)
|
||||
asflags-y := -Wa,-march=all
|
||||
|
||||
# Supply kernel BSS size to the decompressor via a linker symbol.
|
||||
KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
|
||||
|
|
|
|||
|
|
@ -11,6 +11,7 @@
|
|||
#include <asm/mach-types.h>
|
||||
|
||||
.section ".start", "ax"
|
||||
.arch armv4
|
||||
|
||||
__SA1100_start:
|
||||
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
|
||||
.section ".start", "ax"
|
||||
|
||||
.arch armv4
|
||||
b __beginning
|
||||
|
||||
__ofw_data: .long 0 @ the number of memory blocks
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@
|
|||
*/
|
||||
#include <linux/linkage.h>
|
||||
|
||||
.arch armv7-a
|
||||
/*
|
||||
* Debugging stuff
|
||||
*
|
||||
|
|
@ -699,6 +700,7 @@ __armv7_mmu_cache_on:
|
|||
mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
|
||||
#endif
|
||||
mrc p15, 0, r0, c1, c0, 0 @ read control reg
|
||||
bic r0, r0, #1 << 28 @ clear SCTLR.TRE
|
||||
orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
|
||||
orr r0, r0, #0x003c @ write buffer
|
||||
#ifdef CONFIG_MMU
|
||||
|
|
|
|||
|
|
@ -208,7 +208,7 @@
|
|||
|
||||
fec: fec@1002b000 {
|
||||
compatible = "fsl,imx27-fec";
|
||||
reg = <0x1002b000 0x4000>;
|
||||
reg = <0x1002b000 0x1000>;
|
||||
interrupts = <50>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -29,8 +29,8 @@
|
|||
aips@70000000 { /* aips-1 */
|
||||
spba@70000000 {
|
||||
esdhc@70004000 { /* ESDHC1 */
|
||||
fsl,cd-internal;
|
||||
fsl,wp-internal;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,45 +0,0 @@
|
|||
/* a.out coredump register dumper
|
||||
*
|
||||
* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
|
||||
* Written by David Howells (dhowells@redhat.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public Licence
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the Licence, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _ASM_A_OUT_CORE_H
|
||||
#define _ASM_A_OUT_CORE_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <linux/user.h>
|
||||
#include <linux/elfcore.h>
|
||||
|
||||
/*
|
||||
* fill in the user structure for an a.out core dump
|
||||
*/
|
||||
static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
|
||||
dump->magic = CMAGIC;
|
||||
dump->start_code = tsk->mm->start_code;
|
||||
dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
|
||||
|
||||
dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
|
||||
dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
dump->u_ssize = 0;
|
||||
|
||||
memset(dump->u_debugreg, 0, sizeof(dump->u_debugreg));
|
||||
|
||||
if (dump->start_stack < 0x04000000)
|
||||
dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
|
||||
|
||||
dump->regs = *regs;
|
||||
dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_A_OUT_CORE_H */
|
||||
|
|
@ -1,34 +0,0 @@
|
|||
#ifndef __ARM_A_OUT_H__
|
||||
#define __ARM_A_OUT_H__
|
||||
|
||||
#include <linux/personality.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
struct exec
|
||||
{
|
||||
__u32 a_info; /* Use macros N_MAGIC, etc for access */
|
||||
__u32 a_text; /* length of text, in bytes */
|
||||
__u32 a_data; /* length of data, in bytes */
|
||||
__u32 a_bss; /* length of uninitialized data area for file, in bytes */
|
||||
__u32 a_syms; /* length of symbol table data in file, in bytes */
|
||||
__u32 a_entry; /* start address */
|
||||
__u32 a_trsize; /* length of relocation info for text, in bytes */
|
||||
__u32 a_drsize; /* length of relocation info for data, in bytes */
|
||||
};
|
||||
|
||||
/*
|
||||
* This is always the same
|
||||
*/
|
||||
#define N_TXTADDR(a) (0x00008000)
|
||||
|
||||
#define N_TRSIZE(a) ((a).a_trsize)
|
||||
#define N_DRSIZE(a) ((a).a_drsize)
|
||||
#define N_SYMSIZE(a) ((a).a_syms)
|
||||
|
||||
#define M_ARM 103
|
||||
|
||||
#ifndef LIBRARY_START_TEXT
|
||||
#define LIBRARY_START_TEXT (0x00c00000)
|
||||
#endif
|
||||
|
||||
#endif /* __A_OUT_GNU_H__ */
|
||||
|
|
@ -233,6 +233,7 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *,
|
|||
static inline void __flush_icache_all(void)
|
||||
{
|
||||
__flush_icache_preferred();
|
||||
dsb();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -251,7 +252,9 @@ static inline void vivt_flush_cache_mm(struct mm_struct *mm)
|
|||
static inline void
|
||||
vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
|
||||
{
|
||||
if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
|
||||
struct mm_struct *mm = vma->vm_mm;
|
||||
|
||||
if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
|
||||
__cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
|
||||
vma->vm_flags);
|
||||
}
|
||||
|
|
@ -259,7 +262,9 @@ vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
|
|||
static inline void
|
||||
vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
|
||||
{
|
||||
if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
|
||||
struct mm_struct *mm = vma->vm_mm;
|
||||
|
||||
if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) {
|
||||
unsigned long addr = user_addr & PAGE_MASK;
|
||||
__cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
|
||||
}
|
||||
|
|
@ -337,9 +342,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
|
|||
}
|
||||
|
||||
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
|
||||
static inline void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
}
|
||||
extern void flush_kernel_dcache_page(struct page *);
|
||||
|
||||
#define flush_dcache_mmap_lock(mapping) \
|
||||
spin_lock_irq(&(mapping)->tree_lock)
|
||||
|
|
|
|||
|
|
@ -156,7 +156,7 @@
|
|||
/* Select the best insn combination to perform the */ \
|
||||
/* actual __m * __n / (__p << 64) operation. */ \
|
||||
if (!__c) { \
|
||||
asm ( "umull %Q0, %R0, %1, %Q2\n\t" \
|
||||
asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
|
||||
"mov %Q0, #0" \
|
||||
: "=&r" (__res) \
|
||||
: "r" (__m), "r" (__n) \
|
||||
|
|
|
|||
|
|
@ -116,7 +116,7 @@ int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs);
|
|||
the loader. We need to make sure that it is out of the way of the program
|
||||
that it will "exec", and that there is sufficient room for the brk. */
|
||||
|
||||
#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
|
||||
#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2)
|
||||
|
||||
/* When the program starts, a1 contains a pointer to a function to be
|
||||
registered with atexit, as per the SVR4 ABI. A value of 0 means we
|
||||
|
|
|
|||
|
|
@ -18,11 +18,12 @@
|
|||
#define HWCAP_THUMBEE (1 << 11)
|
||||
#define HWCAP_NEON (1 << 12)
|
||||
#define HWCAP_VFPv3 (1 << 13)
|
||||
#define HWCAP_VFPv3D16 (1 << 14)
|
||||
#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
|
||||
#define HWCAP_TLS (1 << 15)
|
||||
#define HWCAP_VFPv4 (1 << 16)
|
||||
#define HWCAP_IDIVA (1 << 17)
|
||||
#define HWCAP_IDIVT (1 << 18)
|
||||
#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
|
||||
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
|
||||
#define HWCAP_LPAE (1 << 20)
|
||||
#define HWCAP_EVTSTRM (1 << 21)
|
||||
|
|
|
|||
|
|
@ -7,129 +7,10 @@
|
|||
*/
|
||||
#ifndef _ASM_MUTEX_H
|
||||
#define _ASM_MUTEX_H
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
/* On pre-ARMv6 hardware the swp based implementation is the most efficient. */
|
||||
# include <asm-generic/mutex-xchg.h>
|
||||
#else
|
||||
|
||||
/*
|
||||
* Attempting to lock a mutex on ARMv6+ can be done with a bastardized
|
||||
* atomic decrement (it is not a reliable atomic decrement but it satisfies
|
||||
* the defined semantics for our purpose, while being smaller and faster
|
||||
* than a real atomic decrement or atomic swap. The idea is to attempt
|
||||
* decrementing the lock value only once. If once decremented it isn't zero,
|
||||
* or if its store-back fails due to a dispute on the exclusive store, we
|
||||
* simply bail out immediately through the slow path where the lock will be
|
||||
* reattempted until it succeeds.
|
||||
* On pre-ARMv6 hardware this results in a swp-based implementation,
|
||||
* which is the most efficient. For ARMv6+, we emit a pair of exclusive
|
||||
* accesses instead.
|
||||
*/
|
||||
static inline void
|
||||
__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
|
||||
{
|
||||
int __ex_flag, __res;
|
||||
|
||||
__asm__ (
|
||||
|
||||
"ldrex %0, [%2] \n\t"
|
||||
"sub %0, %0, #1 \n\t"
|
||||
"strex %1, %0, [%2] "
|
||||
|
||||
: "=&r" (__res), "=&r" (__ex_flag)
|
||||
: "r" (&(count)->counter)
|
||||
: "cc","memory" );
|
||||
|
||||
__res |= __ex_flag;
|
||||
if (unlikely(__res != 0))
|
||||
fail_fn(count);
|
||||
else
|
||||
smp_rmb();
|
||||
}
|
||||
|
||||
static inline int
|
||||
__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
|
||||
{
|
||||
int __ex_flag, __res;
|
||||
|
||||
__asm__ (
|
||||
|
||||
"ldrex %0, [%2] \n\t"
|
||||
"sub %0, %0, #1 \n\t"
|
||||
"strex %1, %0, [%2] "
|
||||
|
||||
: "=&r" (__res), "=&r" (__ex_flag)
|
||||
: "r" (&(count)->counter)
|
||||
: "cc","memory" );
|
||||
|
||||
__res |= __ex_flag;
|
||||
if (unlikely(__res != 0))
|
||||
__res = fail_fn(count);
|
||||
else
|
||||
smp_rmb();
|
||||
|
||||
return __res;
|
||||
}
|
||||
|
||||
/*
|
||||
* Same trick is used for the unlock fast path. However the original value,
|
||||
* rather than the result, is used to test for success in order to have
|
||||
* better generated assembly.
|
||||
*/
|
||||
static inline void
|
||||
__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
|
||||
{
|
||||
int __ex_flag, __res, __orig;
|
||||
|
||||
smp_wmb();
|
||||
__asm__ (
|
||||
|
||||
"ldrex %0, [%3] \n\t"
|
||||
"add %1, %0, #1 \n\t"
|
||||
"strex %2, %1, [%3] "
|
||||
|
||||
: "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
|
||||
: "r" (&(count)->counter)
|
||||
: "cc","memory" );
|
||||
|
||||
__orig |= __ex_flag;
|
||||
if (unlikely(__orig != 0))
|
||||
fail_fn(count);
|
||||
}
|
||||
|
||||
/*
|
||||
* If the unlock was done on a contended lock, or if the unlock simply fails
|
||||
* then the mutex remains locked.
|
||||
*/
|
||||
#define __mutex_slowpath_needs_to_unlock() 1
|
||||
|
||||
/*
|
||||
* For __mutex_fastpath_trylock we use another construct which could be
|
||||
* described as a "single value cmpxchg".
|
||||
*
|
||||
* This provides the needed trylock semantics like cmpxchg would, but it is
|
||||
* lighter and less generic than a true cmpxchg implementation.
|
||||
*/
|
||||
static inline int
|
||||
__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
|
||||
{
|
||||
int __ex_flag, __res, __orig;
|
||||
|
||||
__asm__ (
|
||||
|
||||
"1: ldrex %0, [%3] \n\t"
|
||||
"subs %1, %0, #1 \n\t"
|
||||
"strexeq %2, %1, [%3] \n\t"
|
||||
"movlt %0, #0 \n\t"
|
||||
"cmpeq %2, #0 \n\t"
|
||||
"bgt 1b "
|
||||
|
||||
: "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
|
||||
: "r" (&count->counter)
|
||||
: "cc", "memory" );
|
||||
if (__orig)
|
||||
smp_rmb();
|
||||
|
||||
return __orig;
|
||||
}
|
||||
|
||||
#endif
|
||||
#include <asm-generic/mutex-xchg.h>
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -37,10 +37,10 @@ struct outer_cache_fns {
|
|||
void (*resume)(void);
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OUTER_CACHE
|
||||
|
||||
extern struct outer_cache_fns outer_cache;
|
||||
|
||||
#ifdef CONFIG_OUTER_CACHE
|
||||
|
||||
static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
|
||||
{
|
||||
if (outer_cache.inv_range)
|
||||
|
|
|
|||
|
|
@ -60,6 +60,15 @@ extern void __pgd_error(const char *file, int line, pgd_t);
|
|||
*/
|
||||
#define FIRST_USER_ADDRESS PAGE_SIZE
|
||||
|
||||
/*
|
||||
* Use TASK_SIZE as the ceiling argument for free_pgtables() and
|
||||
* free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
|
||||
* page shared between user and kernel).
|
||||
*/
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
#define USER_PGTABLES_CEILING TASK_SIZE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The pgprot_* and protection_map entries will be fixed up in runtime
|
||||
* to include the cachable and bufferable bits based on memory policy,
|
||||
|
|
@ -212,6 +221,18 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
|
|||
#define timal2group_pte_clear(mm,addr,ptep,tima_l2group_entry_ptr) cpu_v7_timal2group_set_pte_ext(ptep, __pte(0), 0, tima_l2group_entry_ptr)
|
||||
#endif /* CONFIG_TIMA_RKP_L2_GROUP */
|
||||
|
||||
#define pte_none(pte) (!pte_val(pte))
|
||||
#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
|
||||
#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
|
||||
#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
|
||||
#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
|
||||
#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
|
||||
#define pte_special(pte) (0)
|
||||
|
||||
#define pte_present_user(pte) \
|
||||
((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
|
||||
(L_PTE_PRESENT | L_PTE_USER))
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
static inline void __sync_icache_dcache(pte_t pteval)
|
||||
{
|
||||
|
|
@ -223,12 +244,13 @@ extern void __sync_icache_dcache(pte_t pteval);
|
|||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pteval)
|
||||
{
|
||||
if (addr >= TASK_SIZE)
|
||||
set_pte_ext(ptep, pteval, 0);
|
||||
else {
|
||||
unsigned long ext = 0;
|
||||
|
||||
if (addr < TASK_SIZE && pte_present_user(pteval)) {
|
||||
__sync_icache_dcache(pteval);
|
||||
set_pte_ext(ptep, pteval, PTE_EXT_NG);
|
||||
ext |= PTE_EXT_NG;
|
||||
}
|
||||
set_pte_ext(ptep, pteval, ext);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_TIMA_RKP_L2_GROUP
|
||||
|
|
@ -256,18 +278,6 @@ static inline void timal2group_set_pte_commit(void *tima_l2group_entry_ptr,
|
|||
}
|
||||
#endif /* CONFIG_TIMA_RKP_L2_GROUP */
|
||||
|
||||
#define pte_none(pte) (!pte_val(pte))
|
||||
#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
|
||||
#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
|
||||
#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
|
||||
#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
|
||||
#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
|
||||
#define pte_special(pte) (0)
|
||||
|
||||
#define pte_present_user(pte) \
|
||||
((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
|
||||
(L_PTE_PRESENT | L_PTE_USER))
|
||||
|
||||
#define PTE_BIT_FUNC(fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
|
||||
|
||||
|
|
@ -295,13 +305,13 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|||
*
|
||||
* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
|
||||
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
|
||||
* <--------------- offset --------------------> <- type --> 0 0 0
|
||||
* <--------------- offset ----------------------> < type -> 0 0 0
|
||||
*
|
||||
* This gives us up to 63 swap files and 32GB per swap file. Note that
|
||||
* This gives us up to 31 swap files and 64GB per swap file. Note that
|
||||
* the offset field is always non-zero.
|
||||
*/
|
||||
#define __SWP_TYPE_SHIFT 3
|
||||
#define __SWP_TYPE_BITS 6
|
||||
#define __SWP_TYPE_BITS 5
|
||||
#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
|
||||
#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,6 @@ struct thread_struct {
|
|||
|
||||
#define start_thread(regs,pc,sp) \
|
||||
({ \
|
||||
unsigned long *stack = (unsigned long *)sp; \
|
||||
memset(regs->uregs, 0, sizeof(regs->uregs)); \
|
||||
if (current->personality & ADDR_LIMIT_32BIT) \
|
||||
regs->ARM_cpsr = USR_MODE; \
|
||||
|
|
@ -68,9 +67,6 @@ struct thread_struct {
|
|||
regs->ARM_cpsr |= PSR_ENDSTATE; \
|
||||
regs->ARM_pc = pc & ~1; /* pc */ \
|
||||
regs->ARM_sp = sp; /* sp */ \
|
||||
regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
|
||||
regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
|
||||
regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
|
||||
nommu_start_thread(regs); \
|
||||
})
|
||||
|
||||
|
|
|
|||
|
|
@ -127,6 +127,7 @@ struct sigaction {
|
|||
__sigrestore_t sa_restorer;
|
||||
sigset_t sa_mask; /* mask last for extensibility */
|
||||
};
|
||||
#define __ARCH_HAS_SA_RESTORER
|
||||
|
||||
struct k_sigaction {
|
||||
struct sigaction sa;
|
||||
|
|
|
|||
|
|
@ -158,8 +158,9 @@ extern int __put_user_8(void *, unsigned long long);
|
|||
#define put_user(x,p) \
|
||||
({ \
|
||||
unsigned long __limit = current_thread_info()->addr_limit - 1; \
|
||||
const typeof(*(p)) __user *__tmp_p = (p); \
|
||||
register const typeof(*(p)) __r2 asm("r2") = (x); \
|
||||
register const typeof(*(p)) __user *__p asm("r0") = (p);\
|
||||
register const typeof(*(p)) __user *__p asm("r0") = __tmp_p; \
|
||||
register unsigned long __l asm("r1") = __limit; \
|
||||
register int __e asm("r0"); \
|
||||
switch (sizeof(*(__p))) { \
|
||||
|
|
|
|||
|
|
@ -27,9 +27,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
ldceq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
@ -51,9 +51,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
stceq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
|
|||
if (!csize)
|
||||
return 0;
|
||||
|
||||
vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
|
||||
vaddr = ioremap(__pfn_to_phys(pfn), PAGE_SIZE);
|
||||
if (!vaddr)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
|||
|
|
@ -244,6 +244,19 @@ svc_preempt:
|
|||
b 1b
|
||||
#endif
|
||||
|
||||
__und_fault:
|
||||
@ Correct the PC such that it is pointing at the instruction
|
||||
@ which caused the fault. If the faulting instruction was ARM
|
||||
@ the PC will be pointing at the next instruction, and have to
|
||||
@ subtract 4. Otherwise, it is Thumb, and the PC will be
|
||||
@ pointing at the second half of the Thumb instruction. We
|
||||
@ have to subtract 2.
|
||||
ldr r2, [r0, #S_PC]
|
||||
sub r2, r2, r1
|
||||
str r2, [r0, #S_PC]
|
||||
b do_undefinstr
|
||||
ENDPROC(__und_fault)
|
||||
|
||||
.align 5
|
||||
__und_svc:
|
||||
#ifdef CONFIG_KPROBES
|
||||
|
|
@ -261,25 +274,32 @@ __und_svc:
|
|||
@
|
||||
@ r0 - instruction
|
||||
@
|
||||
#ifndef CONFIG_THUMB2_KERNEL
|
||||
#ifndef CONFIG_THUMB2_KERNEL
|
||||
ldr r0, [r4, #-4]
|
||||
#else
|
||||
mov r1, #2
|
||||
ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
|
||||
cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
|
||||
ldrhhs r9, [r4] @ bottom 16 bits
|
||||
orrhs r0, r9, r0, lsl #16
|
||||
blo __und_svc_fault
|
||||
ldrh r9, [r4] @ bottom 16 bits
|
||||
add r4, r4, #2
|
||||
str r4, [sp, #S_PC]
|
||||
orr r0, r9, r0, lsl #16
|
||||
#endif
|
||||
adr r9, BSYM(1f)
|
||||
adr r9, BSYM(__und_svc_finish)
|
||||
mov r2, r4
|
||||
bl call_fpe
|
||||
|
||||
mov r1, #4 @ PC correction to apply
|
||||
__und_svc_fault:
|
||||
mov r0, sp @ struct pt_regs *regs
|
||||
bl do_undefinstr
|
||||
bl __und_fault
|
||||
|
||||
@
|
||||
@ IRQs off again before pulling preserved data off the stack
|
||||
@
|
||||
1: disable_irq_notrace
|
||||
__und_svc_finish:
|
||||
disable_irq_notrace
|
||||
|
||||
@
|
||||
@ restore SPSR and restart the instruction
|
||||
|
|
@ -423,31 +443,33 @@ __und_usr:
|
|||
mov r2, r4
|
||||
mov r3, r5
|
||||
|
||||
@ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the
|
||||
@ faulting instruction depending on Thumb mode.
|
||||
@ r3 = regs->ARM_cpsr
|
||||
@
|
||||
@ fall through to the emulation code, which returns using r9 if
|
||||
@ it has emulated the instruction, or the more conventional lr
|
||||
@ if we are to treat this as a real undefined instruction
|
||||
@
|
||||
@ r0 - instruction
|
||||
@ The emulation code returns using r9 if it has emulated the
|
||||
@ instruction, or the more conventional lr if we are to treat
|
||||
@ this as a real undefined instruction
|
||||
@
|
||||
adr r9, BSYM(ret_from_exception)
|
||||
|
||||
@ IRQs must be enabled before attempting to read the instruction from
|
||||
@ user space since that could cause a page/translation fault if the
|
||||
@ page table was modified by another CPU.
|
||||
enable_irq
|
||||
|
||||
adr lr, BSYM(__und_usr_unknown)
|
||||
tst r3, #PSR_T_BIT @ Thumb mode?
|
||||
itet eq @ explicit IT needed for the 1f label
|
||||
subeq r4, r2, #4 @ ARM instr at LR - 4
|
||||
subne r4, r2, #2 @ Thumb instr at LR - 2
|
||||
1: ldreqt r0, [r4]
|
||||
bne __und_usr_thumb
|
||||
sub r4, r2, #4 @ ARM instr at LR - 4
|
||||
1: ldrt r0, [r4]
|
||||
#ifdef CONFIG_CPU_ENDIAN_BE8
|
||||
reveq r0, r0 @ little endian instruction
|
||||
rev r0, r0 @ little endian instruction
|
||||
#endif
|
||||
beq call_fpe
|
||||
@ r0 = 32-bit ARM instruction which caused the exception
|
||||
@ r2 = PC value for the following instruction (:= regs->ARM_pc)
|
||||
@ r4 = PC value for the faulting instruction
|
||||
@ lr = 32-bit undefined instruction function
|
||||
adr lr, BSYM(__und_usr_fault_32)
|
||||
b call_fpe
|
||||
|
||||
__und_usr_thumb:
|
||||
@ Thumb instruction
|
||||
sub r4, r2, #2 @ First half of thumb instr at LR - 2
|
||||
#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
|
||||
/*
|
||||
* Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms
|
||||
|
|
@ -461,7 +483,7 @@ __und_usr:
|
|||
ldr r5, .LCcpu_architecture
|
||||
ldr r5, [r5]
|
||||
cmp r5, #CPU_ARCH_ARMv7
|
||||
blo __und_usr_unknown
|
||||
blo __und_usr_fault_16 @ 16bit undefined instruction
|
||||
/*
|
||||
* The following code won't get run unless the running CPU really is v7, so
|
||||
* coding round the lack of ldrht on older arches is pointless. Temporarily
|
||||
|
|
@ -469,15 +491,18 @@ __und_usr:
|
|||
*/
|
||||
.arch armv6t2
|
||||
#endif
|
||||
2:
|
||||
ARM( ldrht r5, [r4], #2 )
|
||||
THUMB( ldrht r5, [r4] )
|
||||
THUMB( add r4, r4, #2 )
|
||||
2: ldrht r5, [r4]
|
||||
cmp r5, #0xe800 @ 32bit instruction if xx != 0
|
||||
blo __und_usr_unknown
|
||||
3: ldrht r0, [r4]
|
||||
blo __und_usr_fault_16 @ 16bit undefined instruction
|
||||
3: ldrht r0, [r2]
|
||||
add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
|
||||
str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
|
||||
orr r0, r0, r5, lsl #16
|
||||
adr lr, BSYM(__und_usr_fault_32)
|
||||
@ r0 = the two 16-bit Thumb instructions which caused the exception
|
||||
@ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc)
|
||||
@ r4 = PC value for the first 16-bit Thumb instruction
|
||||
@ lr = 32bit undefined instruction function
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 7
|
||||
/* If the target arch was overridden, change it back: */
|
||||
|
|
@ -488,17 +513,13 @@ __und_usr:
|
|||
#endif
|
||||
#endif /* __LINUX_ARM_ARCH__ < 7 */
|
||||
#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */
|
||||
b __und_usr_unknown
|
||||
b __und_usr_fault_16
|
||||
#endif
|
||||
UNWIND(.fnend )
|
||||
UNWIND(.fnend)
|
||||
ENDPROC(__und_usr)
|
||||
|
||||
@
|
||||
@ fallthrough to call_fpe
|
||||
@
|
||||
|
||||
/*
|
||||
* The out of line fixup for the ldrt above.
|
||||
* The out of line fixup for the ldrt instructions above.
|
||||
*/
|
||||
.pushsection .fixup, "ax"
|
||||
4: mov pc, r9
|
||||
|
|
@ -529,11 +550,12 @@ ENDPROC(__und_usr)
|
|||
* NEON handler code.
|
||||
*
|
||||
* Emulators may wish to make use of the following registers:
|
||||
* r0 = instruction opcode.
|
||||
* r2 = PC+4
|
||||
* r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
|
||||
* r2 = PC value to resume execution after successful emulation
|
||||
* r9 = normal "successful" return address
|
||||
* r10 = this threads thread_info structure.
|
||||
* r10 = this threads thread_info structure
|
||||
* lr = unrecognised instruction return address
|
||||
* IRQs disabled, FIQs enabled.
|
||||
*/
|
||||
@
|
||||
@ Fall-through from Thumb-2 __und_usr
|
||||
|
|
@ -667,11 +689,17 @@ ENTRY(no_fp)
|
|||
mov pc, lr
|
||||
ENDPROC(no_fp)
|
||||
|
||||
__und_usr_unknown:
|
||||
__und_usr_fault_32:
|
||||
mov r1, #4
|
||||
b 1f
|
||||
__und_usr_fault_16:
|
||||
mov r1, #2
|
||||
1: enable_irq
|
||||
mov r0, sp
|
||||
adr lr, BSYM(ret_from_exception)
|
||||
b do_undefinstr
|
||||
ENDPROC(__und_usr_unknown)
|
||||
b __und_fault
|
||||
ENDPROC(__und_usr_fault_32)
|
||||
ENDPROC(__und_usr_fault_16)
|
||||
|
||||
.align 5
|
||||
__pabt_usr:
|
||||
|
|
|
|||
|
|
@ -76,26 +76,21 @@
|
|||
#ifndef CONFIG_THUMB2_KERNEL
|
||||
.macro svc_exit, rpsr
|
||||
msr spsr_cxsf, \rpsr
|
||||
#if defined(CONFIG_CPU_V6)
|
||||
ldr r0, [sp]
|
||||
strex r1, r2, [sp] @ clear the exclusive monitor
|
||||
ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
|
||||
#elif defined(CONFIG_CPU_32v6K)
|
||||
clrex @ clear the exclusive monitor
|
||||
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
|
||||
#else
|
||||
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
|
||||
@ We must avoid clrex due to Cortex-A15 erratum #830321
|
||||
sub r0, sp, #4 @ uninhabited address
|
||||
strex r1, r2, [r0] @ clear the exclusive monitor
|
||||
#endif
|
||||
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
|
||||
.endm
|
||||
|
||||
.macro restore_user_regs, fast = 0, offset = 0
|
||||
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
|
||||
ldr lr, [sp, #\offset + S_PC]! @ get pc
|
||||
msr spsr_cxsf, r1 @ save in spsr_svc
|
||||
#if defined(CONFIG_CPU_V6)
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
|
||||
@ We must avoid clrex due to Cortex-A15 erratum #830321
|
||||
strex r1, r2, [sp] @ clear the exclusive monitor
|
||||
#elif defined(CONFIG_CPU_32v6K)
|
||||
clrex @ clear the exclusive monitor
|
||||
#endif
|
||||
.if \fast
|
||||
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
|
||||
|
|
@ -123,7 +118,10 @@
|
|||
.macro svc_exit, rpsr
|
||||
ldr lr, [sp, #S_SP] @ top of the stack
|
||||
ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
|
||||
clrex @ clear the exclusive monitor
|
||||
|
||||
@ We must avoid clrex due to Cortex-A15 erratum #830321
|
||||
strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
|
||||
|
||||
stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
|
||||
ldmia sp, {r0 - r12}
|
||||
mov sp, lr
|
||||
|
|
@ -132,13 +130,16 @@
|
|||
.endm
|
||||
|
||||
.macro restore_user_regs, fast = 0, offset = 0
|
||||
clrex @ clear the exclusive monitor
|
||||
mov r2, sp
|
||||
load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
|
||||
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
|
||||
ldr lr, [sp, #\offset + S_PC] @ get pc
|
||||
add sp, sp, #\offset + S_SP
|
||||
msr spsr_cxsf, r1 @ save in spsr_svc
|
||||
|
||||
@ We must avoid clrex due to Cortex-A15 erratum #830321
|
||||
strex r1, r2, [sp] @ clear the exclusive monitor
|
||||
|
||||
.if \fast
|
||||
ldmdb sp, {r1 - r12} @ get calling r1 - r12
|
||||
.else
|
||||
|
|
|
|||
|
|
@ -254,6 +254,7 @@ __create_page_tables:
|
|||
/*
|
||||
* Then map boot params address in r2 or the first 1MB (2MB with LPAE)
|
||||
* of ram if boot params address is not specified.
|
||||
* We map 2 sections in case the ATAGs/DTB crosses a section boundary.
|
||||
*/
|
||||
mov r0, r2, lsr #SECTION_SHIFT
|
||||
movs r0, r0, lsl #SECTION_SHIFT
|
||||
|
|
@ -262,6 +263,8 @@ __create_page_tables:
|
|||
add r3, r3, #PAGE_OFFSET
|
||||
add r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
|
||||
orr r6, r7, r0
|
||||
str r6, [r3], #1 << PMD_ORDER
|
||||
add r6, r6, #1 << SECTION_SHIFT
|
||||
str r6, [r3]
|
||||
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
|
|
|
|||
|
|
@ -159,6 +159,12 @@ static int debug_arch_supported(void)
|
|||
arch >= ARM_DEBUG_ARCH_V7_1;
|
||||
}
|
||||
|
||||
/* Can we determine the watchpoint access type from the fsr? */
|
||||
static int debug_exception_updates_fsr(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Determine number of WRP registers available. */
|
||||
static int get_num_wrp_resources(void)
|
||||
{
|
||||
|
|
@ -631,18 +637,35 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
|
|||
info->address &= ~alignment_mask;
|
||||
info->ctrl.len <<= offset;
|
||||
|
||||
/*
|
||||
* Currently we rely on an overflow handler to take
|
||||
* care of single-stepping the breakpoint when it fires.
|
||||
* In the case of userspace breakpoints on a core with V7 debug,
|
||||
* we can use the mismatch feature as a poor-man's hardware
|
||||
* single-step, but this only works for per-task breakpoints.
|
||||
*/
|
||||
if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) ||
|
||||
!core_has_mismatch_brps() || !bp->hw.bp_target)) {
|
||||
pr_warning("overflow handler required but none found\n");
|
||||
ret = -EINVAL;
|
||||
if (!bp->overflow_handler) {
|
||||
/*
|
||||
* Mismatch breakpoints are required for single-stepping
|
||||
* breakpoints.
|
||||
*/
|
||||
if (!core_has_mismatch_brps())
|
||||
return -EINVAL;
|
||||
|
||||
/* We don't allow mismatch breakpoints in kernel space. */
|
||||
if (arch_check_bp_in_kernelspace(bp))
|
||||
return -EPERM;
|
||||
|
||||
/*
|
||||
* Per-cpu breakpoints are not supported by our stepping
|
||||
* mechanism.
|
||||
*/
|
||||
if (!bp->hw.bp_target)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* We only support specific access types if the fsr
|
||||
* reports them.
|
||||
*/
|
||||
if (!debug_exception_updates_fsr() &&
|
||||
(info->ctrl.type == ARM_BREAKPOINT_LOAD ||
|
||||
info->ctrl.type == ARM_BREAKPOINT_STORE))
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -718,10 +741,12 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
|
|||
goto unlock;
|
||||
|
||||
/* Check that the access type matches. */
|
||||
access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W :
|
||||
HW_BREAKPOINT_R;
|
||||
if (!(access & hw_breakpoint_type(wp)))
|
||||
goto unlock;
|
||||
if (debug_exception_updates_fsr()) {
|
||||
access = (fsr & ARM_FSR_ACCESS_MASK) ?
|
||||
HW_BREAKPOINT_W : HW_BREAKPOINT_R;
|
||||
if (!(access & hw_breakpoint_type(wp)))
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
/* We have a winner. */
|
||||
info->trigger = addr;
|
||||
|
|
|
|||
|
|
@ -139,3 +139,10 @@ void machine_kexec(struct kimage *image)
|
|||
|
||||
soft_restart(reboot_code_buffer_phys);
|
||||
}
|
||||
|
||||
void arch_crash_save_vmcoreinfo(void)
|
||||
{
|
||||
#ifdef CONFIG_ARM_LPAE
|
||||
VMCOREINFO_CONFIG(ARM_LPAE);
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
|
|
@ -361,7 +361,10 @@ validate_event(struct pmu *pmu, struct pmu_hw_events *hw_events,
|
|||
if (event->pmu != pmu)
|
||||
return 0;
|
||||
|
||||
if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
|
||||
if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
|
||||
return 1;
|
||||
|
||||
if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
|
||||
return 1;
|
||||
|
||||
armpmu = to_arm_pmu(event->pmu);
|
||||
|
|
@ -1156,6 +1159,7 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
|
|||
struct frame_tail __user *tail;
|
||||
|
||||
|
||||
perf_callchain_store(entry, regs->ARM_pc);
|
||||
tail = (struct frame_tail __user *)regs->ARM_fp - 1;
|
||||
|
||||
while ((entry->nr < PERF_MAX_STACK_DEPTH) &&
|
||||
|
|
|
|||
|
|
@ -775,7 +775,7 @@ static unsigned armv7_a7_perf_cache_map[PERF_COUNT_HW_CACHE_MAX]
|
|||
/*
|
||||
* PMXEVTYPER: Event selection reg
|
||||
*/
|
||||
#define ARMV7_EVTYPE_MASK 0xc00000ff /* Mask for writable bits */
|
||||
#define ARMV7_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */
|
||||
#define ARMV7_EVTYPE_EVENT 0xff /* Mask for EVENT bits */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -316,6 +316,7 @@ void machine_shutdown(void)
|
|||
void machine_halt(void)
|
||||
{
|
||||
machine_shutdown();
|
||||
local_irq_disable();
|
||||
while (1);
|
||||
}
|
||||
|
||||
|
|
@ -341,6 +342,7 @@ void machine_restart(char *cmd)
|
|||
|
||||
/* Whoops - the platform was unable to reboot. Tell the user! */
|
||||
printk("Reboot failed -- System halted\n");
|
||||
local_irq_disable();
|
||||
while (1);
|
||||
}
|
||||
|
||||
|
|
@ -662,6 +664,7 @@ EXPORT_SYMBOL(kernel_thread);
|
|||
unsigned long get_wchan(struct task_struct *p)
|
||||
{
|
||||
struct stackframe frame;
|
||||
unsigned long stack_page;
|
||||
int count = 0;
|
||||
if (!p || p == current || p->state == TASK_RUNNING)
|
||||
return 0;
|
||||
|
|
@ -670,9 +673,11 @@ unsigned long get_wchan(struct task_struct *p)
|
|||
frame.sp = thread_saved_sp(p);
|
||||
frame.lr = 0; /* recovered from the stack */
|
||||
frame.pc = thread_saved_pc(p);
|
||||
stack_page = (unsigned long)task_stack_page(p);
|
||||
do {
|
||||
int ret = unwind_frame(&frame);
|
||||
if (ret < 0)
|
||||
if (frame.sp < stack_page ||
|
||||
frame.sp >= stack_page + THREAD_SIZE ||
|
||||
unwind_frame(&frame) < 0)
|
||||
return 0;
|
||||
if (!in_sched_functions(frame.pc))
|
||||
return frame.pc;
|
||||
|
|
|
|||
|
|
@ -440,12 +440,17 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
|
|||
*/
|
||||
thumb = handler & 1;
|
||||
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
#if __LINUX_ARM_ARCH__ >= 6
|
||||
/*
|
||||
* Clear the If-Then Thumb-2 execution state
|
||||
* ARM spec requires this to be all 000s in ARM mode
|
||||
* Snapdragon S4/Krait misbehaves on a Thumb=>ARM
|
||||
* signal transition without this.
|
||||
* Clear the If-Then Thumb-2 execution state. ARM spec
|
||||
* requires this to be all 000s in ARM mode. Snapdragon
|
||||
* S4/Krait misbehaves on a Thumb=>ARM signal transition
|
||||
* without this.
|
||||
*
|
||||
* We must do this whenever we are running on a Thumb-2
|
||||
* capable CPU, which includes ARMv6T2. However, we elect
|
||||
* to do this whenever we're on an ARMv6 or later CPU for
|
||||
* simplicity.
|
||||
*/
|
||||
cpsr &= ~PSR_IT_MASK;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -313,18 +313,24 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
|
|||
asmlinkage void __cpuinit secondary_start_kernel(void)
|
||||
{
|
||||
struct mm_struct *mm = &init_mm;
|
||||
unsigned int cpu = smp_processor_id();
|
||||
unsigned int cpu;
|
||||
|
||||
/*
|
||||
* The identity mapping is uncached (strongly ordered), so
|
||||
* switch away from it before attempting any exclusive accesses.
|
||||
*/
|
||||
cpu_switch_mm(mm->pgd, mm);
|
||||
enter_lazy_tlb(mm, current);
|
||||
local_flush_tlb_all();
|
||||
|
||||
/*
|
||||
* All kernel threads share the same mm context; grab a
|
||||
* reference and switch to it.
|
||||
*/
|
||||
cpu = smp_processor_id();
|
||||
atomic_inc(&mm->mm_count);
|
||||
current->active_mm = mm;
|
||||
cpumask_set_cpu(cpu, mm_cpumask(mm));
|
||||
cpu_switch_mm(mm->pgd, mm);
|
||||
enter_lazy_tlb(mm, current);
|
||||
local_flush_tlb_all();
|
||||
|
||||
pr_debug("CPU%u: Booted secondary processor\n", cpu);
|
||||
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ int notrace unwind_frame(struct stackframe *frame)
|
|||
high = ALIGN(low, THREAD_SIZE);
|
||||
|
||||
/* check current frame pointer is within bounds */
|
||||
if (fp < (low + 12) || fp + 4 >= high)
|
||||
if (fp < low + 12 || fp > high - 4)
|
||||
return -EINVAL;
|
||||
|
||||
/* restore the registers from the stack frame */
|
||||
|
|
@ -83,13 +83,16 @@ static int save_trace(struct stackframe *frame, void *d)
|
|||
return trace->nr_entries >= trace->max_entries;
|
||||
}
|
||||
|
||||
void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
|
||||
/* This must be noinline to so that our skip calculation works correctly */
|
||||
static noinline void __save_stack_trace(struct task_struct *tsk,
|
||||
struct stack_trace *trace, unsigned int nosched)
|
||||
{
|
||||
struct stack_trace_data data;
|
||||
struct stackframe frame;
|
||||
|
||||
data.trace = trace;
|
||||
data.skip = trace->skip;
|
||||
data.no_sched_functions = nosched;
|
||||
|
||||
if (tsk != current) {
|
||||
#ifdef CONFIG_SMP
|
||||
|
|
@ -102,7 +105,6 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
|
|||
trace->entries[trace->nr_entries++] = ULONG_MAX;
|
||||
return;
|
||||
#else
|
||||
data.no_sched_functions = 1;
|
||||
frame.fp = thread_saved_fp(tsk);
|
||||
frame.sp = thread_saved_sp(tsk);
|
||||
frame.lr = 0; /* recovered from the stack */
|
||||
|
|
@ -111,11 +113,12 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
|
|||
} else {
|
||||
register unsigned long current_sp asm ("sp");
|
||||
|
||||
data.no_sched_functions = 0;
|
||||
/* We don't want this function nor the caller */
|
||||
data.skip += 2;
|
||||
frame.fp = (unsigned long)__builtin_frame_address(0);
|
||||
frame.sp = current_sp;
|
||||
frame.lr = (unsigned long)__builtin_return_address(0);
|
||||
frame.pc = (unsigned long)save_stack_trace_tsk;
|
||||
frame.pc = (unsigned long)__save_stack_trace;
|
||||
}
|
||||
|
||||
walk_stackframe(&frame, save_trace, &data);
|
||||
|
|
@ -123,9 +126,14 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
|
|||
trace->entries[trace->nr_entries++] = ULONG_MAX;
|
||||
}
|
||||
|
||||
void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
|
||||
{
|
||||
__save_stack_trace(tsk, trace, 1);
|
||||
}
|
||||
|
||||
void save_stack_trace(struct stack_trace *trace)
|
||||
{
|
||||
save_stack_trace_tsk(current, trace);
|
||||
__save_stack_trace(current, trace, 0);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(save_stack_trace);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -109,10 +109,12 @@ static void set_segfault(struct pt_regs *regs, unsigned long addr)
|
|||
{
|
||||
siginfo_t info;
|
||||
|
||||
down_read(¤t->mm->mmap_sem);
|
||||
if (find_vma(current->mm, addr) == NULL)
|
||||
info.si_code = SEGV_MAPERR;
|
||||
else
|
||||
info.si_code = SEGV_ACCERR;
|
||||
up_read(¤t->mm->mmap_sem);
|
||||
|
||||
info.si_signo = SIGSEGV;
|
||||
info.si_errno = 0;
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/cpumask.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/node.h>
|
||||
|
|
@ -42,6 +43,7 @@
|
|||
#define MPIDR_LEVEL2_SHIFT 16
|
||||
|
||||
struct cputopo_arm cpu_topology[NR_CPUS];
|
||||
EXPORT_SYMBOL_GPL(cpu_topology);
|
||||
|
||||
const struct cpumask *cpu_coregroup_mask(int cpu)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -43,7 +43,13 @@
|
|||
|
||||
#include <trace/events/exception.h>
|
||||
|
||||
static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
|
||||
static const char *handler[]= {
|
||||
"prefetch abort",
|
||||
"data abort",
|
||||
"address exception",
|
||||
"interrupt",
|
||||
"undefined instruction",
|
||||
};
|
||||
|
||||
void *vectors_page;
|
||||
|
||||
|
|
@ -397,18 +403,10 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
|
|||
|
||||
asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int correction = thumb_mode(regs) ? 2 : 4;
|
||||
unsigned int instr;
|
||||
siginfo_t info;
|
||||
void __user *pc;
|
||||
|
||||
/*
|
||||
* According to the ARM ARM, PC is 2 or 4 bytes ahead,
|
||||
* depending whether we're in Thumb mode or not.
|
||||
* Correct this offset.
|
||||
*/
|
||||
regs->ARM_pc -= correction;
|
||||
|
||||
pc = (void __user *)instruction_pointer(regs);
|
||||
|
||||
if (processor_mode(regs) == SVC_MODE) {
|
||||
|
|
@ -423,15 +421,17 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
|
|||
#endif
|
||||
instr = *(u32 *) pc;
|
||||
} else if (thumb_mode(regs)) {
|
||||
get_user(instr, (u16 __user *)pc);
|
||||
if (get_user(instr, (u16 __user *)pc))
|
||||
goto die_sig;
|
||||
if (is_wide_instruction(instr)) {
|
||||
unsigned int instr2;
|
||||
get_user(instr2, (u16 __user *)pc+1);
|
||||
if (get_user(instr2, (u16 __user *)pc+1))
|
||||
goto die_sig;
|
||||
instr <<= 16;
|
||||
instr |= instr2;
|
||||
}
|
||||
} else {
|
||||
get_user(instr, (u32 __user *)pc);
|
||||
} else if (get_user(instr, (u32 __user *)pc)) {
|
||||
goto die_sig;
|
||||
}
|
||||
|
||||
if (call_undef_hook(regs, instr) == 0)
|
||||
|
|
@ -439,6 +439,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
|
|||
|
||||
trace_undef_instr(regs, (void *)pc);
|
||||
|
||||
die_sig:
|
||||
#ifdef CONFIG_DEBUG_USER
|
||||
if (user_debug & UDBG_UNDEFINED) {
|
||||
printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
|
||||
|
|
|
|||
|
|
@ -463,7 +463,7 @@ static struct i2c_gpio_platform_data pdata = {
|
|||
|
||||
static struct platform_device at91rm9200_twi_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = -1,
|
||||
.id = 0,
|
||||
.dev.platform_data = &pdata,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -468,7 +468,7 @@ static struct i2c_gpio_platform_data pdata = {
|
|||
|
||||
static struct platform_device at91sam9260_twi_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = -1,
|
||||
.id = 0,
|
||||
.dev.platform_data = &pdata,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -285,7 +285,7 @@ static struct i2c_gpio_platform_data pdata = {
|
|||
|
||||
static struct platform_device at91sam9261_twi_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = -1,
|
||||
.id = 0,
|
||||
.dev.platform_data = &pdata,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -542,7 +542,7 @@ static struct i2c_gpio_platform_data pdata = {
|
|||
|
||||
static struct platform_device at91sam9263_twi_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = -1,
|
||||
.id = 0,
|
||||
.dev.platform_data = &pdata,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -314,7 +314,7 @@ static struct i2c_gpio_platform_data pdata = {
|
|||
|
||||
static struct platform_device at91sam9rl_twi_device = {
|
||||
.name = "i2c-gpio",
|
||||
.id = -1,
|
||||
.id = 0,
|
||||
.dev.platform_data = &pdata,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ static inline void at91rm9200_standby(void)
|
|||
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
||||
" str %5, [%1, %2]"
|
||||
:
|
||||
: "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
|
||||
: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
|
||||
"r" (1), "r" (AT91RM9200_SDRAMC_SRR),
|
||||
"r" (lpr));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@ static void sam9_smc_cs_read(void __iomem *base,
|
|||
/* Pulse register */
|
||||
val = __raw_readl(base + AT91_SMC_PULSE);
|
||||
|
||||
config->nwe_setup = val & AT91_SMC_NWEPULSE;
|
||||
config->nwe_pulse = val & AT91_SMC_NWEPULSE;
|
||||
config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
|
||||
config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
|
||||
config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
|
||||
|
|
|
|||
|
|
@ -104,6 +104,8 @@ static void __init soc_detect(u32 dbgu_base)
|
|||
switch (socid) {
|
||||
case ARCH_ID_AT91RM9200:
|
||||
at91_soc_initdata.type = AT91_SOC_RM9200;
|
||||
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
|
||||
at91_boot_soc = at91rm9200_soc;
|
||||
break;
|
||||
|
||||
|
|
@ -146,7 +148,7 @@ static void __init soc_detect(u32 dbgu_base)
|
|||
}
|
||||
|
||||
/* at91sam9g10 */
|
||||
if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
|
||||
if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
|
||||
at91_soc_initdata.type = AT91_SOC_SAM9G10;
|
||||
at91_boot_soc = at91sam9261_soc;
|
||||
}
|
||||
|
|
@ -324,7 +326,7 @@ static void at91_dt_rstc(void)
|
|||
|
||||
of_id = of_match_node(rstc_ids, np);
|
||||
if (!of_id)
|
||||
panic("AT91: rtsc no restart function availlable\n");
|
||||
panic("AT91: rtsc no restart function available\n");
|
||||
|
||||
arm_pm_restart = of_id->data;
|
||||
|
||||
|
|
|
|||
|
|
@ -22,19 +22,9 @@
|
|||
|
||||
static struct map_desc cns3xxx_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = CNS3XXX_TC11MP_TWD_BASE_VIRT,
|
||||
.pfn = __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT,
|
||||
.pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT,
|
||||
.pfn = __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE),
|
||||
.length = SZ_4K,
|
||||
.virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
|
||||
.pfn = __phys_to_pfn(CNS3XXX_TC11MP_SCU_BASE),
|
||||
.length = SZ_8K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = CNS3XXX_TIMER1_2_3_BASE_VIRT,
|
||||
|
|
|
|||
|
|
@ -94,10 +94,10 @@
|
|||
#define RTC_INTR_STS_OFFSET 0x34
|
||||
|
||||
#define CNS3XXX_MISC_BASE 0x76000000 /* Misc Control */
|
||||
#define CNS3XXX_MISC_BASE_VIRT 0xFFF07000 /* Misc Control */
|
||||
#define CNS3XXX_MISC_BASE_VIRT 0xFB000000 /* Misc Control */
|
||||
|
||||
#define CNS3XXX_PM_BASE 0x77000000 /* Power Management Control */
|
||||
#define CNS3XXX_PM_BASE_VIRT 0xFFF08000
|
||||
#define CNS3XXX_PM_BASE_VIRT 0xFB001000
|
||||
|
||||
#define PM_CLK_GATE_OFFSET 0x00
|
||||
#define PM_SOFT_RST_OFFSET 0x04
|
||||
|
|
@ -109,7 +109,7 @@
|
|||
#define PM_PLL_HM_PD_OFFSET 0x1C
|
||||
|
||||
#define CNS3XXX_UART0_BASE 0x78000000 /* UART 0 */
|
||||
#define CNS3XXX_UART0_BASE_VIRT 0xFFF09000
|
||||
#define CNS3XXX_UART0_BASE_VIRT 0xFB002000
|
||||
|
||||
#define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */
|
||||
#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000
|
||||
|
|
@ -130,7 +130,7 @@
|
|||
#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000
|
||||
|
||||
#define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */
|
||||
#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800
|
||||
#define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFB003000
|
||||
|
||||
#define TIMER1_COUNTER_OFFSET 0x00
|
||||
#define TIMER1_AUTO_RELOAD_OFFSET 0x04
|
||||
|
|
@ -227,16 +227,16 @@
|
|||
* Testchip peripheral and fpga gic regions
|
||||
*/
|
||||
#define CNS3XXX_TC11MP_SCU_BASE 0x90000000 /* IRQ, Test chip */
|
||||
#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFF000000
|
||||
#define CNS3XXX_TC11MP_SCU_BASE_VIRT 0xFB004000
|
||||
|
||||
#define CNS3XXX_TC11MP_GIC_CPU_BASE 0x90000100 /* Test chip interrupt controller CPU interface */
|
||||
#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT 0xFF000100
|
||||
#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100)
|
||||
|
||||
#define CNS3XXX_TC11MP_TWD_BASE 0x90000600
|
||||
#define CNS3XXX_TC11MP_TWD_BASE_VIRT 0xFF000600
|
||||
#define CNS3XXX_TC11MP_TWD_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x600)
|
||||
|
||||
#define CNS3XXX_TC11MP_GIC_DIST_BASE 0x90001000 /* Test chip interrupt controller distributor */
|
||||
#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000
|
||||
#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000)
|
||||
|
||||
#define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */
|
||||
#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|||
{
|
||||
orion_ge00_init(eth_data,
|
||||
DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
|
||||
0, get_tclk());
|
||||
0, get_tclk(), 1600);
|
||||
}
|
||||
|
||||
/*****************************************************************************
|
||||
|
|
|
|||
|
|
@ -50,5 +50,6 @@
|
|||
#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c)
|
||||
|
||||
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
|
||||
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -78,6 +78,7 @@
|
|||
|
||||
/* North-South Bridge */
|
||||
#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000)
|
||||
#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000)
|
||||
|
||||
/* Cryptographic Engine */
|
||||
#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000)
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ static inline int pmu_to_irq(int pin)
|
|||
|
||||
static inline int irq_to_pmu(int irq)
|
||||
{
|
||||
if (IRQ_DOVE_PMU_START < irq && irq < NR_IRQS)
|
||||
if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
|
||||
return irq - IRQ_DOVE_PMU_START;
|
||||
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -61,8 +61,20 @@ static void pmu_irq_ack(struct irq_data *d)
|
|||
int pin = irq_to_pmu(d->irq);
|
||||
u32 u;
|
||||
|
||||
/*
|
||||
* The PMU mask register is not RW0C: it is RW. This means that
|
||||
* the bits take whatever value is written to them; if you write
|
||||
* a '1', you will set the interrupt.
|
||||
*
|
||||
* Unfortunately this means there is NO race free way to clear
|
||||
* these interrupts.
|
||||
*
|
||||
* So, let's structure the code so that the window is as small as
|
||||
* possible.
|
||||
*/
|
||||
u = ~(1 << (pin & 31));
|
||||
writel(u, PMU_INTERRUPT_CAUSE);
|
||||
u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
|
||||
writel_relaxed(u, PMU_INTERRUPT_CAUSE);
|
||||
}
|
||||
|
||||
static struct irq_chip pmu_irq_chip = {
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/page.h>
|
||||
|
|
@ -198,6 +199,8 @@ void __init footbridge_map_io(void)
|
|||
*/
|
||||
if (footbridge_cfn_mode())
|
||||
iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
|
||||
|
||||
vga_base = PCIMEM_BASE;
|
||||
}
|
||||
|
||||
void footbridge_restart(char mode, const char *cmd)
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <video/vga.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach/pci.h>
|
||||
|
|
@ -298,7 +297,6 @@ void __init dc21285_preinit(void)
|
|||
int cfn_mode;
|
||||
|
||||
pcibios_min_mem = 0x81000000;
|
||||
vga_base = PCIMEM_BASE;
|
||||
|
||||
mem_size = (unsigned int)high_memory - PAGE_OFFSET;
|
||||
for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
|
||||
#define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
|
||||
#define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
|
||||
#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
|
||||
#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR)
|
||||
|
||||
/* PLL Register Offsets */
|
||||
#define MXC_PLL_DP_CTL 0x00
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <linux/errno.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/cp15.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
int platform_cpu_kill(unsigned int cpu)
|
||||
|
|
@ -19,6 +20,28 @@ int platform_cpu_kill(unsigned int cpu)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static inline void cpu_enter_lowpower(void)
|
||||
{
|
||||
unsigned int v;
|
||||
|
||||
flush_cache_all();
|
||||
asm volatile(
|
||||
"mcr p15, 0, %1, c7, c5, 0\n"
|
||||
" mcr p15, 0, %1, c7, c10, 4\n"
|
||||
/*
|
||||
* Turn off coherency
|
||||
*/
|
||||
" mrc p15, 0, %0, c1, c0, 1\n"
|
||||
" bic %0, %0, %3\n"
|
||||
" mcr p15, 0, %0, c1, c0, 1\n"
|
||||
" mrc p15, 0, %0, c1, c0, 0\n"
|
||||
" bic %0, %0, %2\n"
|
||||
" mcr p15, 0, %0, c1, c0, 0\n"
|
||||
: "=&r" (v)
|
||||
: "r" (0), "Ir" (CR_C), "Ir" (0x40)
|
||||
: "cc");
|
||||
}
|
||||
|
||||
/*
|
||||
* platform-specific code to shutdown a CPU
|
||||
*
|
||||
|
|
@ -26,12 +49,12 @@ int platform_cpu_kill(unsigned int cpu)
|
|||
*/
|
||||
void platform_cpu_die(unsigned int cpu)
|
||||
{
|
||||
flush_cache_all();
|
||||
cpu_enter_lowpower();
|
||||
imx_enable_cpu(cpu, false);
|
||||
cpu_do_idle();
|
||||
|
||||
/* We should never return from idle */
|
||||
panic("cpu %d unexpectedly exit from shutdown\n", cpu);
|
||||
/* spin here until hardware takes it down */
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
||||
int platform_cpu_disable(unsigned int cpu)
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@
|
|||
* Memory-mapped I/O on MX21ADS base board
|
||||
*/
|
||||
#define MX21ADS_MMIO_BASE_ADDR 0xf5000000
|
||||
#define MX21ADS_MMIO_SIZE SZ_16M
|
||||
#define MX21ADS_MMIO_SIZE 0xc00000
|
||||
|
||||
#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
|
||||
(MX21ADS_MMIO_BASE_ADDR + (offset))
|
||||
|
|
|
|||
|
|
@ -366,7 +366,8 @@ static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE,
|
|||
static void cp_clcd_enable(struct clcd_fb *fb)
|
||||
{
|
||||
struct fb_var_screeninfo *var = &fb->fb.var;
|
||||
u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
|
||||
u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2
|
||||
| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;
|
||||
|
||||
if (var->bits_per_pixel <= 8 ||
|
||||
(var->bits_per_pixel == 16 && var->green.length == 5))
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <linux/clockchips.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <mach/udc.h>
|
||||
#include <mach/hardware.h>
|
||||
|
|
@ -107,7 +108,7 @@ static signed char irq2gpio[32] = {
|
|||
7, 8, 9, 10, 11, 12, -1, -1,
|
||||
};
|
||||
|
||||
int gpio_to_irq(int gpio)
|
||||
static int ixp4xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
int irq;
|
||||
|
||||
|
|
@ -117,7 +118,6 @@ int gpio_to_irq(int gpio)
|
|||
}
|
||||
return -EINVAL;
|
||||
}
|
||||
EXPORT_SYMBOL(gpio_to_irq);
|
||||
|
||||
int irq_to_gpio(unsigned int irq)
|
||||
{
|
||||
|
|
@ -383,12 +383,56 @@ static struct platform_device *ixp46x_devices[] __initdata = {
|
|||
unsigned long ixp4xx_exp_bus_size;
|
||||
EXPORT_SYMBOL(ixp4xx_exp_bus_size);
|
||||
|
||||
static int ixp4xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
gpio_line_config(gpio, IXP4XX_GPIO_IN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ixp4xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
|
||||
int level)
|
||||
{
|
||||
gpio_line_set(gpio, level);
|
||||
gpio_line_config(gpio, IXP4XX_GPIO_OUT);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ixp4xx_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
||||
{
|
||||
int value;
|
||||
|
||||
gpio_line_get(gpio, &value);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
static void ixp4xx_gpio_set_value(struct gpio_chip *chip, unsigned gpio,
|
||||
int value)
|
||||
{
|
||||
gpio_line_set(gpio, value);
|
||||
}
|
||||
|
||||
static struct gpio_chip ixp4xx_gpio_chip = {
|
||||
.label = "IXP4XX_GPIO_CHIP",
|
||||
.direction_input = ixp4xx_gpio_direction_input,
|
||||
.direction_output = ixp4xx_gpio_direction_output,
|
||||
.get = ixp4xx_gpio_get_value,
|
||||
.set = ixp4xx_gpio_set_value,
|
||||
.to_irq = ixp4xx_gpio_to_irq,
|
||||
.base = 0,
|
||||
.ngpio = 16,
|
||||
};
|
||||
|
||||
void __init ixp4xx_sys_init(void)
|
||||
{
|
||||
ixp4xx_exp_bus_size = SZ_16M;
|
||||
|
||||
platform_add_devices(ixp4xx_devices, ARRAY_SIZE(ixp4xx_devices));
|
||||
|
||||
gpiochip_add(&ixp4xx_gpio_chip);
|
||||
|
||||
if (cpu_is_ixp46x()) {
|
||||
int region;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,79 +1,2 @@
|
|||
/*
|
||||
* arch/arm/mach-ixp4xx/include/mach/gpio.h
|
||||
*
|
||||
* IXP4XX GPIO wrappers for arch-neutral GPIO calls
|
||||
*
|
||||
* Written by Milan Svoboda <msvoboda@ra.rockwell.com>
|
||||
* Based on PXA implementation by Philipp Zabel <philipp.zabel@gmail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_IXP4XX_GPIO_H
|
||||
#define __ASM_ARCH_IXP4XX_GPIO_H
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define __ARM_GPIOLIB_COMPLEX
|
||||
|
||||
static inline int gpio_request(unsigned gpio, const char *label)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void gpio_free(unsigned gpio)
|
||||
{
|
||||
might_sleep();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int gpio_direction_input(unsigned gpio)
|
||||
{
|
||||
gpio_line_config(gpio, IXP4XX_GPIO_IN);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int gpio_direction_output(unsigned gpio, int level)
|
||||
{
|
||||
gpio_line_set(gpio, level);
|
||||
gpio_line_config(gpio, IXP4XX_GPIO_OUT);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int gpio_get_value(unsigned gpio)
|
||||
{
|
||||
int value;
|
||||
|
||||
gpio_line_get(gpio, &value);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
static inline void gpio_set_value(unsigned gpio, int value)
|
||||
{
|
||||
gpio_line_set(gpio, value);
|
||||
}
|
||||
|
||||
#include <asm-generic/gpio.h> /* cansleep wrappers */
|
||||
|
||||
extern int gpio_to_irq(int gpio);
|
||||
#define gpio_to_irq gpio_to_irq
|
||||
extern int irq_to_gpio(unsigned int irq);
|
||||
|
||||
#endif
|
||||
/* empty */
|
||||
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|||
|
||||
orion_ge00_init(eth_data,
|
||||
GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
|
||||
IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
|
||||
IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk, 1600);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -101,7 +101,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
|||
|
||||
orion_ge01_init(eth_data,
|
||||
GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
|
||||
IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
|
||||
IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk, 1600);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -38,6 +38,7 @@
|
|||
#define IRQ_MASK_HIGH_OFF 0x0014
|
||||
|
||||
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
|
||||
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
|
||||
|
||||
#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
|
||||
#define L2_WRITETHROUGH 0x00000010
|
||||
|
|
|
|||
|
|
@ -80,6 +80,7 @@
|
|||
#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
|
||||
|
||||
#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
|
||||
#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
|
||||
|
||||
#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
|
||||
|
||||
|
|
|
|||
|
|
@ -212,14 +212,19 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
|
|||
return 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
|
||||
* is operating as a root complex this needs to be switched to
|
||||
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
|
||||
* the device. Decoding setup is handled by the orion code.
|
||||
*/
|
||||
static void __devinit rc_pci_fixup(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Prevent enumeration of root complex.
|
||||
*/
|
||||
if (dev->bus->parent == NULL && dev->devfn == 0) {
|
||||
int i;
|
||||
|
||||
dev->class &= 0xff;
|
||||
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
|
||||
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
|
||||
dev->resource[i].start = 0;
|
||||
dev->resource[i].end = 0;
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ static void __init qnap_ts219_init(void)
|
|||
static int __init ts219_pci_init(void)
|
||||
{
|
||||
if (machine_is_ts219())
|
||||
kirkwood_pcie_init(KW_PCIE0);
|
||||
kirkwood_pcie_init(KW_PCIE1 | KW_PCIE0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -199,7 +199,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
|
|||
{
|
||||
orion_ge00_init(eth_data,
|
||||
GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
|
||||
IRQ_MV78XX0_GE_ERR, get_tclk());
|
||||
IRQ_MV78XX0_GE_ERR, get_tclk(),
|
||||
MV643XX_TX_CSUM_DEFAULT_LIMIT);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -210,7 +211,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
|
|||
{
|
||||
orion_ge01_init(eth_data,
|
||||
GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
|
||||
NO_IRQ, get_tclk());
|
||||
NO_IRQ, get_tclk(),
|
||||
MV643XX_TX_CSUM_DEFAULT_LIMIT);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -31,5 +31,6 @@
|
|||
#define IRQ_MASK_HIGH_OFF 0x0014
|
||||
|
||||
#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
|
||||
#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -42,6 +42,7 @@
|
|||
#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
|
||||
#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
|
||||
#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000
|
||||
#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
|
||||
#define MV78XX0_CORE_REGS_SIZE SZ_16K
|
||||
|
||||
#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
|
||||
|
|
@ -59,6 +60,7 @@
|
|||
* Core-specific peripheral registers.
|
||||
*/
|
||||
#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
|
||||
#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
|
||||
|
||||
/*
|
||||
* Register Map
|
||||
|
|
|
|||
|
|
@ -63,11 +63,11 @@
|
|||
#define RX51_TSC2005_RESET_GPIO 104
|
||||
#define RX51_TSC2005_IRQ_GPIO 100
|
||||
|
||||
/* list all spi devices here */
|
||||
/* List all SPI devices here. Note that the list/probe order seems to matter! */
|
||||
enum {
|
||||
RX51_SPI_WL1251,
|
||||
RX51_SPI_MIPID, /* LCD panel */
|
||||
RX51_SPI_TSC2005, /* Touch Controller */
|
||||
RX51_SPI_MIPID, /* LCD panel */
|
||||
};
|
||||
|
||||
static struct wl12xx_platform_data wl1251_pdata;
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue