hwmon: (w83795) Fix multi-line comments
Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
Guenter Roeck
Jean Delvare
parent
72fea694c4
commit
c10b3ee8aa
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@ -72,8 +72,10 @@ MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
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#define TEMP_CRIT_HYST 2
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#define TEMP_WARN 3
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#define TEMP_WARN_HYST 4
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/* only crit and crit_hyst affect real-time alarm status
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* current crit crit_hyst warn warn_hyst */
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/*
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* only crit and crit_hyst affect real-time alarm status
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* current crit crit_hyst warn warn_hyst
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*/
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static const u16 W83795_REG_TEMP[][5] = {
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{0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
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{0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
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@ -354,26 +356,34 @@ struct w83795_data {
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u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
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u8 temp_src[3]; /* Register value */
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u8 enable_dts; /* Enable PECI and SB-TSI,
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u8 enable_dts; /*
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* Enable PECI and SB-TSI,
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* bit 0: =1 enable, =0 disable,
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* bit 1: =1 AMD SB-TSI, =0 Intel PECI */
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* bit 1: =1 AMD SB-TSI, =0 Intel PECI
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*/
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u8 has_dts; /* Enable monitor DTS temp */
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s8 dts[8]; /* Register value */
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u8 dts_read_vrlsb[8]; /* Register value */
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s8 dts_ext[4]; /* Register value */
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u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
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u8 has_pwm; /*
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* 795g supports 8 pwm, 795adg only supports 2,
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* no config register, only affected by chip
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* type */
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u8 pwm[8][5]; /* Register value, output, freq, start,
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* non stop, stop time */
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* type
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*/
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u8 pwm[8][5]; /*
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* Register value, output, freq, start,
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* non stop, stop time
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*/
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u16 clkin; /* CLKIN frequency in kHz */
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u8 pwm_fcms[2]; /* Register value */
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u8 pwm_tfmr[6]; /* Register value */
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u8 pwm_fomc; /* Register value */
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u16 target_speed[8]; /* Register value, target speed for speed
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* cruise */
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u16 target_speed[8]; /*
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* Register value, target speed for speed
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* cruise
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*/
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u8 tol_speed; /* tolerance of target speed */
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u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
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u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
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@ -482,8 +492,10 @@ static void w83795_update_limits(struct i2c_client *client)
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/* Read the fan limits */
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lsb = 0; /* Silent false gcc warning */
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for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
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/* Each register contains LSB for 2 fans, but we want to
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* read it only once to save time */
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/*
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* Each register contains LSB for 2 fans, but we want to
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* read it only once to save time
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*/
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if ((i & 1) == 0 && (data->has_fan & (3 << i)))
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lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
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@ -665,9 +677,11 @@ static struct w83795_data *w83795_update_device(struct device *dev)
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w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
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}
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/* Update intrusion and alarms
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/*
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* Update intrusion and alarms
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* It is important to read intrusion first, because reading from
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* register SMI STS6 clears the interrupt status temporarily. */
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* register SMI STS6 clears the interrupt status temporarily.
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*/
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tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
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/* Switch to interrupt status for intrusion if needed */
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if (tmp & ALARM_CTRL_RTSACS)
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@ -1603,8 +1617,10 @@ store_sf_setup(struct device *dev, struct device_attribute *attr,
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#define NOT_USED -1
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/* Don't change the attribute order, _max, _min and _beep are accessed by index
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* somewhere else in the code */
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/*
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* Don't change the attribute order, _max, _min and _beep are accessed by index
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* somewhere else in the code
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*/
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#define SENSOR_ATTR_IN(index) { \
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SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
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IN_READ, index), \
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@ -1618,8 +1634,10 @@ store_sf_setup(struct device *dev, struct device_attribute *attr,
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show_alarm_beep, store_beep, BEEP_ENABLE, \
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index + ((index > 14) ? 1 : 0)) }
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/* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code */
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/*
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* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code
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*/
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#define SENSOR_ATTR_FAN(index) { \
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SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
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NULL, FAN_INPUT, index - 1), \
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@ -1648,8 +1666,10 @@ store_sf_setup(struct device *dev, struct device_attribute *attr,
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SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
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show_fanin, store_fanin, FANIN_TARGET, index - 1) }
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/* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code */
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/*
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* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code
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*/
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#define SENSOR_ATTR_DTS(index) { \
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SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
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show_dts_mode, NULL, NOT_USED, index - 7), \
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@ -1668,8 +1688,10 @@ store_sf_setup(struct device *dev, struct device_attribute *attr,
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SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
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show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
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/* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code */
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/*
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* Don't change the attribute order, _beep is accessed by index
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* somewhere else in the code
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*/
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#define SENSOR_ATTR_TEMP(index) { \
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SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
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show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
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@ -1875,8 +1897,10 @@ static int w83795_get_device_id(struct i2c_client *client)
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device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
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/* Special case for rev. A chips; can't be checked first because later
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revisions emulate this for compatibility */
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/*
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* Special case for rev. A chips; can't be checked first because later
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* revisions emulate this for compatibility
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*/
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if (device_id < 0 || (device_id & 0xf0) != 0x50) {
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int alt_id;
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@ -1928,8 +1952,10 @@ static int w83795_detect(struct i2c_client *client,
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return -ENODEV;
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}
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/* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
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should match */
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/*
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* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
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* should match
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*/
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if ((bank & 0x07) == 0) {
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i2c_addr = i2c_smbus_read_byte_data(client,
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W83795_REG_I2C_ADDR);
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@ -1941,10 +1967,12 @@ static int w83795_detect(struct i2c_client *client,
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}
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}
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/* Check 795 chip type: 795G or 795ADG
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Usually we don't write to chips during detection, but here we don't
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quite have the choice; hopefully it's OK, we are about to return
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success anyway */
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/*
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* Check 795 chip type: 795G or 795ADG
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* Usually we don't write to chips during detection, but here we don't
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* quite have the choice; hopefully it's OK, we are about to return
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* success anyway
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*/
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if ((bank & 0x07) != 0)
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i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
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bank & ~0x07);
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@ -2193,8 +2221,10 @@ static int w83795_probe(struct i2c_client *client,
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/* The W83795G has a dedicated BEEP pin */
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data->enable_beep = 1;
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} else {
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/* The W83795ADG has a shared pin for OVT# and BEEP, so you
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* can't have both */
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/*
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* The W83795ADG has a shared pin for OVT# and BEEP, so you
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* can't have both
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*/
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tmp = w83795_read(client, W83795_REG_OVT_CFG);
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if ((tmp & OVT_CFG_SEL) == 0)
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data->enable_beep = 1;
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