260 lines
9.4 KiB
C
260 lines
9.4 KiB
C
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/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _VIBRATOR_H
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#define _VIBRATOR_H
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extern struct vibrator_platform_data vibrator_drvdata;
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struct pm_gpio vib_pwm = {
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.direction = PM_GPIO_DIR_OUT,
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.output_buffer = 0,
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.output_value = 0,
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.pull = PM_GPIO_PULL_NO,
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.vin_sel = 0,
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.out_strength = PM_GPIO_STRENGTH_HIGH,
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.function = PM_GPIO_FUNC_1,
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.inv_int_pol = 0,
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};
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/* Error and Return value codes */
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#define VIBRATION_SUCCESS 0 /* Success */
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#define VIBRATION_FAIL -1 /* Generic error */
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#define VIBRATION_ON 1
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#define VIBRATION_OFF 0
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#define DEFAULT_INTENSITY 5000
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#define MAX_INTENSITY 10000
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#if defined(CONFIG_MACH_KS01SKT) \
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|| defined(CONFIG_MACH_KS01KTT) || defined(CONFIG_MACH_KS01LGT) \
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|| defined(CONFIG_MACH_JACTIVESKT) || defined(CONFIG_MACH_HLTEDCM) \
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|| defined(CONFIG_MACH_HLTEKDI)
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#define MOTOR_STRENGTH 94/*MOTOR_STRENGTH 94 %*/
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#elif defined(CONFIG_MACH_LT03EUR) || defined(CONFIG_MACH_LT03SKT)\
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|| defined(CONFIG_MACH_LT03KTT) || defined(CONFIG_MACH_LT03LGT)
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#define MOTOR_STRENGTH 98/*MOTOR_STRENGTH 98 %*/
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#elif defined(CONFIG_MACH_PICASSO_LTE)
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#define MOTOR_STRENGTH 91
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#elif defined(CONFIG_MACH_HLTEUSC) || defined(CONFIG_MACH_HLTEVZW)
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#define MOTOR_STRENGTH 99/*MOTOR_STRENGTH 99 %*/
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#elif defined(CONFIG_MACH_KACTIVELTE_KOR)
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#define MOTOR_STRENGTH 95/*MOTOR_STRENGTH 95 %*/
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#elif defined(CONFIG_SEC_K_PROJECT) || defined(CONFIG_SEC_KACTIVE_PROJECT) || defined(CONFIG_SEC_KSPORTS_PROJECT) \
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|| defined(CONFIG_SEC_PATEK_PROJECT)
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#define MOTOR_STRENGTH 98/*MOTOR_STRENGTH 98 %*/
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#elif defined(CONFIG_SEC_S_PROJECT)
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#define MOTOR_STRENGTH 87/*MOTOR_STRENGTH 87 %*/
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#else
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#define MOTOR_STRENGTH 98/*MOTOR_STRENGTH 98 %*/
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#endif
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#if defined (CONFIG_MACH_HLTESPR) || defined (CONFIG_MACH_HLTEEUR) || defined(CONFIG_SEC_LOCALE_KOR_H) || defined (CONFIG_MACH_HLTETMO) || defined(CONFIG_MACH_H3GDUOS) || defined(CONFIG_MACH_HLTEATT)
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#define GP_CLK_M_DEFAULT 3
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#define GP_CLK_N_DEFAULT 138
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#define GP_CLK_D_DEFAULT 69 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 137
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#elif defined (CONFIG_MACH_HLTEDCM) || defined (CONFIG_MACH_HLTEKDI) || defined (CONFIG_MACH_JS01LTEDCM) || defined (CONFIG_MACH_JS01LTESBM)
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#define GP_CLK_M_DEFAULT 2
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#define GP_CLK_N_DEFAULT 92
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#define GP_CLK_D_DEFAULT 46 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 92
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#elif defined (CONFIG_MACH_HLTEUSC) || defined(CONFIG_MACH_HLTEVZW)
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#define GP_CLK_M_DEFAULT 1
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#define GP_CLK_N_DEFAULT 46
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#define GP_CLK_D_DEFAULT 23 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 46
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#elif defined(CONFIG_MACH_FLTESKT)
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#define GP_CLK_M_DEFAULT 2
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#define GP_CLK_N_DEFAULT 92
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#define GP_CLK_D_DEFAULT 46 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 92
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#elif defined(CONFIG_SEC_K_PROJECT) || defined(CONFIG_SEC_KACTIVE_PROJECT) || defined(CONFIG_SEC_KSPORTS_PROJECT) ||\
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defined(CONFIG_SEC_PATEK_PROJECT)
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#if defined(CONFIG_MACH_KLTE_MAX77828_JPN)
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#define GP_CLK_M_DEFAULT 1
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#define GP_CLK_N_DEFAULT 20
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#define GP_CLK_D_DEFAULT 10 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 20
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#else
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#define GP_CLK_M_DEFAULT 3
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#define GP_CLK_N_DEFAULT 121
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#define GP_CLK_D_DEFAULT 61 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 121
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#endif
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#elif defined(CONFIG_SEC_S_PROJECT)
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#define GP_CLK_M_DEFAULT 3
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#define GP_CLK_N_DEFAULT 121
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#define GP_CLK_D_DEFAULT 61 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 121
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#elif defined(CONFIG_SEC_LOCALE_KOR_FRESCO)
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#define GP_CLK_M_DEFAULT 3
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#define GP_CLK_N_DEFAULT 120
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#define GP_CLK_D_DEFAULT 60 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 120
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#elif defined(CONFIG_SEC_BERLUTI_PROJECT) || defined(CONFIG_MACH_S3VE3G_EUR)
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#define GP_CLK_M_DEFAULT 1
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#define GP_CLK_N_DEFAULT 61
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#define GP_CLK_D_DEFAULT 31 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 61
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#elif defined(CONFIG_MACH_HESTIALTE_EUR)
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#define GP_CLK_M_DEFAULT 1
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#define GP_CLK_N_DEFAULT 40
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#define GP_CLK_D_DEFAULT 20
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#define IMM_PWM_MULTIPLIER 40
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#else
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#define GP_CLK_M_DEFAULT 2
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#define GP_CLK_N_DEFAULT 91
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#define GP_CLK_D_DEFAULT 46 /* 50% duty cycle */
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#define IMM_PWM_MULTIPLIER 91
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#endif
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#define MOTOR_MIN_STRENGTH 54/*IMMERSION VALUE*/
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#define PM_QOS_NONIDLE_VALUE 300
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/*
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* ** Global variables for LRA PWM M,N and D values.
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* */
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int32_t g_nlra_gp_clk_m = GP_CLK_M_DEFAULT;
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int32_t g_nlra_gp_clk_n = GP_CLK_N_DEFAULT;
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int32_t g_nlra_gp_clk_d = GP_CLK_D_DEFAULT;
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int32_t g_nlra_gp_clk_pwm_mul = IMM_PWM_MULTIPLIER;
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int32_t motor_strength = MOTOR_STRENGTH;
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int32_t motor_min_strength;
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#define __inp(port) ioread8(port)
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#define __inpw(port) ioread16(port)
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#define __inpdw(port) ioread32(port)
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#define __outp(port, val) iowrite8(val, port)
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#define __outpw(port, val) iowrite16(val, port)
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#define __outpdw(port, val) iowrite32(val, port)
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#define in_dword(addr) (__inpdw(addr))
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#define in_dword_masked(addr, mask) (__inpdw(addr) & (mask))
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#define out_dword(addr, val) __outpdw(addr, val)
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#define out_dword_masked(io, mask, val, shadow) \
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(void) out_dword(io, \
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((shadow & (unsigned int)(~(mask))) | ((unsigned int)((val) & (mask)))))
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#define out_dword_masked_ns(io, mask, val, current_reg_content) \
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(void) out_dword(io, \
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((current_reg_content & (unsigned int)(~(mask))) \
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| ((unsigned int)((val) & (mask)))))
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#if !defined(CONFIG_MOTOR_DRV_ISA1400)
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static void __iomem *virt_mmss_gp1_base;
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#define HWIO_GP1_CMD_RCGR_ADDR ((void __iomem *)(virt_mmss_gp1_base + 0)) //MMSS_CC_GP1_CMD_RCGR
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#define HWIO_GP1_CFG_RCGR_ADDR ((void __iomem *)(virt_mmss_gp1_base + 4)) //MMSS_CC_GP1_CFG_RCGR
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#define HWIO_GP_M_REG_ADDR ((void __iomem *)(virt_mmss_gp1_base + 8)) //MMSS_CC_GP1_M
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#define HWIO_GP_NS_REG_ADDR ((void __iomem *)(virt_mmss_gp1_base + 0xc)) //MMSS_CC_GP1_N
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#define HWIO_GP_D_REG_ADDR ((void __iomem *)(virt_mmss_gp1_base + 0x10)) //MMSS_CC_GP1_D
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#if defined(CONFIG_MACH_HLTEDCM) || defined(CONFIG_MACH_HLTEKDI) || \
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defined(CONFIG_MACH_JS01LTEDCM) || defined(CONFIG_MACH_JS01LTESBM)
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#define HWIO_CAMSS_GP1_CBCR_ADDR ((void __iomem *)(virt_mmss_gp1_base - 0x4)) //MMSS_CC_CAMSS_GP3_CBCR
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#else
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#define HWIO_CAMSS_GP1_CBCR_ADDR ((void __iomem *)(virt_mmss_gp1_base + 0x24)) //MMSS_CC_CAMSS_GP1_CBCR
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#endif
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#define HWIO_GP_MD_REG_RMSK 0xffffffff
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#define HWIO_GP_NS_REG_RMSK 0xffffffff
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#define HWIO_GP_MD_REG_M_VAL_BMSK 0xff
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#define HWIO_GP_MD_REG_M_VAL_SHFT 0
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#define HWIO_GP_MD_REG_D_VAL_BMSK 0xff
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#define HWIO_GP_MD_REG_D_VAL_SHFT 0
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#define HWIO_GP_NS_REG_GP_N_VAL_BMSK 0xff
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#define HWIO_GP_SRC_SEL_VAL_BMSK 0x700
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#define HWIO_GP_SRC_SEL_VAL_SHFT 8
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#define HWIO_GP_SRC_DIV_VAL_BMSK 0x1f
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#define HWIO_GP_SRC_DIV_VAL_SHFT 0
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#define HWIO_GP_MODE_VAL_BMSK 0x3000
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#define HWIO_GP_MODE_VAL_SHFT 12
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#define HWIO_CLK_ENABLE_VAL_BMSK 0x1
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#define HWIO_CLK_ENABLE_VAL_SHFT 0
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#define HWIO_UPDATE_VAL_BMSK 0x1
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#define HWIO_UPDATE_VAL_SHFT 0
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#define HWIO_ROOT_EN_VAL_BMSK 0x2
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#define HWIO_ROOT_EN_VAL_SHFT 1
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#define HWIO_GP1_CMD_RCGR_IN \
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in_dword_masked(HWIO_GP1_CMD_RCGR_ADDR, HWIO_GP_NS_REG_RMSK)
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#define HWIO_GP1_CMD_RCGR_OUTM(m, v) \
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out_dword_masked_ns(HWIO_GP1_CMD_RCGR_ADDR, m, v, HWIO_GP1_CMD_RCGR_IN)
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#define HWIO_GP1_CFG_RCGR_IN \
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in_dword_masked(HWIO_GP1_CFG_RCGR_ADDR, HWIO_GP_NS_REG_RMSK)
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#define HWIO_GP1_CFG_RCGR_OUTM(m, v) \
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out_dword_masked_ns(HWIO_GP1_CFG_RCGR_ADDR, m, v, HWIO_GP1_CFG_RCGR_IN)
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#define HWIO_CAMSS_GP1_CBCR_IN \
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in_dword_masked(HWIO_CAMSS_GP1_CBCR_ADDR, HWIO_GP_NS_REG_RMSK)
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#define HWIO_CAMSS_GP1_CBCR_OUTM(m, v) \
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out_dword_masked_ns(HWIO_CAMSS_GP1_CBCR_ADDR, m, v, HWIO_CAMSS_GP1_CBCR_IN)
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#define HWIO_GP_D_REG_IN \
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in_dword_masked(HWIO_GP_D_REG_ADDR, HWIO_GP_MD_REG_RMSK)
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#define HWIO_GP_D_REG_OUTM(m, v)\
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out_dword_masked_ns(HWIO_GP_D_REG_ADDR, m, v, HWIO_GP_D_REG_IN)
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#define HWIO_GP_M_REG_IN \
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in_dword_masked(HWIO_GP_M_REG_ADDR, HWIO_GP_MD_REG_RMSK)
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#define HWIO_GP_M_REG_OUTM(m, v)\
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out_dword_masked_ns(HWIO_GP_M_REG_ADDR, m, v, HWIO_GP_M_REG_IN)
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#define HWIO_GP_NS_REG_IN \
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in_dword_masked(HWIO_GP_NS_REG_ADDR, HWIO_GP_NS_REG_RMSK)
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#define HWIO_GP_NS_REG_OUTM(m, v) \
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out_dword_masked_ns(HWIO_GP_NS_REG_ADDR, m, v, HWIO_GP_NS_REG_IN)
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#define __msmhwio_outm(hwiosym, mask, val) HWIO_##hwiosym##_OUTM(mask, val)
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#define HWIO_OUTM(hwiosym, mask, val) __msmhwio_outm(hwiosym, mask, val)
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int32_t vibe_pwm_onoff(u8 onoff);
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int32_t vibe_set_pwm_freq(int intensity);
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int vib_config_pwm_device(void);
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#endif
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#if defined(CONFIG_MOTOR_DRV_MAX77803)
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extern void max77803_vibtonz_en(bool en);
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#elif defined(CONFIG_MOTOR_DRV_MAX77804K)
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extern void max77804k_vibtonz_en(bool en);
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#elif defined(CONFIG_MOTOR_DRV_MAX77828)
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extern void max77828_vibtonz_en(bool en);
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#elif defined(CONFIG_MOTOR_DRV_MAX77888)
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void max77888_gpio_en(bool);
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void max77888_vibtonz_en(bool);
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static int32_t max77888_gpio_init(void);
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#elif defined(CONFIG_MOTOR_DRV_DRV2603)
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void drv2603_gpio_en(bool);
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static int32_t drv2603_gpio_init(void);
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#endif
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#endif /* _VIBRATOR_H */
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