android_kernel_samsung_msm8976/include/asm-x86_64/msi.h

/*
 * Copyright (C) 2003-2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#ifndef ASM_MSI_H
#define ASM_MSI_H

#include <asm/desc.h>
#include <asm/mach_apic.h>
#include <asm/smp.h>

#define LAST_DEVICE_VECTOR	(FIRST_SYSTEM_VECTOR - 1)
#define MSI_TARGET_CPU_SHIFT	12

extern struct msi_ops msi_apic_ops;

static inline int msi_arch_init(void)
{
	msi_register(&msi_apic_ops);
	return 0;
}

#endif /* ASM_MSI_H */
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! 2005-04-16 22:20:36 +00:00			`/*`
			`* Copyright (C) 2003-2004 Intel`
			`* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)`
			`*/`

			`#ifndef ASM_MSI_H`
			`#define ASM_MSI_H`

			`#include <asm/desc.h>`
			`#include <asm/mach_apic.h>`
			`#include <asm/smp.h>`

[PATCH] PCI: cleanup unused variable about msi driver In IA64 platform, msi driver does not use irq_vector variable, and in x86 platform LAST_DEVICE_VECTOR should one before FIRST_SYSTEM_VECTOR, this patch modify this. Signed-off-by: bibo, mao <bibo.mao@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 2006-05-31 10:17:33 +00:00			`#define LAST_DEVICE_VECTOR (FIRST_SYSTEM_VECTOR - 1)`
[PATCH] PCI: Change MSI to use physical delivery mode always MSI hardcoded delivery mode to use logical delivery mode. Recently x86_64 moved to use physical mode addressing to support physflat mode. With this mode enabled noticed that my eth with MSI werent working. msi_address_init() was hardcoded to use logical mode for i386 and x86_64. So when we switch to use physical mode, things stopped working. Since anyway we dont use lowest priority delivery with MSI, its always directed to just a single CPU. Its safe and simpler to use physical mode always, even when we use logical delivery mode for IPI's or other ioapic RTE's. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 2005-11-09 05:42:33 +00:00			`#define MSI_TARGET_CPU_SHIFT 12`
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! 2005-04-16 22:20:36 +00:00
[PATCH] PCI: msi abstractions and support for altix Abstract portions of the MSI core for platforms that do not use standard APIC interrupt controllers. This is implemented through a new arch-specific msi setup routine, and a set of msi ops which can be set on a per platform basis. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> 2006-04-11 02:17:48 +00:00			`extern struct msi_ops msi_apic_ops;`

			`static inline int msi_arch_init(void)`
			`{`
			`msi_register(&msi_apic_ops);`
			`return 0;`
			`}`

Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! 2005-04-16 22:20:36 +00:00			`#endif /* ASM_MSI_H */`