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mmc: core: fix possible clock gating issue during voltage switch 

During voltage sequence (for UHS SD/SDIO cards), host first sends the
voltage switch command (CMD11) to card and then host must stop the clock
at least for 5ms but currently there is a possibility (if clkgate_delay
is 0) that clock may be gated off immediately after the CMD11 response
from card and then get turned on before 5ms itself. This patch ensures
that clock is gated off at least for 5ms after receiving the card
response for voltage switch command.

Change-Id: I131b3d154adab29bef367c8ce31c2f2edd159fd2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This commit is contained in:
Subhash Jadavani 2013-09-06 19:07:07 +05:30
parent 7dfe3b6c54
commit 0160d12ad8
1 changed files with 11 additions and 4 deletions
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15
drivers/mmc/core/core.c
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@ -1866,14 +1866,20 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage)
cmd.arg = 0;
cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
/*
* Hold the clock reference so clock doesn't get auto gated during this
* voltage switch sequence.
*/
mmc_host_clk_hold(host);
err = mmc_wait_for_cmd(host, &cmd, 0);
if (err)
return err;
goto exit;
if (!mmc_host_is_spi(host) && (cmd.resp[0] & R1_ERROR))
return -EIO;
if (!mmc_host_is_spi(host) && (cmd.resp[0] & R1_ERROR)) {
err = -EIO;
goto exit;
}
mmc_host_clk_hold(host);
/*
* The card should drive cmd and dat[0:3] low immediately
* after the response of cmd11, but wait 1 ms to be sure
@ -1922,6 +1928,7 @@ power_cycle:
mmc_power_cycle(host);
}
exit:
mmc_host_clk_release(host);
return err;