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[POWERPC] Fix storcenter DTS typos, feedback, IRQs.

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Cleaned up IRQ layout and removed unsused ISU allocations.
Fixed RTC address typo from /dts-v1/ conversion.
Incorporated list suggestions to use an "iomega," vendor prefix,
and to use a node reference rather than a hard path.

Signed-off-by: Jon Loeliger <jdl@@jdl.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Jon Loeliger 2008-02-02 13:02:51 -06:00 committed by Kumar Gala
parent 03bbfe8b97
commit 0367aad1ad
2 changed files with 11 additions and 26 deletions
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12
arch/powerpc/boot/dts/storcenter.dts
View file

@ -15,7 +15,7 @@
/ { / {
model = "StorCenter"; model = "StorCenter";
compatible = "storcenter"; compatible = "iomega,storcenter";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -62,12 +62,12 @@
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <0x3000 0x100>; reg = <0x3000 0x100>;
interrupts = <5 2>; interrupts = <17 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
rtc@68 { rtc@68 {
compatible = "dallas,ds1337"; compatible = "dallas,ds1337";
reg = <68>; reg = <0x68>;
}; };
}; };
@ -78,7 +78,7 @@
reg = <0x4500 0x20>; reg = <0x4500 0x20>;
clock-frequency = <97553800>; /* Hz */ clock-frequency = <97553800>; /* Hz */
current-speed = <115200>; current-speed = <115200>;
interrupts = <9 2>; interrupts = <25 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
@ -89,7 +89,7 @@
reg = <0x4600 0x20>; reg = <0x4600 0x20>;
clock-frequency = <97553800>; /* Hz */ clock-frequency = <97553800>; /* Hz */
current-speed = <9600>; current-speed = <9600>;
interrupts = <10 2>; interrupts = <26 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
@ -136,6 +136,6 @@
}; };
chosen { chosen {
linux,stdout-path = "/soc/serial@4500"; linux,stdout-path = &serial0;
}; };
}; };

25
arch/powerpc/platforms/embedded6xx/storcenter.c
View file

@ -132,33 +132,18 @@ static void __init storcenter_init_IRQ(void)
paddr = (phys_addr_t)of_translate_address(dnp, prop); paddr = (phys_addr_t)of_translate_address(dnp, prop);
mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
4, 32, " EPIC "); 16, 32, " OpenPIC ");
of_node_put(dnp); of_node_put(dnp);
BUG_ON(mpic == NULL); BUG_ON(mpic == NULL);
/* PCI IRQs */
/* /*
* 2.6.12 patch: * 16 Serial Interrupts followed by 16 Internal Interrupts.
* openpic_set_sources(0, 5, OpenPIC_Addr + 0x10200); * I2C is the second internal, so it is at 17, 0x11020.
* openpic_set_sources(5, 2, OpenPIC_Addr + 0x11120);
* first_irq, num_irqs, __iomem first_ISR
* o_ss: i, src: 0, fdf50200
* o_ss: i, src: 1, fdf50220
* o_ss: i, src: 2, fdf50240
* o_ss: i, src: 3, fdf50260
* o_ss: i, src: 4, fdf50280
* o_ss: i, src: 5, fdf51120
* o_ss: i, src: 6, fdf51140
*/ */
mpic_assign_isu(mpic, 0, paddr + 0x10200); mpic_assign_isu(mpic, 0, paddr + 0x10200);
mpic_assign_isu(mpic, 1, paddr + 0x10220); mpic_assign_isu(mpic, 1, paddr + 0x11000);
mpic_assign_isu(mpic, 2, paddr + 0x10240);
mpic_assign_isu(mpic, 3, paddr + 0x10260);
mpic_assign_isu(mpic, 4, paddr + 0x10280);
mpic_assign_isu(mpic, 5, paddr + 0x11120);
mpic_assign_isu(mpic, 6, paddr + 0x11140);
mpic_init(mpic); mpic_init(mpic);
} }
@ -178,7 +163,7 @@ static int __init storcenter_probe(void)
{ {
unsigned long root = of_get_flat_dt_root(); unsigned long root = of_get_flat_dt_root();
return of_flat_dt_is_compatible(root, "storcenter"); return of_flat_dt_is_compatible(root, "iomega,storcenter");
} }
define_machine(storcenter){ define_machine(storcenter){