mirror of
https://github.com/team-infusion-developers/android_kernel_samsung_msm8976.git
synced 2024-11-07 04:09:21 +00:00
arm/tegra: convert tegra20 to GIC devicetree binding
Convert tegra20 IRQ intialization to the GIC devicetree binding. Modify the
interrupt definitions in the dts files according to
Documentation/devicetree/bindings/arm/gic.txt
v3 (swarren):
* Moved of_irq_init() call into board-dt.c to avoid ifdef'ing it.
- Even with a dummy replacement if !CONFIG_OF, the reference from
tegra_dt_irq_match[] to gic_of_init() would still have to be ifdef'd
- It's plausible that tegra_dt_irq_match[] may need to contain more
entries in the future, and defining what they are seems more suitable
for board-dt.c than irq.c
v2 (swarren):
* Removed some stale GIC init code from board-dt.c
* Undid some accidental 0x -> 0x0 search/replace.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[olof: added include of <asm/hardware/gic.h> for compile to pass]
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
pdeschrijver@nvidia.com
Olof Johansson
parent
1292c12959
commit
0d4f74792e
4 changed files with 49 additions and 36 deletions
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@ -27,7 +27,7 @@
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#size-cells = <0>;
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compatible = "nvidia,nvec";
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reg = <0x7000C500 0x100>;
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interrupts = <124>;
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interrupts = <0 92 0x04>;
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clock-frequency = <80000>;
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request-gpios = <&gpio 170 0>;
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slave-addr = <138>;
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@ -5,9 +5,9 @@
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interrupt-parent = <&intc>;
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intc: interrupt-controller@50041000 {
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compatible = "nvidia,tegra20-gic";
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compatible = "arm,cortex-a9-gic";
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <3>;
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reg = < 0x50041000 0x1000 >,
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< 0x50040100 0x0100 >;
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};
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@ -17,7 +17,7 @@
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#size-cells = <0>;
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compatible = "nvidia,tegra20-i2c";
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reg = <0x7000C000 0x100>;
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interrupts = < 70 >;
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interrupts = < 0 38 0x04 >;
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};
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i2c@7000c400 {
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@ -25,7 +25,7 @@
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#size-cells = <0>;
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compatible = "nvidia,tegra20-i2c";
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reg = <0x7000C400 0x100>;
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interrupts = < 116 >;
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interrupts = < 0 84 0x04 >;
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};
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i2c@7000c500 {
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@ -33,7 +33,7 @@
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#size-cells = <0>;
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compatible = "nvidia,tegra20-i2c";
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reg = <0x7000C500 0x100>;
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interrupts = < 124 >;
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interrupts = < 0 92 0x04 >;
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};
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i2c@7000d000 {
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@ -41,20 +41,20 @@
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#size-cells = <0>;
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compatible = "nvidia,tegra20-i2c";
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reg = <0x7000D000 0x200>;
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interrupts = < 85 >;
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interrupts = < 0 53 0x04 >;
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};
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i2s@70002800 {
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compatible = "nvidia,tegra20-i2s";
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reg = <0x70002800 0x200>;
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interrupts = < 45 >;
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interrupts = < 0 13 0x04 >;
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dma-channel = < 2 >;
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};
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i2s@70002a00 {
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compatible = "nvidia,tegra20-i2s";
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reg = <0x70002a00 0x200>;
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interrupts = < 35 >;
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interrupts = < 0 3 0x04 >;
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dma-channel = < 1 >;
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};
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@ -66,7 +66,13 @@
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gpio: gpio@6000d000 {
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compatible = "nvidia,tegra20-gpio";
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reg = < 0x6000d000 0x1000 >;
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interrupts = < 64 65 66 67 87 119 121 >;
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interrupts = < 0 32 0x04
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0 33 0x04
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0 34 0x04
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0 35 0x04
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0 55 0x04
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0 87 0x04
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0 89 0x04 >;
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#gpio-cells = <2>;
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gpio-controller;
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};
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@ -83,79 +89,79 @@
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compatible = "nvidia,tegra20-uart";
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reg = <0x70006000 0x40>;
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reg-shift = <2>;
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interrupts = < 68 >;
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interrupts = < 0 36 0x04 >;
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};
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serial@70006040 {
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compatible = "nvidia,tegra20-uart";
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reg = <0x70006040 0x40>;
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reg-shift = <2>;
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interrupts = < 69 >;
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interrupts = < 0 37 0x04 >;
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};
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serial@70006200 {
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compatible = "nvidia,tegra20-uart";
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reg = <0x70006200 0x100>;
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reg-shift = <2>;
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interrupts = < 78 >;
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interrupts = < 0 46 0x04 >;
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};
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serial@70006300 {
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compatible = "nvidia,tegra20-uart";
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reg = <0x70006300 0x100>;
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reg-shift = <2>;
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interrupts = < 122 >;
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interrupts = < 0 90 0x04 >;
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};
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serial@70006400 {
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compatible = "nvidia,tegra20-uart";
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reg = <0x70006400 0x100>;
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reg-shift = <2>;
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interrupts = < 123 >;
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interrupts = < 0 91 0x04 >;
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};
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sdhci@c8000000 {
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compatible = "nvidia,tegra20-sdhci";
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reg = <0xc8000000 0x200>;
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interrupts = < 46 >;
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interrupts = < 0 14 0x04 >;
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};
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sdhci@c8000200 {
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compatible = "nvidia,tegra20-sdhci";
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reg = <0xc8000200 0x200>;
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interrupts = < 47 >;
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interrupts = < 0 15 0x04 >;
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};
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sdhci@c8000400 {
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compatible = "nvidia,tegra20-sdhci";
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reg = <0xc8000400 0x200>;
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interrupts = < 51 >;
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interrupts = < 0 19 0x04 >;
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};
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sdhci@c8000600 {
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compatible = "nvidia,tegra20-sdhci";
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reg = <0xc8000600 0x200>;
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interrupts = < 63 >;
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interrupts = < 0 31 0x04 >;
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};
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usb@c5000000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5000000 0x4000>;
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interrupts = < 52 >;
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interrupts = < 0 20 0x04 >;
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phy_type = "utmi";
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};
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usb@c5004000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5004000 0x4000>;
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interrupts = < 53 >;
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interrupts = < 0 21 0x04 >;
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phy_type = "ulpi";
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};
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usb@c5008000 {
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compatible = "nvidia,tegra20-ehci", "usb-ehci";
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reg = <0xc5008000 0x4000>;
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interrupts = < 129 >;
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interrupts = < 0 97 0x04 >;
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phy_type = "utmi";
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};
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};
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@ -36,6 +36,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include <asm/hardware/gic.h>
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#include <mach/iomap.h>
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#include <mach/irqs.h>
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@ -51,6 +52,17 @@ void seaboard_pinmux_init(void);
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void trimslice_pinmux_init(void);
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void ventana_pinmux_init(void);
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static const struct of_device_id tegra_dt_irq_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
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{ }
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};
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void __init tegra_dt_init_irq(void)
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{
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tegra_init_irq();
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of_irq_init(tegra_dt_irq_match);
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}
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struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
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OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
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@ -91,11 +103,6 @@ static struct of_device_id tegra_dt_match_table[] __initdata = {
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{}
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};
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static struct of_device_id tegra_dt_gic_match[] __initdata = {
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{ .compatible = "nvidia,tegra20-gic", },
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{}
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};
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static struct {
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char *machine;
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void (*init)(void);
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@ -109,14 +116,8 @@ static struct {
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static void __init tegra_dt_init(void)
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{
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struct device_node *node;
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int i;
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node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
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TEGRA_ARM_INT_DIST_BASE);
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if (node)
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irq_domain_add_simple(node, INT_GIC_BASE);
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tegra_clk_init_from_table(tegra_dt_clk_init_table);
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/*
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@ -149,7 +150,7 @@ static const char * tegra_dt_board_compat[] = {
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DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
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.map_io = tegra_map_common_io,
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.init_early = tegra_init_early,
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.init_irq = tegra_init_irq,
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.init_irq = tegra_dt_init_irq,
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.timer = &tegra_timer,
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.init_machine = tegra_dt_init,
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.dt_compat = tegra_dt_board_compat,
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@ -21,6 +21,7 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/hardware/gic.h>
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@ -129,6 +130,11 @@ void __init tegra_init_irq(void)
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gic_arch_extn.irq_unmask = tegra_unmask;
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gic_arch_extn.irq_retrigger = tegra_retrigger;
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gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
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IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
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/*
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* Check if there is a devicetree present, since the GIC will be
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* initialized elsewhere under DT.
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*/
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if (!of_have_populated_dt())
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gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
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IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
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}
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