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EDAC: arm64: Add option to panic on correctable errors 

Allow the Cortex A53/A57 EDAC driver to be configured to
panic the kernel if a correctable error (CE) is detected.

Change-Id: Id7bf66ed36a348eb321d8fd457efe097c003ebcd
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
This commit is contained in:
Stepan Moskovchenko 2014-06-10 19:27:17 -07:00
parent 858142132a
commit 15c4e1608b
2 changed files with 20 additions and 1 deletions
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14
drivers/edac/Kconfig
View File

@ -377,6 +377,18 @@ config EDAC_CORTEX_ARM64
stability and overall system health, you should probably say 'Y'
here.
config EDAC_CORTEX_ARM64_PANIC_ON_CE
depends on EDAC_CORTEX_ARM64
bool "Panic on correctable errors"
help
Forcibly cause a kernel panic if an correctable error (CE) is
detected, even though the error is (by definition) correctable and
would otherwise result in no adverse system effects. This can reduce
debugging times on hardware which may be operating at voltages or
frequencies outside normal specification.
For production builds, you should definitely say 'N' here.
config EDAC_CORTEX_ARM64_PANIC_ON_UE
depends on EDAC_CORTEX_ARM64
bool "Panic on uncorrectable errors"
@ -385,6 +397,6 @@ config EDAC_CORTEX_ARM64_PANIC_ON_UE
detected. This can reduce debugging times on hardware which may be
operating at voltages or frequencies outside normal specification.
For production builds, you should should probably say 'N' here.
For production builds, you should probably say 'N' here.
endif # EDAC

7
drivers/edac/cortex_arm64_edac.c
View File

@ -81,6 +81,12 @@
#define ARM64_ERP_PANIC_ON_UE 0
#endif
#ifdef CONFIG_EDAC_CORTEX_ARM64_PANIC_ON_CE
#define ARM64_ERP_PANIC_ON_CE 1
#else
#define ARM64_ERP_PANIC_ON_CE 0
#endif
#define EDAC_CPU "arm64"
struct erp_drvdata {
@ -548,6 +554,7 @@ static int arm64_cpu_erp_probe(struct platform_device *pdev)
if (rc)
goto out_mem;
drv->edev_ctl->panic_on_ce = ARM64_ERP_PANIC_ON_CE;
drv->edev_ctl->panic_on_ue = ARM64_ERP_PANIC_ON_UE;
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cci");