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KVM: x86 emulator: fix regression with cmpxchg8b on i386 hosts
operand::val and operand::orig_val are 32-bit on i386, whereas cmpxchg8b operands are 64-bit. Fix by adding val64 and orig_val64 union members to struct operand, and using them where needed. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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d56557af19
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2 changed files with 10 additions and 6 deletions
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@ -152,9 +152,14 @@ struct x86_emulate_ops {
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struct operand {
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enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type;
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unsigned int bytes;
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unsigned long orig_val, *ptr;
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union {
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unsigned long orig_val;
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u64 orig_val64;
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};
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unsigned long *ptr;
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union {
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unsigned long val;
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u64 val64;
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char valptr[sizeof(unsigned long) + 2];
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};
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};
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@ -1870,17 +1870,16 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
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struct x86_emulate_ops *ops)
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{
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struct decode_cache *c = &ctxt->decode;
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u64 old = c->dst.orig_val;
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u64 old = c->dst.orig_val64;
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if (((u32) (old >> 0) != (u32) c->regs[VCPU_REGS_RAX]) ||
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((u32) (old >> 32) != (u32) c->regs[VCPU_REGS_RDX])) {
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c->regs[VCPU_REGS_RAX] = (u32) (old >> 0);
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c->regs[VCPU_REGS_RDX] = (u32) (old >> 32);
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ctxt->eflags &= ~EFLG_ZF;
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} else {
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c->dst.val = ((u64)c->regs[VCPU_REGS_RCX] << 32) |
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(u32) c->regs[VCPU_REGS_RBX];
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c->dst.val64 = ((u64)c->regs[VCPU_REGS_RCX] << 32) |
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(u32) c->regs[VCPU_REGS_RBX];
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ctxt->eflags |= EFLG_ZF;
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}
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@ -2616,7 +2615,7 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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c->src.valptr, c->src.bytes);
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if (rc != X86EMUL_CONTINUE)
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goto done;
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c->src.orig_val = c->src.val;
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c->src.orig_val64 = c->src.val64;
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}
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if (c->src2.type == OP_MEM) {
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