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IB/ipath: Maintain active time on all chips

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There is a count of "active hours" maintained in EEPROM, to aid
troubleshooting. The definition of "active" is based on traffic
exceeding a threshold in any given 5-second polling interval. As
originally written, the check was inadvertently bypassed for chips whose
counters were 64-bits wide, and only applied to chips with 32-bit wide
counters.

This patch moves the test for amount of traffic "out" to a more common
location, rather than depending on a side-effect of the software
emulation of 64-bit counts on chips whose hardware is only 32-bits wide.

Signed-off-by: Michael Albaugh <Michael.Albaugh@Qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
Michael Albaugh 2007-10-02 13:26:45 -07:00 committed by Roland Dreier
parent aa7c79abd1
commit 192594d523
1 changed files with 6 additions and 11 deletions
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17
drivers/infiniband/hw/ipath/ipath_stats.c
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@ -55,7 +55,6 @@ u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
u64 val64;
unsigned long t0, t1;
u64 ret;
unsigned long flags;
t0 = jiffies;
/* If fast increment counters are only 32 bits, snapshot them,
@ -92,18 +91,12 @@ u64 ipath_snap_cntr(struct ipath_devdata *dd, ipath_creg creg)
if (creg == dd->ipath_cregs->cr_wordsendcnt) {
if (val != dd->ipath_lastsword) {
dd->ipath_sword += val - dd->ipath_lastsword;
spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
dd->ipath_traffic_wds += val - dd->ipath_lastsword;
spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
dd->ipath_lastsword = val;
}
val64 = dd->ipath_sword;
} else if (creg == dd->ipath_cregs->cr_wordrcvcnt) {
if (val != dd->ipath_lastrword) {
dd->ipath_rword += val - dd->ipath_lastrword;
spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
dd->ipath_traffic_wds += val - dd->ipath_lastrword;
spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
dd->ipath_lastrword = val;
}
val64 = dd->ipath_rword;
@ -247,6 +240,7 @@ void ipath_get_faststats(unsigned long opaque)
u32 val;
static unsigned cnt;
unsigned long flags;
u64 traffic_wds;
/*
* don't access the chip while running diags, or memory diags can
@ -262,12 +256,13 @@ void ipath_get_faststats(unsigned long opaque)
* exceeding a threshold, so we need to check the word-counts
* even if they are 64-bit.
*/
ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
traffic_wds = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt) +
ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
spin_lock_irqsave(&dd->ipath_eep_st_lock, flags);
if (dd->ipath_traffic_wds >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
traffic_wds -= dd->ipath_traffic_wds;
dd->ipath_traffic_wds += traffic_wds;
if (traffic_wds >= IPATH_TRAFFIC_ACTIVE_THRESHOLD)
atomic_add(5, &dd->ipath_active_time); /* S/B #define */
dd->ipath_traffic_wds = 0;
spin_unlock_irqrestore(&dd->ipath_eep_st_lock, flags);
if (dd->ipath_flags & IPATH_32BITCOUNTERS) {