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ARM: dts: msm: affine to little cores when busy on 8956/8952

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In CQ mode, there is no way to distinguish between
READ or WRITE request. Hence, acquire the QoS lock
for little cluster for the entire period of transfer.
This would result in a slight performance improvement
in single threaded transfers.

Change-Id: Icaf9a8d1efad550f97f6818a8c77cde434674824
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
This commit is contained in:
Sahitya Tummala 2015-12-16 13:31:18 +05:30 committed by Gerrit - the friendly Code Review server
parent 5499e3b5c7
commit 1ac5a7c2cf
2 changed files with 4 additions and 6 deletions
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8
arch/arm/boot/dts/qcom/msm8952.dtsi
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@ -1323,13 +1323,9 @@
sdhc-msm-crypto = <&sdcc1_ice>;
qcom,bus-width = <8>;
qcom,qos-planes = <3>;
qcom,cpu-dma-latency-us = <2 360 430>;
qcom,cpu-dma-latency-us-r = <2 360 430>;
qcom,cpu-dma-latency-us-w = <2 360 430>;
qcom,cpu-affinity-r = "affine_cores";
qcom,cpu-affinity-mask-r = <0xf0>;
qcom,modified-dynamic-qos;
qcom,cpu-affinity = "affine_cores";
qcom,cpu-affinity-mask = <0xf0>;
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <9>;

2
arch/arm/boot/dts/qcom/msm8956.dtsi
View file

@ -917,6 +917,8 @@
qcom,bus-width = <8>;
qcom,cpu-dma-latency-us = <60 340 900>;
qcom,cpu-affinity = "affine_cores";
qcom,cpu-affinity-mask = <0x0f>;
qcom,msm-bus,name = "sdhc1";
qcom,msm-bus,num-cases = <9>;